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linux/arch/arm/mach-sunxi/sunxi.c

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ARM: sunxi: Add basic support for Allwinner A1x SoCs Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Stefan Roese <sr@denx.de>
2012-11-08 11:40:16 +00:00
/*
* Device Tree support for Allwinner A1X SoCs
*
* Copyright (C) 2012 Maxime Ripard
*
* Maxime Ripard <maxime.ripard@free-electrons.com>
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
ARM: sunxi: Register the A31 reset IP in init_time The A31 has a reset IP that maintains a few other IPs in reset by default. Among these IPs are the UARTs, and most notably the timers. We thus need to register the reset driver before initializing the timers so that the reset timer can use the reset framework. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
2013-10-05 12:53:48 +00:00
#include <linux/clk-provider.h>
#include <linux/clocksource.h>
ARM: sunxi: Add basic support for Allwinner A1x SoCs Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Stefan Roese <sr@denx.de>
2012-11-08 11:40:16 +00:00
#include <asm/mach/arch.h>
ARM: sunxi: Rework the restart code The Allwinner sun6i (A31) has a slightly different watchdog, that doesn't allow to use the already existing restart code. Rework a bit the restart code to allow to plug in more easily different restart handlers depending on the device tree. In the past, we were also meaning sunxi as a generic name covering all Allwinner SoCs. This won't be true anymore with the A31 (sun6i) that differs pretty much from sun4i and sun5i, and we will end up having sunxi, for sun4i and sun5i, and sun6i, which is neither consistent nor convenient. So, while we're at it, also change sunxi to sun4i. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2013-03-11 19:21:11 +00:00
ARM: sunxi: Add basic support for Allwinner A1x SoCs Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Stefan Roese <sr@denx.de>
2012-11-08 11:40:16 +00:00
static const char * const sunxi_board_dt_compat[] = {
sunxi: Change the machine compatible string. Commit 68136b10 ("ARM: sunxi: Change device tree naming scheme for sunxi") changed the naming scheme and the compatible strings used in the device trees related to the sunXi platform, but forgot to change the compatible string in the DT machine definition. This prevents the kernel from booting on these boards. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2012-12-18 14:17:12 +00:00
"allwinner,sun4i-a10",
ARM: sunxi: Add Allwinner A10s machine compatible The A10s is a SoC member of the Allwinner sun5i family. It is basically an A13 with an EMAC and an HDMI controller. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2013-06-09 07:40:05 +00:00
"allwinner,sun5i-a10s",
sunxi: Change the machine compatible string. Commit 68136b10 ("ARM: sunxi: Change device tree naming scheme for sunxi") changed the naming scheme and the compatible strings used in the device trees related to the sunXi platform, but forgot to change the compatible string in the DT machine definition. This prevents the kernel from booting on these boards. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2012-12-18 14:17:12 +00:00
"allwinner,sun5i-a13",
ARM: sunxi: Add basic support for Allwinner A1x SoCs Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Stefan Roese <sr@denx.de>
2012-11-08 11:40:16 +00:00
NULL,
};
DT_MACHINE_START(SUNXI_DT, "Allwinner A1X (Device Tree)")
.dt_compat = sunxi_board_dt_compat,
MACHINE_END
ARM: sunxi: Split out the DT machines for sun6i and sun7i The A20 and A31 SMP code have a different way of bringing up a new core. This will prevent us from using the same set of smp_operations for the two SoCs family. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2013-08-11 12:35:08 +00:00
static const char * const sun6i_board_dt_compat[] = {
"allwinner,sun6i-a31",
NULL,
};
ARM: sunxi: Register the A31 reset IP in init_time The A31 has a reset IP that maintains a few other IPs in reset by default. Among these IPs are the UARTs, and most notably the timers. We thus need to register the reset driver before initializing the timers so that the reset timer can use the reset framework. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
2013-10-05 12:53:48 +00:00
extern void __init sun6i_reset_init(void);
static void __init sun6i_timer_init(void)
{
of_clk_init(NULL);
ARM: sunxi: allow building without reset controller The sunxi reset controller code is only used with sun6i (a31). After the platform has been split up into per-soc options, it's now possible to build it without the reset controller code, so the base platform init must not call into the reset driver if that is turned off at compile time. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-05-26 15:14:57 +00:00
if (IS_ENABLED(CONFIG_RESET_CONTROLLER))
sun6i_reset_init();
ARM: sunxi: Register the A31 reset IP in init_time The A31 has a reset IP that maintains a few other IPs in reset by default. Among these IPs are the UARTs, and most notably the timers. We thus need to register the reset driver before initializing the timers so that the reset timer can use the reset framework. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
2013-10-05 12:53:48 +00:00
clocksource_of_init();
}
ARM: sunxi: Split out the DT machines for sun6i and sun7i The A20 and A31 SMP code have a different way of bringing up a new core. This will prevent us from using the same set of smp_operations for the two SoCs family. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2013-08-11 12:35:08 +00:00
DT_MACHINE_START(SUN6I_DT, "Allwinner sun6i (A31) Family")
ARM: sunxi: Register the A31 reset IP in init_time The A31 has a reset IP that maintains a few other IPs in reset by default. Among these IPs are the UARTs, and most notably the timers. We thus need to register the reset driver before initializing the timers so that the reset timer can use the reset framework. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
2013-10-05 12:53:48 +00:00
.init_time = sun6i_timer_init,
ARM: sunxi: Split out the DT machines for sun6i and sun7i The A20 and A31 SMP code have a different way of bringing up a new core. This will prevent us from using the same set of smp_operations for the two SoCs family. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2013-08-11 12:35:08 +00:00
.dt_compat = sun6i_board_dt_compat,
MACHINE_END
static const char * const sun7i_board_dt_compat[] = {
"allwinner,sun7i-a20",
NULL,
};
DT_MACHINE_START(SUN7I_DT, "Allwinner sun7i (A20) Family")
.dt_compat = sun7i_board_dt_compat,
ARM: sunxi: Add basic support for Allwinner A1x SoCs Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Stefan Roese <sr@denx.de>
2012-11-08 11:40:16 +00:00
MACHINE_END
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