forked from Minki/linux
ARM: sunxi: Rework the restart code
The Allwinner sun6i (A31) has a slightly different watchdog, that doesn't allow to use the already existing restart code. Rework a bit the restart code to allow to plug in more easily different restart handlers depending on the device tree. In the past, we were also meaning sunxi as a generic name covering all Allwinner SoCs. This won't be true anymore with the A31 (sun6i) that differs pretty much from sun4i and sun5i, and we will end up having sunxi, for sun4i and sun5i, and sun6i, which is neither consistent nor convenient. So, while we're at it, also change sunxi to sun4i. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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@ -1,13 +1,13 @@
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Allwinner sunXi Watchdog timer
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Allwinner sun4i Watchdog timer
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Required properties:
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- compatible : should be "allwinner,sunxi-wdt"
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- compatible : should be "allwinner,sun4i-wdt"
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- reg : Specifies base physical address and size of the registers.
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Example:
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wdt: watchdog@01c20c90 {
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compatible = "allwinner,sunxi-wdt";
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compatible = "allwinner,sun4i-wdt";
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reg = <0x01c20c90 0x10>;
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};
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@ -24,50 +24,63 @@
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#include <asm/mach/arch.h>
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#include <asm/mach/map.h>
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#include <asm/system_misc.h>
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#include "sunxi.h"
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#define WATCHDOG_CTRL_REG 0x00
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#define WATCHDOG_CTRL_RESTART (1 << 0)
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#define WATCHDOG_MODE_REG 0x04
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#define WATCHDOG_MODE_ENABLE (1 << 0)
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#define WATCHDOG_MODE_RESET_ENABLE (1 << 1)
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#define SUN4I_WATCHDOG_CTRL_REG 0x00
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#define SUN4I_WATCHDOG_CTRL_RESTART (1 << 0)
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#define SUN4I_WATCHDOG_MODE_REG 0x04
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#define SUN4I_WATCHDOG_MODE_ENABLE (1 << 0)
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#define SUN4I_WATCHDOG_MODE_RESET_ENABLE (1 << 1)
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static void __iomem *wdt_base;
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static void sunxi_setup_restart(void)
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{
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struct device_node *np = of_find_compatible_node(NULL, NULL,
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"allwinner,sunxi-wdt");
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if (WARN(!np, "unable to setup watchdog restart"))
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return;
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wdt_base = of_iomap(np, 0);
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WARN(!wdt_base, "failed to map watchdog base address");
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}
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static void sunxi_restart(char mode, const char *cmd)
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static void sun4i_restart(char mode, const char *cmd)
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{
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if (!wdt_base)
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return;
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/* Enable timer and set reset bit in the watchdog */
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writel(WATCHDOG_MODE_ENABLE | WATCHDOG_MODE_RESET_ENABLE,
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wdt_base + WATCHDOG_MODE_REG);
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writel(SUN4I_WATCHDOG_MODE_ENABLE | SUN4I_WATCHDOG_MODE_RESET_ENABLE,
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wdt_base + SUN4I_WATCHDOG_MODE_REG);
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/*
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* Restart the watchdog. The default (and lowest) interval
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* value for the watchdog is 0.5s.
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*/
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writel(WATCHDOG_CTRL_RESTART, wdt_base + WATCHDOG_CTRL_REG);
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writel(SUN4I_WATCHDOG_CTRL_RESTART, wdt_base + SUN4I_WATCHDOG_CTRL_REG);
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while (1) {
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mdelay(5);
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writel(WATCHDOG_MODE_ENABLE | WATCHDOG_MODE_RESET_ENABLE,
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wdt_base + WATCHDOG_MODE_REG);
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writel(SUN4I_WATCHDOG_MODE_ENABLE | SUN4I_WATCHDOG_MODE_RESET_ENABLE,
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wdt_base + SUN4I_WATCHDOG_MODE_REG);
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}
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}
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static struct of_device_id sunxi_restart_ids[] = {
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{ .compatible = "allwinner,sun4i-wdt", .data = sun4i_restart },
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{ /*sentinel*/ }
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};
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static void sunxi_setup_restart(void)
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{
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const struct of_device_id *of_id;
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struct device_node *np;
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np = of_find_matching_node(NULL, sunxi_restart_ids);
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if (WARN(!np, "unable to setup watchdog restart"))
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return;
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wdt_base = of_iomap(np, 0);
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WARN(!wdt_base, "failed to map watchdog base address");
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of_id = of_match_node(sunxi_restart_ids, np);
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WARN(!of_id, "restart function not available");
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arm_pm_restart = of_id->data;
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}
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static struct map_desc sunxi_io_desc[] __initdata = {
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{
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.virtual = (unsigned long) SUNXI_REGS_VIRT_BASE,
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@ -105,7 +118,6 @@ DT_MACHINE_START(SUNXI_DT, "Allwinner A1X (Device Tree)")
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.init_machine = sunxi_dt_init,
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.map_io = sunxi_map_io,
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.init_irq = irqchip_init,
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.restart = sunxi_restart,
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.init_time = sunxi_timer_init,
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.dt_compat = sunxi_board_dt_compat,
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MACHINE_END
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