2005-04-16 22:20:36 +00:00
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/*
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* Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org)
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*
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2005-10-12 05:55:09 +00:00
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* Modifications for ppc64:
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* Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com>
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*
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2005-04-16 22:20:36 +00:00
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#include <linux/string.h>
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#include <linux/sched.h>
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#include <linux/threads.h>
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#include <linux/init.h>
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2011-07-22 22:24:23 +00:00
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#include <linux/export.h>
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powerpc: Add option to use jump label for cpu_has_feature()
We do binary patching of asm code using CPU features, which is a
one-time operation, done during early boot. However checks of CPU
features in C code are currently done at run time, even though the set
of CPU features can never change after boot.
We can optimise this by using jump labels to implement cpu_has_feature(),
meaning checks in C code are binary patched into a single nop or branch.
For a C sequence along the lines of:
if (cpu_has_feature(FOO))
return 2;
The generated code before is roughly:
ld r9,-27640(r2)
ld r9,0(r9)
lwz r9,32(r9)
cmpwi cr7,r9,0
bge cr7, 1f
li r3,2
blr
1: ...
After (true):
nop
li r3,2
blr
After (false):
b 1f
li r3,2
blr
1: ...
mpe: Rename MAX_CPU_FEATURES as we already have a #define with that
name, and define it simply as a constant, rather than doing tricks with
sizeof and NULL pointers. Rename the array to cpu_feature_keys. Use the
kconfig we added to guard it. Add BUILD_BUG_ON() if the feature is not a
compile time constant. Rewrite the change log.
Signed-off-by: Kevin Hao <haokexin@gmail.com>
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2016-07-23 09:12:41 +00:00
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#include <linux/jump_label.h>
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2005-09-27 20:13:12 +00:00
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#include <asm/oprofile_impl.h>
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2005-04-16 22:20:36 +00:00
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#include <asm/cputable.h>
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2006-10-24 06:42:40 +00:00
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#include <asm/prom.h> /* for PTRRELOC on ARCH=ppc */
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2008-12-18 19:13:32 +00:00
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#include <asm/mmu.h>
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2012-03-28 17:30:02 +00:00
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#include <asm/setup.h>
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2005-04-16 22:20:36 +00:00
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2005-09-27 20:13:12 +00:00
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struct cpu_spec* cur_cpu_spec = NULL;
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2005-10-12 05:55:09 +00:00
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EXPORT_SYMBOL(cur_cpu_spec);
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2005-04-16 22:20:36 +00:00
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2008-07-15 23:58:51 +00:00
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/* The platform string corresponding to the real PVR */
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const char *powerpc_base_platform;
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2005-10-12 05:55:09 +00:00
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/* NOTE:
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* Unlike ppc32, ppc64 will only call this once for the boot CPU, it's
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* the responsibility of the appropriate CPU save/restore functions to
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* eventually copy these settings over. Those save/restore aren't yet
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* part of the cputable though. That has to be fixed for both ppc32
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* and ppc64
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*/
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2006-05-19 04:24:18 +00:00
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#ifdef CONFIG_PPC32
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2009-01-08 14:31:20 +00:00
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extern void __setup_cpu_e200(unsigned long offset, struct cpu_spec* spec);
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extern void __setup_cpu_e500v1(unsigned long offset, struct cpu_spec* spec);
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extern void __setup_cpu_e500v2(unsigned long offset, struct cpu_spec* spec);
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extern void __setup_cpu_e500mc(unsigned long offset, struct cpu_spec* spec);
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2007-09-21 14:46:57 +00:00
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extern void __setup_cpu_440ep(unsigned long offset, struct cpu_spec* spec);
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extern void __setup_cpu_440epx(unsigned long offset, struct cpu_spec* spec);
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2007-12-21 04:39:21 +00:00
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extern void __setup_cpu_440gx(unsigned long offset, struct cpu_spec* spec);
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2007-09-21 14:50:09 +00:00
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extern void __setup_cpu_440grx(unsigned long offset, struct cpu_spec* spec);
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2007-12-21 04:39:21 +00:00
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extern void __setup_cpu_440spe(unsigned long offset, struct cpu_spec* spec);
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2008-12-04 05:39:55 +00:00
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extern void __setup_cpu_440x5(unsigned long offset, struct cpu_spec* spec);
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2008-02-23 21:07:41 +00:00
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extern void __setup_cpu_460ex(unsigned long offset, struct cpu_spec* spec);
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2008-06-11 11:52:40 +00:00
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extern void __setup_cpu_460gt(unsigned long offset, struct cpu_spec* spec);
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2009-02-05 13:31:36 +00:00
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extern void __setup_cpu_460sx(unsigned long offset, struct cpu_spec *spec);
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2010-09-13 13:26:11 +00:00
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extern void __setup_cpu_apm821xx(unsigned long offset, struct cpu_spec *spec);
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2005-09-27 20:13:12 +00:00
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extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec);
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extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec);
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extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec);
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extern void __setup_cpu_750cx(unsigned long offset, struct cpu_spec* spec);
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extern void __setup_cpu_750fx(unsigned long offset, struct cpu_spec* spec);
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extern void __setup_cpu_7400(unsigned long offset, struct cpu_spec* spec);
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extern void __setup_cpu_7410(unsigned long offset, struct cpu_spec* spec);
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extern void __setup_cpu_745x(unsigned long offset, struct cpu_spec* spec);
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2005-10-12 05:55:09 +00:00
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#endif /* CONFIG_PPC32 */
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2006-08-11 05:07:08 +00:00
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#ifdef CONFIG_PPC64
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2005-09-27 20:13:12 +00:00
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extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec);
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2006-10-05 04:41:41 +00:00
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extern void __setup_cpu_ppc970MP(unsigned long offset, struct cpu_spec* spec);
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2007-02-04 22:36:51 +00:00
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extern void __setup_cpu_pa6t(unsigned long offset, struct cpu_spec* spec);
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2007-02-12 11:10:48 +00:00
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extern void __restore_cpu_pa6t(void);
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2006-08-11 05:07:08 +00:00
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extern void __restore_cpu_ppc970(void);
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2008-06-18 00:47:26 +00:00
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extern void __setup_cpu_power7(unsigned long offset, struct cpu_spec* spec);
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extern void __restore_cpu_power7(void);
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2012-10-30 19:34:14 +00:00
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extern void __setup_cpu_power8(unsigned long offset, struct cpu_spec* spec);
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extern void __restore_cpu_power8(void);
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2016-02-19 00:16:24 +00:00
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extern void __setup_cpu_power9(unsigned long offset, struct cpu_spec* spec);
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extern void __restore_cpu_power9(void);
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2014-12-19 03:11:05 +00:00
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extern void __flush_tlb_power7(unsigned int action);
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extern void __flush_tlb_power8(unsigned int action);
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2016-02-19 00:16:24 +00:00
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extern void __flush_tlb_power9(unsigned int action);
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2013-10-30 14:35:11 +00:00
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extern long __machine_check_early_realmode_p7(struct pt_regs *regs);
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2013-10-30 14:35:26 +00:00
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extern long __machine_check_early_realmode_p8(struct pt_regs *regs);
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2006-08-11 05:07:08 +00:00
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#endif /* CONFIG_PPC64 */
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2010-10-08 13:32:11 +00:00
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#if defined(CONFIG_E500)
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extern void __setup_cpu_e5500(unsigned long offset, struct cpu_spec* spec);
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2012-09-07 20:57:17 +00:00
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extern void __setup_cpu_e6500(unsigned long offset, struct cpu_spec* spec);
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2010-10-08 13:32:11 +00:00
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extern void __restore_cpu_e5500(void);
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2012-09-07 20:57:17 +00:00
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extern void __restore_cpu_e6500(void);
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2010-10-08 13:32:11 +00:00
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#endif /* CONFIG_E500 */
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2005-04-16 22:20:36 +00:00
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/* This table only contains "desktop" CPUs, it need to be filled with embedded
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* ones as well...
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*/
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2005-10-12 05:55:09 +00:00
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#define COMMON_USER (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \
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PPC_FEATURE_HAS_MMU)
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#define COMMON_USER_PPC64 (COMMON_USER | PPC_FEATURE_64)
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2005-11-10 03:29:18 +00:00
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#define COMMON_USER_POWER4 (COMMON_USER_PPC64 | PPC_FEATURE_POWER4)
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2006-03-01 04:07:07 +00:00
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#define COMMON_USER_POWER5 (COMMON_USER_PPC64 | PPC_FEATURE_POWER5 |\
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PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
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#define COMMON_USER_POWER5_PLUS (COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS|\
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PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
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2006-04-28 23:51:06 +00:00
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#define COMMON_USER_POWER6 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\
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2006-06-07 06:14:40 +00:00
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PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
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2008-07-09 15:06:57 +00:00
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PPC_FEATURE_TRUE_LE | \
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PPC_FEATURE_PSERIES_PERFMON_COMPAT)
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2008-06-18 00:47:26 +00:00
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#define COMMON_USER_POWER7 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\
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PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
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2008-07-09 15:06:57 +00:00
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PPC_FEATURE_TRUE_LE | \
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PPC_FEATURE_PSERIES_PERFMON_COMPAT)
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2013-05-03 14:48:38 +00:00
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#define COMMON_USER2_POWER7 (PPC_FEATURE2_DSCR)
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2012-10-30 19:34:15 +00:00
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#define COMMON_USER_POWER8 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\
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PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
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PPC_FEATURE_TRUE_LE | \
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PPC_FEATURE_PSERIES_PERFMON_COMPAT)
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2013-05-03 14:49:59 +00:00
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#define COMMON_USER2_POWER8 (PPC_FEATURE2_ARCH_2_07 | \
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2015-06-12 01:06:32 +00:00
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PPC_FEATURE2_HTM_COMP | \
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PPC_FEATURE2_HTM_NOSC_COMP | \
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PPC_FEATURE2_DSCR | \
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2014-06-10 05:04:40 +00:00
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PPC_FEATURE2_ISEL | PPC_FEATURE2_TAR | \
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PPC_FEATURE2_VEC_CRYPTO)
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2006-09-06 19:35:57 +00:00
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#define COMMON_USER_PA6T (COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\
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PPC_FEATURE_TRUE_LE | \
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PPC_FEATURE_HAS_ALTIVEC_COMP)
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2016-02-19 00:16:24 +00:00
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#define COMMON_USER_POWER9 COMMON_USER_POWER8
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#define COMMON_USER2_POWER9 (COMMON_USER2_POWER8 | \
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PPC_FEATURE2_ARCH_3_00 | \
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PPC_FEATURE2_HAS_IEEE128)
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2009-08-18 19:08:30 +00:00
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#ifdef CONFIG_PPC_BOOK3E_64
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#define COMMON_USER_BOOKE (COMMON_USER_PPC64 | PPC_FEATURE_BOOKE)
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#else
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2006-01-13 23:11:39 +00:00
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#define COMMON_USER_BOOKE (PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \
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PPC_FEATURE_BOOKE)
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2009-08-18 19:08:30 +00:00
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#endif
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2005-04-16 22:20:36 +00:00
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[POWERPC] Fix performance monitor on machines with logical PVR
Some IBM machines supply a "logical" PVR (processor version register)
value in the device tree in the cpu nodes rather than the real PVR.
This is used for instance to indicate that the processors in a POWER6
partition have been configured by the hypervisor to run in POWER5+
mode rather than POWER6 mode. To cope with this, we call identify_cpu
a second time with the logical PVR value (the first call is with the
real PVR value in the very early setup code).
However, POWER5+ machines can also supply a logical PVR value, and use
the same value (the value that indicates a v2.04 architecture
compliant processor). This causes problems for code that uses the
performance monitor (such as oprofile), because the PMU registers are
different in POWER6 (even in POWER5+ mode) from the real POWER5+.
This change works around this problem by taking out the PMU
information from the cputable entries for the logical PVR values, and
changing identify_cpu so that the second call to it won't overwrite
the PMU information that was established by the first call (the one
with the real PVR), but does update the other fields. Specifically,
if the cputable entry for the logical PVR value has num_pmcs == 0,
none of the PMU-related fields get used.
So that we can create a mixed cputable entry, we now make cur_cpu_spec
point to a single static struct cpu_spec, and copy stuff from
cpu_specs[i] into it. This has the side-effect that we can now make
cpu_specs[] be initdata.
Ultimately it would be good to move the PMU-related fields out to a
separate structure, pointed to by the cputable entries, and change
identify_cpu so that it saves the PMU info pointer, copies the whole
structure, and restores the PMU info pointer, rather than identify_cpu
having to list all the fields that are *not* PMU-related.
Signed-off-by: Paul Mackerras <paulus@samba.org>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2007-10-04 04:18:01 +00:00
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static struct cpu_spec __initdata cpu_specs[] = {
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2009-07-23 23:15:59 +00:00
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#ifdef CONFIG_PPC_BOOK3S_64
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2005-10-12 05:55:09 +00:00
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{ /* Power4 */
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.pvr_mask = 0xffff0000,
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.pvr_value = 0x00350000,
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.cpu_name = "POWER4 (gp)",
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.cpu_features = CPU_FTRS_POWER4,
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2005-11-10 03:29:18 +00:00
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.cpu_user_features = COMMON_USER_POWER4,
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2016-07-13 09:35:24 +00:00
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.mmu_features = MMU_FTRS_POWER4 | MMU_FTR_TLBIE_CROP_VA,
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2005-10-12 05:55:09 +00:00
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.icache_bsize = 128,
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.dcache_bsize = 128,
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.num_pmcs = 8,
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2007-01-29 03:23:54 +00:00
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.pmc_type = PPC_PMC_IBM,
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2005-10-12 05:55:09 +00:00
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.oprofile_cpu_type = "ppc64/power4",
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2006-01-13 12:35:49 +00:00
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.oprofile_type = PPC_OPROFILE_POWER4,
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2006-01-13 23:11:39 +00:00
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.platform = "power4",
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2005-10-12 05:55:09 +00:00
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},
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{ /* Power4+ */
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.pvr_mask = 0xffff0000,
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.pvr_value = 0x00380000,
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.cpu_name = "POWER4+ (gq)",
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.cpu_features = CPU_FTRS_POWER4,
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2005-11-10 03:29:18 +00:00
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.cpu_user_features = COMMON_USER_POWER4,
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2016-07-13 09:35:24 +00:00
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.mmu_features = MMU_FTRS_POWER4 | MMU_FTR_TLBIE_CROP_VA,
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2005-10-12 05:55:09 +00:00
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.icache_bsize = 128,
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.dcache_bsize = 128,
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.num_pmcs = 8,
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2007-01-29 03:23:54 +00:00
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.pmc_type = PPC_PMC_IBM,
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2005-10-12 05:55:09 +00:00
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.oprofile_cpu_type = "ppc64/power4",
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2006-01-13 12:35:49 +00:00
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.oprofile_type = PPC_OPROFILE_POWER4,
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2006-01-13 23:11:39 +00:00
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.platform = "power4",
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2005-10-12 05:55:09 +00:00
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},
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{ /* PPC970 */
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.pvr_mask = 0xffff0000,
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.pvr_value = 0x00390000,
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.cpu_name = "PPC970",
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.cpu_features = CPU_FTRS_PPC970,
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2005-11-10 03:29:18 +00:00
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.cpu_user_features = COMMON_USER_POWER4 |
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2005-10-12 05:55:09 +00:00
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PPC_FEATURE_HAS_ALTIVEC_COMP,
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2011-04-06 19:48:50 +00:00
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.mmu_features = MMU_FTRS_PPC970,
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2005-10-12 05:55:09 +00:00
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.icache_bsize = 128,
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.dcache_bsize = 128,
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.num_pmcs = 8,
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2007-01-29 03:23:54 +00:00
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.pmc_type = PPC_PMC_IBM,
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2005-10-12 05:55:09 +00:00
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.cpu_setup = __setup_cpu_ppc970,
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2006-08-11 05:07:08 +00:00
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.cpu_restore = __restore_cpu_ppc970,
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2005-10-12 05:55:09 +00:00
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.oprofile_cpu_type = "ppc64/970",
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2006-01-13 12:35:49 +00:00
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.oprofile_type = PPC_OPROFILE_POWER4,
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2006-01-13 23:11:39 +00:00
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.platform = "ppc970",
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2005-10-12 05:55:09 +00:00
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},
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{ /* PPC970FX */
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.pvr_mask = 0xffff0000,
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.pvr_value = 0x003c0000,
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.cpu_name = "PPC970FX",
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.cpu_features = CPU_FTRS_PPC970,
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2005-11-10 03:29:18 +00:00
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.cpu_user_features = COMMON_USER_POWER4 |
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2005-10-12 05:55:09 +00:00
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PPC_FEATURE_HAS_ALTIVEC_COMP,
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2011-04-06 19:48:50 +00:00
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.mmu_features = MMU_FTRS_PPC970,
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2005-10-12 05:55:09 +00:00
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.icache_bsize = 128,
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.dcache_bsize = 128,
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.num_pmcs = 8,
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2007-01-29 03:23:54 +00:00
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.pmc_type = PPC_PMC_IBM,
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2005-10-12 05:55:09 +00:00
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.cpu_setup = __setup_cpu_ppc970,
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2006-08-11 05:07:08 +00:00
|
|
|
.cpu_restore = __restore_cpu_ppc970,
|
2005-10-12 05:55:09 +00:00
|
|
|
.oprofile_cpu_type = "ppc64/970",
|
2006-01-13 12:35:49 +00:00
|
|
|
.oprofile_type = PPC_OPROFILE_POWER4,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc970",
|
2007-02-26 06:35:14 +00:00
|
|
|
},
|
|
|
|
{ /* PPC970MP DD1.0 - no DEEPNAP, use regular 970 init */
|
|
|
|
.pvr_mask = 0xffffffff,
|
|
|
|
.pvr_value = 0x00440100,
|
|
|
|
.cpu_name = "PPC970MP",
|
|
|
|
.cpu_features = CPU_FTRS_PPC970,
|
|
|
|
.cpu_user_features = COMMON_USER_POWER4 |
|
|
|
|
PPC_FEATURE_HAS_ALTIVEC_COMP,
|
2013-03-12 22:55:02 +00:00
|
|
|
.mmu_features = MMU_FTRS_PPC970,
|
2007-02-26 06:35:14 +00:00
|
|
|
.icache_bsize = 128,
|
|
|
|
.dcache_bsize = 128,
|
|
|
|
.num_pmcs = 8,
|
2007-05-19 05:22:41 +00:00
|
|
|
.pmc_type = PPC_PMC_IBM,
|
2007-02-26 06:35:14 +00:00
|
|
|
.cpu_setup = __setup_cpu_ppc970,
|
|
|
|
.cpu_restore = __restore_cpu_ppc970,
|
|
|
|
.oprofile_cpu_type = "ppc64/970MP",
|
|
|
|
.oprofile_type = PPC_OPROFILE_POWER4,
|
|
|
|
.platform = "ppc970",
|
2005-10-12 05:55:09 +00:00
|
|
|
},
|
|
|
|
{ /* PPC970MP */
|
|
|
|
.pvr_mask = 0xffff0000,
|
|
|
|
.pvr_value = 0x00440000,
|
|
|
|
.cpu_name = "PPC970MP",
|
|
|
|
.cpu_features = CPU_FTRS_PPC970,
|
2005-11-10 03:29:18 +00:00
|
|
|
.cpu_user_features = COMMON_USER_POWER4 |
|
2005-10-12 05:55:09 +00:00
|
|
|
PPC_FEATURE_HAS_ALTIVEC_COMP,
|
2011-04-06 19:48:50 +00:00
|
|
|
.mmu_features = MMU_FTRS_PPC970,
|
2005-10-12 05:55:09 +00:00
|
|
|
.icache_bsize = 128,
|
|
|
|
.dcache_bsize = 128,
|
2006-05-04 19:44:26 +00:00
|
|
|
.num_pmcs = 8,
|
2007-05-19 05:22:41 +00:00
|
|
|
.pmc_type = PPC_PMC_IBM,
|
2006-10-05 04:41:41 +00:00
|
|
|
.cpu_setup = __setup_cpu_ppc970MP,
|
2006-08-11 05:07:08 +00:00
|
|
|
.cpu_restore = __restore_cpu_ppc970,
|
2006-11-21 20:41:54 +00:00
|
|
|
.oprofile_cpu_type = "ppc64/970MP",
|
2006-01-13 12:35:49 +00:00
|
|
|
.oprofile_type = PPC_OPROFILE_POWER4,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc970",
|
2005-10-12 05:55:09 +00:00
|
|
|
},
|
2006-10-18 15:47:22 +00:00
|
|
|
{ /* PPC970GX */
|
|
|
|
.pvr_mask = 0xffff0000,
|
|
|
|
.pvr_value = 0x00450000,
|
|
|
|
.cpu_name = "PPC970GX",
|
|
|
|
.cpu_features = CPU_FTRS_PPC970,
|
|
|
|
.cpu_user_features = COMMON_USER_POWER4 |
|
|
|
|
PPC_FEATURE_HAS_ALTIVEC_COMP,
|
2011-04-06 19:48:50 +00:00
|
|
|
.mmu_features = MMU_FTRS_PPC970,
|
2006-10-18 15:47:22 +00:00
|
|
|
.icache_bsize = 128,
|
|
|
|
.dcache_bsize = 128,
|
|
|
|
.num_pmcs = 8,
|
2007-01-29 03:23:54 +00:00
|
|
|
.pmc_type = PPC_PMC_IBM,
|
2006-10-18 15:47:22 +00:00
|
|
|
.cpu_setup = __setup_cpu_ppc970,
|
|
|
|
.oprofile_cpu_type = "ppc64/970",
|
|
|
|
.oprofile_type = PPC_OPROFILE_POWER4,
|
|
|
|
.platform = "ppc970",
|
|
|
|
},
|
2005-11-07 00:06:55 +00:00
|
|
|
{ /* Power5 GR */
|
2005-10-12 05:55:09 +00:00
|
|
|
.pvr_mask = 0xffff0000,
|
|
|
|
.pvr_value = 0x003a0000,
|
|
|
|
.cpu_name = "POWER5 (gr)",
|
|
|
|
.cpu_features = CPU_FTRS_POWER5,
|
2005-11-10 03:29:18 +00:00
|
|
|
.cpu_user_features = COMMON_USER_POWER5,
|
2011-04-06 19:48:50 +00:00
|
|
|
.mmu_features = MMU_FTRS_POWER5,
|
2005-10-12 05:55:09 +00:00
|
|
|
.icache_bsize = 128,
|
|
|
|
.dcache_bsize = 128,
|
|
|
|
.num_pmcs = 6,
|
2007-01-29 03:23:54 +00:00
|
|
|
.pmc_type = PPC_PMC_IBM,
|
2005-10-12 05:55:09 +00:00
|
|
|
.oprofile_cpu_type = "ppc64/power5",
|
2006-01-13 12:35:49 +00:00
|
|
|
.oprofile_type = PPC_OPROFILE_POWER4,
|
2006-06-08 04:42:34 +00:00
|
|
|
/* SIHV / SIPR bits are implemented on POWER4+ (GQ)
|
|
|
|
* and above but only works on POWER5 and above
|
|
|
|
*/
|
|
|
|
.oprofile_mmcra_sihv = MMCRA_SIHV,
|
|
|
|
.oprofile_mmcra_sipr = MMCRA_SIPR,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "power5",
|
2005-10-12 05:55:09 +00:00
|
|
|
},
|
2007-07-10 18:13:47 +00:00
|
|
|
{ /* Power5++ */
|
|
|
|
.pvr_mask = 0xffffff00,
|
|
|
|
.pvr_value = 0x003b0300,
|
|
|
|
.cpu_name = "POWER5+ (gs)",
|
|
|
|
.cpu_features = CPU_FTRS_POWER5,
|
|
|
|
.cpu_user_features = COMMON_USER_POWER5_PLUS,
|
2011-04-06 19:48:50 +00:00
|
|
|
.mmu_features = MMU_FTRS_POWER5,
|
2007-07-10 18:13:47 +00:00
|
|
|
.icache_bsize = 128,
|
|
|
|
.dcache_bsize = 128,
|
|
|
|
.num_pmcs = 6,
|
|
|
|
.oprofile_cpu_type = "ppc64/power5++",
|
|
|
|
.oprofile_type = PPC_OPROFILE_POWER4,
|
|
|
|
.oprofile_mmcra_sihv = MMCRA_SIHV,
|
|
|
|
.oprofile_mmcra_sipr = MMCRA_SIPR,
|
|
|
|
.platform = "power5+",
|
|
|
|
},
|
2005-11-07 00:06:55 +00:00
|
|
|
{ /* Power5 GS */
|
2005-10-12 05:55:09 +00:00
|
|
|
.pvr_mask = 0xffff0000,
|
|
|
|
.pvr_value = 0x003b0000,
|
2006-01-09 04:42:30 +00:00
|
|
|
.cpu_name = "POWER5+ (gs)",
|
2005-10-12 05:55:09 +00:00
|
|
|
.cpu_features = CPU_FTRS_POWER5,
|
2005-11-10 03:29:18 +00:00
|
|
|
.cpu_user_features = COMMON_USER_POWER5_PLUS,
|
2011-04-06 19:48:50 +00:00
|
|
|
.mmu_features = MMU_FTRS_POWER5,
|
2005-10-12 05:55:09 +00:00
|
|
|
.icache_bsize = 128,
|
|
|
|
.dcache_bsize = 128,
|
|
|
|
.num_pmcs = 6,
|
2007-01-29 03:23:54 +00:00
|
|
|
.pmc_type = PPC_PMC_IBM,
|
2006-01-09 04:42:30 +00:00
|
|
|
.oprofile_cpu_type = "ppc64/power5+",
|
2006-01-13 12:35:49 +00:00
|
|
|
.oprofile_type = PPC_OPROFILE_POWER4,
|
2006-06-08 04:42:34 +00:00
|
|
|
.oprofile_mmcra_sihv = MMCRA_SIHV,
|
|
|
|
.oprofile_mmcra_sipr = MMCRA_SIPR,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "power5+",
|
2005-10-12 05:55:09 +00:00
|
|
|
},
|
2006-11-10 09:38:53 +00:00
|
|
|
{ /* POWER6 in P5+ mode; 2.04-compliant processor */
|
|
|
|
.pvr_mask = 0xffffffff,
|
|
|
|
.pvr_value = 0x0f000001,
|
|
|
|
.cpu_name = "POWER5+",
|
|
|
|
.cpu_features = CPU_FTRS_POWER5,
|
|
|
|
.cpu_user_features = COMMON_USER_POWER5_PLUS,
|
2011-04-06 19:48:50 +00:00
|
|
|
.mmu_features = MMU_FTRS_POWER5,
|
2006-11-10 09:38:53 +00:00
|
|
|
.icache_bsize = 128,
|
|
|
|
.dcache_bsize = 128,
|
2009-04-27 06:17:54 +00:00
|
|
|
.oprofile_cpu_type = "ppc64/ibm-compat-v1",
|
|
|
|
.oprofile_type = PPC_OPROFILE_POWER4,
|
2006-11-10 09:38:53 +00:00
|
|
|
.platform = "power5+",
|
|
|
|
},
|
2006-04-28 23:51:06 +00:00
|
|
|
{ /* Power6 */
|
|
|
|
.pvr_mask = 0xffff0000,
|
|
|
|
.pvr_value = 0x003e0000,
|
2006-11-10 09:38:53 +00:00
|
|
|
.cpu_name = "POWER6 (raw)",
|
|
|
|
.cpu_features = CPU_FTRS_POWER6,
|
|
|
|
.cpu_user_features = COMMON_USER_POWER6 |
|
|
|
|
PPC_FEATURE_POWER6_EXT,
|
2011-04-06 19:48:50 +00:00
|
|
|
.mmu_features = MMU_FTRS_POWER6,
|
2006-11-10 09:38:53 +00:00
|
|
|
.icache_bsize = 128,
|
|
|
|
.dcache_bsize = 128,
|
|
|
|
.num_pmcs = 6,
|
2007-05-19 05:22:41 +00:00
|
|
|
.pmc_type = PPC_PMC_IBM,
|
2006-11-10 09:38:53 +00:00
|
|
|
.oprofile_cpu_type = "ppc64/power6",
|
|
|
|
.oprofile_type = PPC_OPROFILE_POWER4,
|
|
|
|
.oprofile_mmcra_sihv = POWER6_MMCRA_SIHV,
|
|
|
|
.oprofile_mmcra_sipr = POWER6_MMCRA_SIPR,
|
|
|
|
.oprofile_mmcra_clear = POWER6_MMCRA_THRM |
|
|
|
|
POWER6_MMCRA_OTHER,
|
|
|
|
.platform = "power6x",
|
|
|
|
},
|
|
|
|
{ /* 2.05-compliant processor, i.e. Power6 "architected" mode */
|
|
|
|
.pvr_mask = 0xffffffff,
|
|
|
|
.pvr_value = 0x0f000002,
|
|
|
|
.cpu_name = "POWER6 (architected)",
|
2006-04-28 23:51:06 +00:00
|
|
|
.cpu_features = CPU_FTRS_POWER6,
|
|
|
|
.cpu_user_features = COMMON_USER_POWER6,
|
2011-04-06 19:48:50 +00:00
|
|
|
.mmu_features = MMU_FTRS_POWER6,
|
2006-04-28 23:51:06 +00:00
|
|
|
.icache_bsize = 128,
|
|
|
|
.dcache_bsize = 128,
|
2009-04-27 06:17:54 +00:00
|
|
|
.oprofile_cpu_type = "ppc64/ibm-compat-v1",
|
|
|
|
.oprofile_type = PPC_OPROFILE_POWER4,
|
2006-04-28 23:51:06 +00:00
|
|
|
.platform = "power6",
|
|
|
|
},
|
2008-06-18 20:18:21 +00:00
|
|
|
{ /* 2.06-compliant processor, i.e. Power7 "architected" mode */
|
|
|
|
.pvr_mask = 0xffffffff,
|
|
|
|
.pvr_value = 0x0f000003,
|
|
|
|
.cpu_name = "POWER7 (architected)",
|
|
|
|
.cpu_features = CPU_FTRS_POWER7,
|
|
|
|
.cpu_user_features = COMMON_USER_POWER7,
|
2013-05-03 14:48:38 +00:00
|
|
|
.cpu_user_features2 = COMMON_USER2_POWER7,
|
2011-04-06 19:48:50 +00:00
|
|
|
.mmu_features = MMU_FTRS_POWER7,
|
2008-06-18 20:18:21 +00:00
|
|
|
.icache_bsize = 128,
|
|
|
|
.dcache_bsize = 128,
|
2009-04-27 06:17:54 +00:00
|
|
|
.oprofile_type = PPC_OPROFILE_POWER4,
|
|
|
|
.oprofile_cpu_type = "ppc64/ibm-compat-v1",
|
2011-01-20 07:50:55 +00:00
|
|
|
.cpu_setup = __setup_cpu_power7,
|
|
|
|
.cpu_restore = __restore_cpu_power7,
|
2013-10-30 14:34:56 +00:00
|
|
|
.flush_tlb = __flush_tlb_power7,
|
2013-10-30 14:35:11 +00:00
|
|
|
.machine_check_early = __machine_check_early_realmode_p7,
|
2008-06-18 20:18:21 +00:00
|
|
|
.platform = "power7",
|
|
|
|
},
|
2012-11-08 20:26:42 +00:00
|
|
|
{ /* 2.07-compliant processor, i.e. Power8 "architected" mode */
|
|
|
|
.pvr_mask = 0xffffffff,
|
|
|
|
.pvr_value = 0x0f000004,
|
|
|
|
.cpu_name = "POWER8 (architected)",
|
|
|
|
.cpu_features = CPU_FTRS_POWER8,
|
|
|
|
.cpu_user_features = COMMON_USER_POWER8,
|
2013-05-03 14:49:59 +00:00
|
|
|
.cpu_user_features2 = COMMON_USER2_POWER8,
|
2012-11-08 20:26:42 +00:00
|
|
|
.mmu_features = MMU_FTRS_POWER8,
|
|
|
|
.icache_bsize = 128,
|
|
|
|
.dcache_bsize = 128,
|
2013-06-04 19:38:54 +00:00
|
|
|
.oprofile_type = PPC_OPROFILE_INVALID,
|
|
|
|
.oprofile_cpu_type = "ppc64/ibm-compat-v1",
|
2012-11-08 20:26:42 +00:00
|
|
|
.cpu_setup = __setup_cpu_power8,
|
|
|
|
.cpu_restore = __restore_cpu_power8,
|
2013-10-30 14:34:56 +00:00
|
|
|
.flush_tlb = __flush_tlb_power8,
|
2013-10-30 14:35:26 +00:00
|
|
|
.machine_check_early = __machine_check_early_realmode_p8,
|
2012-11-08 20:26:42 +00:00
|
|
|
.platform = "power8",
|
|
|
|
},
|
2008-06-18 00:47:26 +00:00
|
|
|
{ /* Power7 */
|
|
|
|
.pvr_mask = 0xffff0000,
|
|
|
|
.pvr_value = 0x003f0000,
|
2008-06-18 20:18:21 +00:00
|
|
|
.cpu_name = "POWER7 (raw)",
|
2008-06-18 00:47:26 +00:00
|
|
|
.cpu_features = CPU_FTRS_POWER7,
|
|
|
|
.cpu_user_features = COMMON_USER_POWER7,
|
2013-05-03 14:48:38 +00:00
|
|
|
.cpu_user_features2 = COMMON_USER2_POWER7,
|
2011-04-06 19:48:50 +00:00
|
|
|
.mmu_features = MMU_FTRS_POWER7,
|
2008-06-18 00:47:26 +00:00
|
|
|
.icache_bsize = 128,
|
|
|
|
.dcache_bsize = 128,
|
|
|
|
.num_pmcs = 6,
|
|
|
|
.pmc_type = PPC_PMC_IBM,
|
|
|
|
.oprofile_cpu_type = "ppc64/power7",
|
|
|
|
.oprofile_type = PPC_OPROFILE_POWER4,
|
2011-01-20 07:50:55 +00:00
|
|
|
.cpu_setup = __setup_cpu_power7,
|
|
|
|
.cpu_restore = __restore_cpu_power7,
|
2013-10-30 14:34:56 +00:00
|
|
|
.flush_tlb = __flush_tlb_power7,
|
2013-10-30 14:35:11 +00:00
|
|
|
.machine_check_early = __machine_check_early_realmode_p7,
|
2008-06-18 00:47:26 +00:00
|
|
|
.platform = "power7",
|
|
|
|
},
|
2010-11-17 18:52:44 +00:00
|
|
|
{ /* Power7+ */
|
|
|
|
.pvr_mask = 0xffff0000,
|
|
|
|
.pvr_value = 0x004A0000,
|
|
|
|
.cpu_name = "POWER7+ (raw)",
|
|
|
|
.cpu_features = CPU_FTRS_POWER7,
|
|
|
|
.cpu_user_features = COMMON_USER_POWER7,
|
2013-05-20 05:04:18 +00:00
|
|
|
.cpu_user_features2 = COMMON_USER2_POWER7,
|
2011-04-06 19:48:50 +00:00
|
|
|
.mmu_features = MMU_FTRS_POWER7,
|
2010-11-17 18:52:44 +00:00
|
|
|
.icache_bsize = 128,
|
|
|
|
.dcache_bsize = 128,
|
|
|
|
.num_pmcs = 6,
|
|
|
|
.pmc_type = PPC_PMC_IBM,
|
|
|
|
.oprofile_cpu_type = "ppc64/power7",
|
|
|
|
.oprofile_type = PPC_OPROFILE_POWER4,
|
2011-01-20 07:50:55 +00:00
|
|
|
.cpu_setup = __setup_cpu_power7,
|
|
|
|
.cpu_restore = __restore_cpu_power7,
|
2013-10-30 14:34:56 +00:00
|
|
|
.flush_tlb = __flush_tlb_power7,
|
2013-10-30 14:35:11 +00:00
|
|
|
.machine_check_early = __machine_check_early_realmode_p7,
|
2010-11-17 18:52:44 +00:00
|
|
|
.platform = "power7+",
|
|
|
|
},
|
2013-07-18 01:31:51 +00:00
|
|
|
{ /* Power8E */
|
2012-10-30 19:34:15 +00:00
|
|
|
.pvr_mask = 0xffff0000,
|
|
|
|
.pvr_value = 0x004b0000,
|
2013-07-18 01:31:51 +00:00
|
|
|
.cpu_name = "POWER8E (raw)",
|
2014-03-14 05:00:28 +00:00
|
|
|
.cpu_features = CPU_FTRS_POWER8E,
|
2013-07-18 01:31:51 +00:00
|
|
|
.cpu_user_features = COMMON_USER_POWER8,
|
2014-07-18 02:11:37 +00:00
|
|
|
.cpu_user_features2 = COMMON_USER2_POWER8,
|
|
|
|
.mmu_features = MMU_FTRS_POWER8,
|
|
|
|
.icache_bsize = 128,
|
|
|
|
.dcache_bsize = 128,
|
|
|
|
.num_pmcs = 6,
|
|
|
|
.pmc_type = PPC_PMC_IBM,
|
|
|
|
.oprofile_cpu_type = "ppc64/power8",
|
|
|
|
.oprofile_type = PPC_OPROFILE_INVALID,
|
|
|
|
.cpu_setup = __setup_cpu_power8,
|
|
|
|
.cpu_restore = __restore_cpu_power8,
|
|
|
|
.flush_tlb = __flush_tlb_power8,
|
|
|
|
.machine_check_early = __machine_check_early_realmode_p8,
|
|
|
|
.platform = "power8",
|
|
|
|
},
|
2015-03-19 03:12:06 +00:00
|
|
|
{ /* Power8NVL */
|
|
|
|
.pvr_mask = 0xffff0000,
|
|
|
|
.pvr_value = 0x004c0000,
|
|
|
|
.cpu_name = "POWER8NVL (raw)",
|
|
|
|
.cpu_features = CPU_FTRS_POWER8,
|
|
|
|
.cpu_user_features = COMMON_USER_POWER8,
|
|
|
|
.cpu_user_features2 = COMMON_USER2_POWER8,
|
|
|
|
.mmu_features = MMU_FTRS_POWER8,
|
|
|
|
.icache_bsize = 128,
|
|
|
|
.dcache_bsize = 128,
|
|
|
|
.num_pmcs = 6,
|
|
|
|
.pmc_type = PPC_PMC_IBM,
|
|
|
|
.oprofile_cpu_type = "ppc64/power8",
|
|
|
|
.oprofile_type = PPC_OPROFILE_INVALID,
|
|
|
|
.cpu_setup = __setup_cpu_power8,
|
|
|
|
.cpu_restore = __restore_cpu_power8,
|
|
|
|
.flush_tlb = __flush_tlb_power8,
|
|
|
|
.machine_check_early = __machine_check_early_realmode_p8,
|
|
|
|
.platform = "power8",
|
|
|
|
},
|
2014-07-18 02:11:37 +00:00
|
|
|
{ /* Power8 DD1: Does not support doorbell IPIs */
|
|
|
|
.pvr_mask = 0xffffff00,
|
|
|
|
.pvr_value = 0x004d0100,
|
|
|
|
.cpu_name = "POWER8 (raw)",
|
|
|
|
.cpu_features = CPU_FTRS_POWER8_DD1,
|
|
|
|
.cpu_user_features = COMMON_USER_POWER8,
|
2013-07-18 01:31:51 +00:00
|
|
|
.cpu_user_features2 = COMMON_USER2_POWER8,
|
|
|
|
.mmu_features = MMU_FTRS_POWER8,
|
|
|
|
.icache_bsize = 128,
|
|
|
|
.dcache_bsize = 128,
|
|
|
|
.num_pmcs = 6,
|
|
|
|
.pmc_type = PPC_PMC_IBM,
|
|
|
|
.oprofile_cpu_type = "ppc64/power8",
|
|
|
|
.oprofile_type = PPC_OPROFILE_INVALID,
|
|
|
|
.cpu_setup = __setup_cpu_power8,
|
|
|
|
.cpu_restore = __restore_cpu_power8,
|
2013-10-30 14:34:56 +00:00
|
|
|
.flush_tlb = __flush_tlb_power8,
|
2013-10-30 14:35:26 +00:00
|
|
|
.machine_check_early = __machine_check_early_realmode_p8,
|
2013-07-18 01:31:51 +00:00
|
|
|
.platform = "power8",
|
|
|
|
},
|
|
|
|
{ /* Power8 */
|
|
|
|
.pvr_mask = 0xffff0000,
|
|
|
|
.pvr_value = 0x004d0000,
|
2012-10-30 19:34:15 +00:00
|
|
|
.cpu_name = "POWER8 (raw)",
|
|
|
|
.cpu_features = CPU_FTRS_POWER8,
|
|
|
|
.cpu_user_features = COMMON_USER_POWER8,
|
2013-05-03 14:49:59 +00:00
|
|
|
.cpu_user_features2 = COMMON_USER2_POWER8,
|
2012-10-30 19:34:15 +00:00
|
|
|
.mmu_features = MMU_FTRS_POWER8,
|
|
|
|
.icache_bsize = 128,
|
|
|
|
.dcache_bsize = 128,
|
|
|
|
.num_pmcs = 6,
|
|
|
|
.pmc_type = PPC_PMC_IBM,
|
2013-06-04 19:38:54 +00:00
|
|
|
.oprofile_cpu_type = "ppc64/power8",
|
|
|
|
.oprofile_type = PPC_OPROFILE_INVALID,
|
2012-10-30 19:34:15 +00:00
|
|
|
.cpu_setup = __setup_cpu_power8,
|
|
|
|
.cpu_restore = __restore_cpu_power8,
|
2013-10-30 14:34:56 +00:00
|
|
|
.flush_tlb = __flush_tlb_power8,
|
2013-10-30 14:35:26 +00:00
|
|
|
.machine_check_early = __machine_check_early_realmode_p8,
|
2012-10-30 19:34:15 +00:00
|
|
|
.platform = "power8",
|
|
|
|
},
|
2016-02-19 00:16:24 +00:00
|
|
|
{ /* Power9 */
|
|
|
|
.pvr_mask = 0xffff0000,
|
|
|
|
.pvr_value = 0x004e0000,
|
|
|
|
.cpu_name = "POWER9 (raw)",
|
|
|
|
.cpu_features = CPU_FTRS_POWER9,
|
|
|
|
.cpu_user_features = COMMON_USER_POWER9,
|
|
|
|
.cpu_user_features2 = COMMON_USER2_POWER9,
|
|
|
|
.mmu_features = MMU_FTRS_POWER9,
|
|
|
|
.icache_bsize = 128,
|
|
|
|
.dcache_bsize = 128,
|
|
|
|
.num_pmcs = 6,
|
|
|
|
.pmc_type = PPC_PMC_IBM,
|
|
|
|
.oprofile_cpu_type = "ppc64/power9",
|
|
|
|
.oprofile_type = PPC_OPROFILE_INVALID,
|
|
|
|
.cpu_setup = __setup_cpu_power9,
|
|
|
|
.cpu_restore = __restore_cpu_power9,
|
|
|
|
.flush_tlb = __flush_tlb_power9,
|
|
|
|
.platform = "power9",
|
|
|
|
},
|
2006-01-04 19:55:53 +00:00
|
|
|
{ /* Cell Broadband Engine */
|
2005-10-12 05:55:09 +00:00
|
|
|
.pvr_mask = 0xffff0000,
|
|
|
|
.pvr_value = 0x00700000,
|
|
|
|
.cpu_name = "Cell Broadband Engine",
|
|
|
|
.cpu_features = CPU_FTRS_CELL,
|
|
|
|
.cpu_user_features = COMMON_USER_PPC64 |
|
2006-03-01 04:07:07 +00:00
|
|
|
PPC_FEATURE_CELL | PPC_FEATURE_HAS_ALTIVEC_COMP |
|
|
|
|
PPC_FEATURE_SMT,
|
2011-04-06 19:48:50 +00:00
|
|
|
.mmu_features = MMU_FTRS_CELL,
|
2005-10-12 05:55:09 +00:00
|
|
|
.icache_bsize = 128,
|
|
|
|
.dcache_bsize = 128,
|
[POWERPC] cell: Add oprofile support
Add PPU event-based and cycle-based profiling support to Oprofile for Cell.
Oprofile is expected to collect data on all CPUs simultaneously.
However, there is one set of performance counters per node. There are
two hardware threads or virtual CPUs on each node. Hence, OProfile must
multiplex in time the performance counter collection on the two virtual
CPUs.
The multiplexing of the performance counters is done by a virtual
counter routine. Initially, the counters are configured to collect data
on the even CPUs in the system, one CPU per node. In order to capture
the PC for the virtual CPU when the performance counter interrupt occurs
(the specified number of events between samples has occurred), the even
processors are configured to handle the performance counter interrupts
for their node. The virtual counter routine is called via a kernel
timer after the virtual sample time. The routine stops the counters,
saves the current counts, loads the last counts for the other virtual
CPU on the node, sets interrupts to be handled by the other virtual CPU
and restarts the counters, the virtual timer routine is scheduled to run
again. The virtual sample time is kept relatively small to make sure
sampling occurs on both CPUs on the node with a relatively small
granularity. Whenever the counters overflow, the performance counter
interrupt is called to collect the PC for the CPU where data is being
collected.
The oprofile driver relies on a firmware RTAS call to setup the debug bus
to route the desired signals to the performance counter hardware to be
counted. The RTAS call must set the routing registers appropriately in
each of the islands to pass the signals down the debug bus as well as
routing the signals from a particular island onto the bus. There is a
second firmware RTAS call to reset the debug bus to the non pass thru
state when the counters are not in use.
Signed-off-by: Carl Love <carll@us.ibm.com>
Signed-off-by: Maynard Johnson <mpjohn@us.ibm.com>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-11-20 17:45:16 +00:00
|
|
|
.num_pmcs = 4,
|
2007-01-29 03:23:54 +00:00
|
|
|
.pmc_type = PPC_PMC_IBM,
|
[POWERPC] cell: Add oprofile support
Add PPU event-based and cycle-based profiling support to Oprofile for Cell.
Oprofile is expected to collect data on all CPUs simultaneously.
However, there is one set of performance counters per node. There are
two hardware threads or virtual CPUs on each node. Hence, OProfile must
multiplex in time the performance counter collection on the two virtual
CPUs.
The multiplexing of the performance counters is done by a virtual
counter routine. Initially, the counters are configured to collect data
on the even CPUs in the system, one CPU per node. In order to capture
the PC for the virtual CPU when the performance counter interrupt occurs
(the specified number of events between samples has occurred), the even
processors are configured to handle the performance counter interrupts
for their node. The virtual counter routine is called via a kernel
timer after the virtual sample time. The routine stops the counters,
saves the current counts, loads the last counts for the other virtual
CPU on the node, sets interrupts to be handled by the other virtual CPU
and restarts the counters, the virtual timer routine is scheduled to run
again. The virtual sample time is kept relatively small to make sure
sampling occurs on both CPUs on the node with a relatively small
granularity. Whenever the counters overflow, the performance counter
interrupt is called to collect the PC for the CPU where data is being
collected.
The oprofile driver relies on a firmware RTAS call to setup the debug bus
to route the desired signals to the performance counter hardware to be
counted. The RTAS call must set the routing registers appropriately in
each of the islands to pass the signals down the debug bus as well as
routing the signals from a particular island onto the bus. There is a
second firmware RTAS call to reset the debug bus to the non pass thru
state when the counters are not in use.
Signed-off-by: Carl Love <carll@us.ibm.com>
Signed-off-by: Maynard Johnson <mpjohn@us.ibm.com>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-11-20 17:45:16 +00:00
|
|
|
.oprofile_cpu_type = "ppc64/cell-be",
|
|
|
|
.oprofile_type = PPC_OPROFILE_CELL,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc-cell-be",
|
2005-10-12 05:55:09 +00:00
|
|
|
},
|
2006-09-06 19:35:57 +00:00
|
|
|
{ /* PA Semi PA6T */
|
|
|
|
.pvr_mask = 0x7fff0000,
|
|
|
|
.pvr_value = 0x00900000,
|
|
|
|
.cpu_name = "PA6T",
|
|
|
|
.cpu_features = CPU_FTRS_PA6T,
|
|
|
|
.cpu_user_features = COMMON_USER_PA6T,
|
2011-04-06 19:48:50 +00:00
|
|
|
.mmu_features = MMU_FTRS_PA6T,
|
2006-09-06 19:35:57 +00:00
|
|
|
.icache_bsize = 64,
|
|
|
|
.dcache_bsize = 64,
|
|
|
|
.num_pmcs = 6,
|
2007-01-29 03:23:54 +00:00
|
|
|
.pmc_type = PPC_PMC_PA6T,
|
2007-02-04 22:36:51 +00:00
|
|
|
.cpu_setup = __setup_cpu_pa6t,
|
|
|
|
.cpu_restore = __restore_cpu_pa6t,
|
2007-04-18 06:38:21 +00:00
|
|
|
.oprofile_cpu_type = "ppc64/pa6t",
|
|
|
|
.oprofile_type = PPC_OPROFILE_PA6T,
|
2006-09-06 19:35:57 +00:00
|
|
|
.platform = "pa6t",
|
|
|
|
},
|
2005-10-12 05:55:09 +00:00
|
|
|
{ /* default match */
|
|
|
|
.pvr_mask = 0x00000000,
|
|
|
|
.pvr_value = 0x00000000,
|
|
|
|
.cpu_name = "POWER4 (compatible)",
|
|
|
|
.cpu_features = CPU_FTRS_COMPATIBLE,
|
|
|
|
.cpu_user_features = COMMON_USER_PPC64,
|
2011-04-06 19:48:50 +00:00
|
|
|
.mmu_features = MMU_FTRS_DEFAULT_HPTE_ARCH_V2,
|
2005-10-12 05:55:09 +00:00
|
|
|
.icache_bsize = 128,
|
|
|
|
.dcache_bsize = 128,
|
|
|
|
.num_pmcs = 6,
|
2007-01-29 03:23:54 +00:00
|
|
|
.pmc_type = PPC_PMC_IBM,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "power4",
|
2005-10-12 05:55:09 +00:00
|
|
|
}
|
2009-07-23 23:15:59 +00:00
|
|
|
#endif /* CONFIG_PPC_BOOK3S_64 */
|
|
|
|
|
2005-10-12 05:55:09 +00:00
|
|
|
#ifdef CONFIG_PPC32
|
2014-07-10 02:29:26 +00:00
|
|
|
#ifdef CONFIG_PPC_BOOK3S_32
|
2005-10-12 05:55:09 +00:00
|
|
|
{ /* 601 */
|
2005-04-16 22:20:36 +00:00
|
|
|
.pvr_mask = 0xffff0000,
|
|
|
|
.pvr_value = 0x00010000,
|
|
|
|
.cpu_name = "601",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_PPC601,
|
2005-10-12 05:55:09 +00:00
|
|
|
.cpu_user_features = COMMON_USER | PPC_FEATURE_601_INSTR |
|
2005-10-12 04:22:50 +00:00
|
|
|
PPC_FEATURE_UNIFIED_CACHE | PPC_FEATURE_NO_TB,
|
2008-12-18 19:13:32 +00:00
|
|
|
.mmu_features = MMU_FTR_HPTE_TABLE,
|
2005-04-16 22:20:36 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
2007-12-21 04:39:21 +00:00
|
|
|
.machine_check = machine_check_generic,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc601",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
|
|
|
{ /* 603 */
|
|
|
|
.pvr_mask = 0xffff0000,
|
|
|
|
.pvr_value = 0x00030000,
|
|
|
|
.cpu_name = "603",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_603,
|
2006-06-07 06:14:40 +00:00
|
|
|
.cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
|
2008-12-18 19:13:32 +00:00
|
|
|
.mmu_features = 0,
|
2005-04-16 22:20:36 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
2006-01-13 23:11:39 +00:00
|
|
|
.cpu_setup = __setup_cpu_603,
|
2007-12-21 04:39:21 +00:00
|
|
|
.machine_check = machine_check_generic,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc603",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
|
|
|
{ /* 603e */
|
|
|
|
.pvr_mask = 0xffff0000,
|
|
|
|
.pvr_value = 0x00060000,
|
|
|
|
.cpu_name = "603e",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_603,
|
2006-06-07 06:14:40 +00:00
|
|
|
.cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
|
2008-12-18 19:13:32 +00:00
|
|
|
.mmu_features = 0,
|
2005-04-16 22:20:36 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
2006-01-13 23:11:39 +00:00
|
|
|
.cpu_setup = __setup_cpu_603,
|
2007-12-21 04:39:21 +00:00
|
|
|
.machine_check = machine_check_generic,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc603",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
|
|
|
{ /* 603ev */
|
|
|
|
.pvr_mask = 0xffff0000,
|
|
|
|
.pvr_value = 0x00070000,
|
|
|
|
.cpu_name = "603ev",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_603,
|
2006-06-07 06:14:40 +00:00
|
|
|
.cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
|
2008-12-18 19:13:32 +00:00
|
|
|
.mmu_features = 0,
|
2005-04-16 22:20:36 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
2006-01-13 23:11:39 +00:00
|
|
|
.cpu_setup = __setup_cpu_603,
|
2007-12-21 04:39:21 +00:00
|
|
|
.machine_check = machine_check_generic,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc603",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
|
|
|
{ /* 604 */
|
|
|
|
.pvr_mask = 0xffff0000,
|
|
|
|
.pvr_value = 0x00040000,
|
|
|
|
.cpu_name = "604",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_604,
|
2006-06-07 06:14:40 +00:00
|
|
|
.cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
|
2008-12-18 19:13:32 +00:00
|
|
|
.mmu_features = MMU_FTR_HPTE_TABLE,
|
2005-04-16 22:20:36 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
|
|
|
.num_pmcs = 2,
|
2006-01-13 23:11:39 +00:00
|
|
|
.cpu_setup = __setup_cpu_604,
|
2007-12-21 04:39:21 +00:00
|
|
|
.machine_check = machine_check_generic,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc604",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
|
|
|
{ /* 604e */
|
|
|
|
.pvr_mask = 0xfffff000,
|
|
|
|
.pvr_value = 0x00090000,
|
|
|
|
.cpu_name = "604e",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_604,
|
2006-06-07 06:14:40 +00:00
|
|
|
.cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
|
2008-12-18 19:13:32 +00:00
|
|
|
.mmu_features = MMU_FTR_HPTE_TABLE,
|
2005-04-16 22:20:36 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
|
|
|
.num_pmcs = 4,
|
2006-01-13 23:11:39 +00:00
|
|
|
.cpu_setup = __setup_cpu_604,
|
2007-12-21 04:39:21 +00:00
|
|
|
.machine_check = machine_check_generic,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc604",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
|
|
|
{ /* 604r */
|
|
|
|
.pvr_mask = 0xffff0000,
|
|
|
|
.pvr_value = 0x00090000,
|
|
|
|
.cpu_name = "604r",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_604,
|
2006-06-07 06:14:40 +00:00
|
|
|
.cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
|
2008-12-18 19:13:32 +00:00
|
|
|
.mmu_features = MMU_FTR_HPTE_TABLE,
|
2005-04-16 22:20:36 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
|
|
|
.num_pmcs = 4,
|
2006-01-13 23:11:39 +00:00
|
|
|
.cpu_setup = __setup_cpu_604,
|
2007-12-21 04:39:21 +00:00
|
|
|
.machine_check = machine_check_generic,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc604",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
|
|
|
{ /* 604ev */
|
|
|
|
.pvr_mask = 0xffff0000,
|
|
|
|
.pvr_value = 0x000a0000,
|
|
|
|
.cpu_name = "604ev",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_604,
|
2006-06-07 06:14:40 +00:00
|
|
|
.cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
|
2008-12-18 19:13:32 +00:00
|
|
|
.mmu_features = MMU_FTR_HPTE_TABLE,
|
2005-04-16 22:20:36 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
|
|
|
.num_pmcs = 4,
|
2006-01-13 23:11:39 +00:00
|
|
|
.cpu_setup = __setup_cpu_604,
|
2007-12-21 04:39:21 +00:00
|
|
|
.machine_check = machine_check_generic,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc604",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
|
|
|
{ /* 740/750 (0x4202, don't support TAU ?) */
|
|
|
|
.pvr_mask = 0xffffffff,
|
|
|
|
.pvr_value = 0x00084202,
|
|
|
|
.cpu_name = "740/750",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_740_NOTAU,
|
2006-06-07 06:14:40 +00:00
|
|
|
.cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
|
2008-12-18 19:13:32 +00:00
|
|
|
.mmu_features = MMU_FTR_HPTE_TABLE,
|
2005-04-16 22:20:36 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
|
|
|
.num_pmcs = 4,
|
2006-01-13 23:11:39 +00:00
|
|
|
.cpu_setup = __setup_cpu_750,
|
2007-12-21 04:39:21 +00:00
|
|
|
.machine_check = machine_check_generic,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc750",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
|
|
|
{ /* 750CX (80100 and 8010x?) */
|
|
|
|
.pvr_mask = 0xfffffff0,
|
|
|
|
.pvr_value = 0x00080100,
|
|
|
|
.cpu_name = "750CX",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_750,
|
2006-06-07 06:14:40 +00:00
|
|
|
.cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
|
2008-12-18 19:13:32 +00:00
|
|
|
.mmu_features = MMU_FTR_HPTE_TABLE,
|
2005-04-16 22:20:36 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
|
|
|
.num_pmcs = 4,
|
2006-01-13 23:11:39 +00:00
|
|
|
.cpu_setup = __setup_cpu_750cx,
|
2007-12-21 04:39:21 +00:00
|
|
|
.machine_check = machine_check_generic,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc750",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
|
|
|
{ /* 750CX (82201 and 82202) */
|
|
|
|
.pvr_mask = 0xfffffff0,
|
|
|
|
.pvr_value = 0x00082200,
|
|
|
|
.cpu_name = "750CX",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_750,
|
2006-06-07 06:14:40 +00:00
|
|
|
.cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
|
2008-12-18 19:13:32 +00:00
|
|
|
.mmu_features = MMU_FTR_HPTE_TABLE,
|
2005-04-16 22:20:36 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
|
|
|
.num_pmcs = 4,
|
2008-08-18 04:23:51 +00:00
|
|
|
.pmc_type = PPC_PMC_IBM,
|
2006-01-13 23:11:39 +00:00
|
|
|
.cpu_setup = __setup_cpu_750cx,
|
2007-12-21 04:39:21 +00:00
|
|
|
.machine_check = machine_check_generic,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc750",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
|
|
|
{ /* 750CXe (82214) */
|
|
|
|
.pvr_mask = 0xfffffff0,
|
|
|
|
.pvr_value = 0x00082210,
|
|
|
|
.cpu_name = "750CXe",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_750,
|
2006-06-07 06:14:40 +00:00
|
|
|
.cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
|
2008-12-18 19:13:32 +00:00
|
|
|
.mmu_features = MMU_FTR_HPTE_TABLE,
|
2005-04-16 22:20:36 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
|
|
|
.num_pmcs = 4,
|
2008-08-18 04:23:51 +00:00
|
|
|
.pmc_type = PPC_PMC_IBM,
|
2006-01-13 23:11:39 +00:00
|
|
|
.cpu_setup = __setup_cpu_750cx,
|
2007-12-21 04:39:21 +00:00
|
|
|
.machine_check = machine_check_generic,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc750",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
2005-09-03 22:55:52 +00:00
|
|
|
{ /* 750CXe "Gekko" (83214) */
|
|
|
|
.pvr_mask = 0xffffffff,
|
|
|
|
.pvr_value = 0x00083214,
|
|
|
|
.cpu_name = "750CXe",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_750,
|
2006-06-07 06:14:40 +00:00
|
|
|
.cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
|
2008-12-18 19:13:32 +00:00
|
|
|
.mmu_features = MMU_FTR_HPTE_TABLE,
|
2005-09-03 22:55:52 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
|
|
|
.num_pmcs = 4,
|
2008-08-18 04:23:51 +00:00
|
|
|
.pmc_type = PPC_PMC_IBM,
|
2006-01-13 23:11:39 +00:00
|
|
|
.cpu_setup = __setup_cpu_750cx,
|
2007-12-21 04:39:21 +00:00
|
|
|
.machine_check = machine_check_generic,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc750",
|
2005-09-03 22:55:52 +00:00
|
|
|
},
|
2009-12-12 06:31:46 +00:00
|
|
|
{ /* 750CL (and "Broadway") */
|
|
|
|
.pvr_mask = 0xfffff0e0,
|
|
|
|
.pvr_value = 0x00087000,
|
2006-10-03 19:29:34 +00:00
|
|
|
.cpu_name = "750CL",
|
2007-04-12 18:33:25 +00:00
|
|
|
.cpu_features = CPU_FTRS_750CL,
|
2006-10-03 19:29:34 +00:00
|
|
|
.cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
|
2008-12-18 19:13:32 +00:00
|
|
|
.mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
|
2006-10-03 19:29:34 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
|
|
|
.num_pmcs = 4,
|
2008-08-18 04:23:51 +00:00
|
|
|
.pmc_type = PPC_PMC_IBM,
|
2007-04-12 18:33:25 +00:00
|
|
|
.cpu_setup = __setup_cpu_750,
|
2007-12-21 04:39:21 +00:00
|
|
|
.machine_check = machine_check_generic,
|
2006-10-03 19:29:34 +00:00
|
|
|
.platform = "ppc750",
|
2009-09-16 08:58:15 +00:00
|
|
|
.oprofile_cpu_type = "ppc/750",
|
|
|
|
.oprofile_type = PPC_OPROFILE_G4,
|
2006-10-03 19:29:34 +00:00
|
|
|
},
|
2005-09-03 22:55:51 +00:00
|
|
|
{ /* 745/755 */
|
|
|
|
.pvr_mask = 0xfffff000,
|
|
|
|
.pvr_value = 0x00083000,
|
|
|
|
.cpu_name = "745/755",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_750,
|
2006-06-07 06:14:40 +00:00
|
|
|
.cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
|
2008-12-18 19:13:32 +00:00
|
|
|
.mmu_features = MMU_FTR_HPTE_TABLE,
|
2005-09-03 22:55:51 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
|
|
|
.num_pmcs = 4,
|
2008-08-18 04:23:51 +00:00
|
|
|
.pmc_type = PPC_PMC_IBM,
|
2006-01-13 23:11:39 +00:00
|
|
|
.cpu_setup = __setup_cpu_750,
|
2007-12-21 04:39:21 +00:00
|
|
|
.machine_check = machine_check_generic,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc750",
|
2005-09-03 22:55:51 +00:00
|
|
|
},
|
2005-04-16 22:20:36 +00:00
|
|
|
{ /* 750FX rev 1.x */
|
|
|
|
.pvr_mask = 0xffffff00,
|
|
|
|
.pvr_value = 0x70000100,
|
|
|
|
.cpu_name = "750FX",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_750FX1,
|
2006-06-07 06:14:40 +00:00
|
|
|
.cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
|
2008-12-18 19:13:32 +00:00
|
|
|
.mmu_features = MMU_FTR_HPTE_TABLE,
|
2005-04-16 22:20:36 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
|
|
|
.num_pmcs = 4,
|
2008-08-18 04:23:51 +00:00
|
|
|
.pmc_type = PPC_PMC_IBM,
|
2006-01-13 23:11:39 +00:00
|
|
|
.cpu_setup = __setup_cpu_750,
|
2007-12-21 04:39:21 +00:00
|
|
|
.machine_check = machine_check_generic,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc750",
|
2009-03-04 02:02:42 +00:00
|
|
|
.oprofile_cpu_type = "ppc/750",
|
|
|
|
.oprofile_type = PPC_OPROFILE_G4,
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
|
|
|
{ /* 750FX rev 2.0 must disable HID0[DPM] */
|
|
|
|
.pvr_mask = 0xffffffff,
|
|
|
|
.pvr_value = 0x70000200,
|
|
|
|
.cpu_name = "750FX",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_750FX2,
|
2006-06-07 06:14:40 +00:00
|
|
|
.cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
|
2008-12-18 19:13:32 +00:00
|
|
|
.mmu_features = MMU_FTR_HPTE_TABLE,
|
2005-04-16 22:20:36 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
|
|
|
.num_pmcs = 4,
|
2008-08-18 04:23:51 +00:00
|
|
|
.pmc_type = PPC_PMC_IBM,
|
2006-01-13 23:11:39 +00:00
|
|
|
.cpu_setup = __setup_cpu_750,
|
2007-12-21 04:39:21 +00:00
|
|
|
.machine_check = machine_check_generic,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc750",
|
2009-03-04 02:02:42 +00:00
|
|
|
.oprofile_cpu_type = "ppc/750",
|
|
|
|
.oprofile_type = PPC_OPROFILE_G4,
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
|
|
|
{ /* 750FX (All revs except 2.0) */
|
|
|
|
.pvr_mask = 0xffff0000,
|
|
|
|
.pvr_value = 0x70000000,
|
|
|
|
.cpu_name = "750FX",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_750FX,
|
2006-06-07 06:14:40 +00:00
|
|
|
.cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
|
2008-12-18 19:13:32 +00:00
|
|
|
.mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
|
2005-04-16 22:20:36 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
|
|
|
.num_pmcs = 4,
|
2008-08-18 04:23:51 +00:00
|
|
|
.pmc_type = PPC_PMC_IBM,
|
2006-01-13 23:11:39 +00:00
|
|
|
.cpu_setup = __setup_cpu_750fx,
|
2007-12-21 04:39:21 +00:00
|
|
|
.machine_check = machine_check_generic,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc750",
|
2009-03-04 02:02:42 +00:00
|
|
|
.oprofile_cpu_type = "ppc/750",
|
|
|
|
.oprofile_type = PPC_OPROFILE_G4,
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
|
|
|
{ /* 750GX */
|
|
|
|
.pvr_mask = 0xffff0000,
|
|
|
|
.pvr_value = 0x70020000,
|
|
|
|
.cpu_name = "750GX",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_750GX,
|
2006-06-07 06:14:40 +00:00
|
|
|
.cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
|
2008-12-18 19:13:32 +00:00
|
|
|
.mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
|
2005-04-16 22:20:36 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
|
|
|
.num_pmcs = 4,
|
2008-08-18 04:23:51 +00:00
|
|
|
.pmc_type = PPC_PMC_IBM,
|
2006-01-13 23:11:39 +00:00
|
|
|
.cpu_setup = __setup_cpu_750fx,
|
2007-12-21 04:39:21 +00:00
|
|
|
.machine_check = machine_check_generic,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc750",
|
2009-03-04 02:02:42 +00:00
|
|
|
.oprofile_cpu_type = "ppc/750",
|
|
|
|
.oprofile_type = PPC_OPROFILE_G4,
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
|
|
|
{ /* 740/750 (L2CR bit need fixup for 740) */
|
|
|
|
.pvr_mask = 0xffff0000,
|
|
|
|
.pvr_value = 0x00080000,
|
|
|
|
.cpu_name = "740/750",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_740,
|
2006-06-07 06:14:40 +00:00
|
|
|
.cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
|
2008-12-18 19:13:32 +00:00
|
|
|
.mmu_features = MMU_FTR_HPTE_TABLE,
|
2005-04-16 22:20:36 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
|
|
|
.num_pmcs = 4,
|
2008-08-18 04:23:51 +00:00
|
|
|
.pmc_type = PPC_PMC_IBM,
|
2006-01-13 23:11:39 +00:00
|
|
|
.cpu_setup = __setup_cpu_750,
|
2007-12-21 04:39:21 +00:00
|
|
|
.machine_check = machine_check_generic,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc750",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
|
|
|
{ /* 7400 rev 1.1 ? (no TAU) */
|
|
|
|
.pvr_mask = 0xffffffff,
|
|
|
|
.pvr_value = 0x000c1101,
|
|
|
|
.cpu_name = "7400 (1.1)",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_7400_NOTAU,
|
2006-06-07 06:14:40 +00:00
|
|
|
.cpu_user_features = COMMON_USER |
|
|
|
|
PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
|
2008-12-18 19:13:32 +00:00
|
|
|
.mmu_features = MMU_FTR_HPTE_TABLE,
|
2005-04-16 22:20:36 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
|
|
|
.num_pmcs = 4,
|
2008-08-18 04:23:51 +00:00
|
|
|
.pmc_type = PPC_PMC_G4,
|
2006-01-13 23:11:39 +00:00
|
|
|
.cpu_setup = __setup_cpu_7400,
|
2007-12-21 04:39:21 +00:00
|
|
|
.machine_check = machine_check_generic,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc7400",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
|
|
|
{ /* 7400 */
|
|
|
|
.pvr_mask = 0xffff0000,
|
|
|
|
.pvr_value = 0x000c0000,
|
|
|
|
.cpu_name = "7400",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_7400,
|
2006-06-07 06:14:40 +00:00
|
|
|
.cpu_user_features = COMMON_USER |
|
|
|
|
PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
|
2008-12-18 19:13:32 +00:00
|
|
|
.mmu_features = MMU_FTR_HPTE_TABLE,
|
2005-04-16 22:20:36 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
|
|
|
.num_pmcs = 4,
|
2008-08-18 04:23:51 +00:00
|
|
|
.pmc_type = PPC_PMC_G4,
|
2006-01-13 23:11:39 +00:00
|
|
|
.cpu_setup = __setup_cpu_7400,
|
2007-12-21 04:39:21 +00:00
|
|
|
.machine_check = machine_check_generic,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc7400",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
|
|
|
{ /* 7410 */
|
|
|
|
.pvr_mask = 0xffff0000,
|
|
|
|
.pvr_value = 0x800c0000,
|
|
|
|
.cpu_name = "7410",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_7400,
|
2006-06-07 06:14:40 +00:00
|
|
|
.cpu_user_features = COMMON_USER |
|
|
|
|
PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
|
2008-12-18 19:13:32 +00:00
|
|
|
.mmu_features = MMU_FTR_HPTE_TABLE,
|
2005-04-16 22:20:36 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
|
|
|
.num_pmcs = 4,
|
2008-08-18 04:23:51 +00:00
|
|
|
.pmc_type = PPC_PMC_G4,
|
2006-01-13 23:11:39 +00:00
|
|
|
.cpu_setup = __setup_cpu_7410,
|
2007-12-21 04:39:21 +00:00
|
|
|
.machine_check = machine_check_generic,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc7400",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
|
|
|
{ /* 7450 2.0 - no doze/nap */
|
|
|
|
.pvr_mask = 0xffffffff,
|
|
|
|
.pvr_value = 0x80000200,
|
|
|
|
.cpu_name = "7450",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_7450_20,
|
2006-06-07 06:14:40 +00:00
|
|
|
.cpu_user_features = COMMON_USER |
|
|
|
|
PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
|
2008-12-18 19:13:32 +00:00
|
|
|
.mmu_features = MMU_FTR_HPTE_TABLE,
|
2005-04-16 22:20:36 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
|
|
|
.num_pmcs = 6,
|
2008-08-18 04:23:51 +00:00
|
|
|
.pmc_type = PPC_PMC_G4,
|
2005-12-16 02:02:04 +00:00
|
|
|
.cpu_setup = __setup_cpu_745x,
|
|
|
|
.oprofile_cpu_type = "ppc/7450",
|
2006-01-13 12:35:49 +00:00
|
|
|
.oprofile_type = PPC_OPROFILE_G4,
|
2007-12-21 04:39:21 +00:00
|
|
|
.machine_check = machine_check_generic,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc7450",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
|
|
|
{ /* 7450 2.1 */
|
|
|
|
.pvr_mask = 0xffffffff,
|
|
|
|
.pvr_value = 0x80000201,
|
|
|
|
.cpu_name = "7450",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_7450_21,
|
2006-06-07 06:14:40 +00:00
|
|
|
.cpu_user_features = COMMON_USER |
|
|
|
|
PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
|
2008-12-18 19:13:32 +00:00
|
|
|
.mmu_features = MMU_FTR_HPTE_TABLE,
|
2005-04-16 22:20:36 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
|
|
|
.num_pmcs = 6,
|
2008-08-18 04:23:51 +00:00
|
|
|
.pmc_type = PPC_PMC_G4,
|
2005-12-16 02:02:04 +00:00
|
|
|
.cpu_setup = __setup_cpu_745x,
|
|
|
|
.oprofile_cpu_type = "ppc/7450",
|
2006-01-13 12:35:49 +00:00
|
|
|
.oprofile_type = PPC_OPROFILE_G4,
|
2007-12-21 04:39:21 +00:00
|
|
|
.machine_check = machine_check_generic,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc7450",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
|
|
|
{ /* 7450 2.3 and newer */
|
|
|
|
.pvr_mask = 0xffff0000,
|
|
|
|
.pvr_value = 0x80000000,
|
|
|
|
.cpu_name = "7450",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_7450_23,
|
2006-06-07 06:14:40 +00:00
|
|
|
.cpu_user_features = COMMON_USER |
|
|
|
|
PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
|
2008-12-18 19:13:32 +00:00
|
|
|
.mmu_features = MMU_FTR_HPTE_TABLE,
|
2005-04-16 22:20:36 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
|
|
|
.num_pmcs = 6,
|
2008-08-18 04:23:51 +00:00
|
|
|
.pmc_type = PPC_PMC_G4,
|
2005-12-16 02:02:04 +00:00
|
|
|
.cpu_setup = __setup_cpu_745x,
|
|
|
|
.oprofile_cpu_type = "ppc/7450",
|
2006-01-13 12:35:49 +00:00
|
|
|
.oprofile_type = PPC_OPROFILE_G4,
|
2007-12-21 04:39:21 +00:00
|
|
|
.machine_check = machine_check_generic,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc7450",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
|
|
|
{ /* 7455 rev 1.x */
|
|
|
|
.pvr_mask = 0xffffff00,
|
|
|
|
.pvr_value = 0x80010100,
|
|
|
|
.cpu_name = "7455",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_7455_1,
|
2006-06-07 06:14:40 +00:00
|
|
|
.cpu_user_features = COMMON_USER |
|
|
|
|
PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
|
2008-12-18 19:13:32 +00:00
|
|
|
.mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
|
2005-04-16 22:20:36 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
|
|
|
.num_pmcs = 6,
|
2008-08-18 04:23:51 +00:00
|
|
|
.pmc_type = PPC_PMC_G4,
|
2005-12-16 02:02:04 +00:00
|
|
|
.cpu_setup = __setup_cpu_745x,
|
|
|
|
.oprofile_cpu_type = "ppc/7450",
|
2006-01-13 12:35:49 +00:00
|
|
|
.oprofile_type = PPC_OPROFILE_G4,
|
2007-12-21 04:39:21 +00:00
|
|
|
.machine_check = machine_check_generic,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc7450",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
|
|
|
{ /* 7455 rev 2.0 */
|
|
|
|
.pvr_mask = 0xffffffff,
|
|
|
|
.pvr_value = 0x80010200,
|
|
|
|
.cpu_name = "7455",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_7455_20,
|
2006-06-07 06:14:40 +00:00
|
|
|
.cpu_user_features = COMMON_USER |
|
|
|
|
PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
|
2008-12-18 19:13:32 +00:00
|
|
|
.mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
|
2005-04-16 22:20:36 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
|
|
|
.num_pmcs = 6,
|
2008-08-18 04:23:51 +00:00
|
|
|
.pmc_type = PPC_PMC_G4,
|
2005-12-16 02:02:04 +00:00
|
|
|
.cpu_setup = __setup_cpu_745x,
|
|
|
|
.oprofile_cpu_type = "ppc/7450",
|
2006-01-13 12:35:49 +00:00
|
|
|
.oprofile_type = PPC_OPROFILE_G4,
|
2007-12-21 04:39:21 +00:00
|
|
|
.machine_check = machine_check_generic,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc7450",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
|
|
|
{ /* 7455 others */
|
|
|
|
.pvr_mask = 0xffff0000,
|
|
|
|
.pvr_value = 0x80010000,
|
|
|
|
.cpu_name = "7455",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_7455,
|
2006-06-07 06:14:40 +00:00
|
|
|
.cpu_user_features = COMMON_USER |
|
|
|
|
PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
|
2008-12-18 19:13:32 +00:00
|
|
|
.mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
|
2005-04-16 22:20:36 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
|
|
|
.num_pmcs = 6,
|
2008-08-18 04:23:51 +00:00
|
|
|
.pmc_type = PPC_PMC_G4,
|
2005-12-16 02:02:04 +00:00
|
|
|
.cpu_setup = __setup_cpu_745x,
|
|
|
|
.oprofile_cpu_type = "ppc/7450",
|
2006-01-13 12:35:49 +00:00
|
|
|
.oprofile_type = PPC_OPROFILE_G4,
|
2007-12-21 04:39:21 +00:00
|
|
|
.machine_check = machine_check_generic,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc7450",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
|
|
|
{ /* 7447/7457 Rev 1.0 */
|
|
|
|
.pvr_mask = 0xffffffff,
|
|
|
|
.pvr_value = 0x80020100,
|
|
|
|
.cpu_name = "7447/7457",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_7447_10,
|
2006-06-07 06:14:40 +00:00
|
|
|
.cpu_user_features = COMMON_USER |
|
|
|
|
PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
|
2008-12-18 19:13:32 +00:00
|
|
|
.mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
|
2005-04-16 22:20:36 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
|
|
|
.num_pmcs = 6,
|
2008-08-18 04:23:51 +00:00
|
|
|
.pmc_type = PPC_PMC_G4,
|
2005-12-16 02:02:04 +00:00
|
|
|
.cpu_setup = __setup_cpu_745x,
|
|
|
|
.oprofile_cpu_type = "ppc/7450",
|
2006-01-13 12:35:49 +00:00
|
|
|
.oprofile_type = PPC_OPROFILE_G4,
|
2007-12-21 04:39:21 +00:00
|
|
|
.machine_check = machine_check_generic,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc7450",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
|
|
|
{ /* 7447/7457 Rev 1.1 */
|
|
|
|
.pvr_mask = 0xffffffff,
|
|
|
|
.pvr_value = 0x80020101,
|
|
|
|
.cpu_name = "7447/7457",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_7447_10,
|
2006-06-07 06:14:40 +00:00
|
|
|
.cpu_user_features = COMMON_USER |
|
|
|
|
PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
|
2008-12-18 19:13:32 +00:00
|
|
|
.mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
|
2005-04-16 22:20:36 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
|
|
|
.num_pmcs = 6,
|
2008-08-18 04:23:51 +00:00
|
|
|
.pmc_type = PPC_PMC_G4,
|
2005-12-16 02:02:04 +00:00
|
|
|
.cpu_setup = __setup_cpu_745x,
|
|
|
|
.oprofile_cpu_type = "ppc/7450",
|
2006-01-13 12:35:49 +00:00
|
|
|
.oprofile_type = PPC_OPROFILE_G4,
|
2007-12-21 04:39:21 +00:00
|
|
|
.machine_check = machine_check_generic,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc7450",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
|
|
|
{ /* 7447/7457 Rev 1.2 and later */
|
|
|
|
.pvr_mask = 0xffff0000,
|
|
|
|
.pvr_value = 0x80020000,
|
|
|
|
.cpu_name = "7447/7457",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_7447,
|
2006-06-07 06:14:40 +00:00
|
|
|
.cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
|
2008-12-18 19:13:32 +00:00
|
|
|
.mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
|
2005-04-16 22:20:36 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
|
|
|
.num_pmcs = 6,
|
2008-08-18 04:23:51 +00:00
|
|
|
.pmc_type = PPC_PMC_G4,
|
2005-12-16 02:02:04 +00:00
|
|
|
.cpu_setup = __setup_cpu_745x,
|
|
|
|
.oprofile_cpu_type = "ppc/7450",
|
2006-01-13 12:35:49 +00:00
|
|
|
.oprofile_type = PPC_OPROFILE_G4,
|
2007-12-21 04:39:21 +00:00
|
|
|
.machine_check = machine_check_generic,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc7450",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
|
|
|
{ /* 7447A */
|
|
|
|
.pvr_mask = 0xffff0000,
|
|
|
|
.pvr_value = 0x80030000,
|
|
|
|
.cpu_name = "7447A",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_7447A,
|
2006-06-07 06:14:40 +00:00
|
|
|
.cpu_user_features = COMMON_USER |
|
|
|
|
PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
|
2008-12-18 19:13:32 +00:00
|
|
|
.mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
|
2005-09-03 22:55:55 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
|
|
|
.num_pmcs = 6,
|
2008-08-18 04:23:51 +00:00
|
|
|
.pmc_type = PPC_PMC_G4,
|
2005-12-16 02:02:04 +00:00
|
|
|
.cpu_setup = __setup_cpu_745x,
|
|
|
|
.oprofile_cpu_type = "ppc/7450",
|
2006-01-13 12:35:49 +00:00
|
|
|
.oprofile_type = PPC_OPROFILE_G4,
|
2007-12-21 04:39:21 +00:00
|
|
|
.machine_check = machine_check_generic,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc7450",
|
2005-09-03 22:55:55 +00:00
|
|
|
},
|
|
|
|
{ /* 7448 */
|
|
|
|
.pvr_mask = 0xffff0000,
|
|
|
|
.pvr_value = 0x80040000,
|
|
|
|
.cpu_name = "7448",
|
2007-05-02 21:34:43 +00:00
|
|
|
.cpu_features = CPU_FTRS_7448,
|
2006-06-07 06:14:40 +00:00
|
|
|
.cpu_user_features = COMMON_USER |
|
|
|
|
PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
|
2008-12-18 19:13:32 +00:00
|
|
|
.mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
|
2005-04-16 22:20:36 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
|
|
|
.num_pmcs = 6,
|
2008-08-18 04:23:51 +00:00
|
|
|
.pmc_type = PPC_PMC_G4,
|
2005-12-16 02:02:04 +00:00
|
|
|
.cpu_setup = __setup_cpu_745x,
|
|
|
|
.oprofile_cpu_type = "ppc/7450",
|
2006-01-13 12:35:49 +00:00
|
|
|
.oprofile_type = PPC_OPROFILE_G4,
|
2007-12-21 04:39:21 +00:00
|
|
|
.machine_check = machine_check_generic,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc7450",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
|
|
|
{ /* 82xx (8240, 8245, 8260 are all 603e cores) */
|
|
|
|
.pvr_mask = 0x7fff0000,
|
|
|
|
.pvr_value = 0x00810000,
|
|
|
|
.cpu_name = "82xx",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_82XX,
|
2005-10-12 05:55:09 +00:00
|
|
|
.cpu_user_features = COMMON_USER,
|
2008-12-18 19:13:32 +00:00
|
|
|
.mmu_features = 0,
|
2005-04-16 22:20:36 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
2006-01-13 23:11:39 +00:00
|
|
|
.cpu_setup = __setup_cpu_603,
|
2007-12-21 04:39:21 +00:00
|
|
|
.machine_check = machine_check_generic,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc603",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
|
|
|
{ /* All G2_LE (603e core, plus some) have the same pvr */
|
|
|
|
.pvr_mask = 0x7fff0000,
|
|
|
|
.pvr_value = 0x00820000,
|
|
|
|
.cpu_name = "G2_LE",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_G2_LE,
|
2005-10-12 05:55:09 +00:00
|
|
|
.cpu_user_features = COMMON_USER,
|
2008-12-18 19:13:32 +00:00
|
|
|
.mmu_features = MMU_FTR_USE_HIGH_BATS,
|
2005-04-16 22:20:36 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
2006-01-13 23:11:39 +00:00
|
|
|
.cpu_setup = __setup_cpu_603,
|
2007-12-21 04:39:21 +00:00
|
|
|
.machine_check = machine_check_generic,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc603",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
2006-10-03 01:10:24 +00:00
|
|
|
{ /* e300c1 (a 603e core, plus some) on 83xx */
|
2005-04-16 22:20:36 +00:00
|
|
|
.pvr_mask = 0x7fff0000,
|
|
|
|
.pvr_value = 0x00830000,
|
2006-10-03 01:10:24 +00:00
|
|
|
.cpu_name = "e300c1",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_E300,
|
2005-10-12 05:55:09 +00:00
|
|
|
.cpu_user_features = COMMON_USER,
|
2008-12-18 19:13:32 +00:00
|
|
|
.mmu_features = MMU_FTR_USE_HIGH_BATS,
|
2005-04-16 22:20:36 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
2006-01-13 23:11:39 +00:00
|
|
|
.cpu_setup = __setup_cpu_603,
|
2007-12-21 04:39:21 +00:00
|
|
|
.machine_check = machine_check_generic,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc603",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
2006-10-03 01:10:24 +00:00
|
|
|
{ /* e300c2 (an e300c1 core, plus some, minus FPU) on 83xx */
|
|
|
|
.pvr_mask = 0x7fff0000,
|
|
|
|
.pvr_value = 0x00840000,
|
|
|
|
.cpu_name = "e300c2",
|
2006-12-08 08:43:30 +00:00
|
|
|
.cpu_features = CPU_FTRS_E300C2,
|
2006-10-03 01:10:24 +00:00
|
|
|
.cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
|
2009-03-19 03:55:41 +00:00
|
|
|
.mmu_features = MMU_FTR_USE_HIGH_BATS |
|
|
|
|
MMU_FTR_NEED_DTLB_SW_LRU,
|
2006-10-03 01:10:24 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
|
|
|
.cpu_setup = __setup_cpu_603,
|
2007-12-21 04:39:21 +00:00
|
|
|
.machine_check = machine_check_generic,
|
2006-10-03 01:10:24 +00:00
|
|
|
.platform = "ppc603",
|
|
|
|
},
|
2007-10-19 11:38:42 +00:00
|
|
|
{ /* e300c3 (e300c1, plus one IU, half cache size) on 83xx */
|
2006-12-01 18:57:05 +00:00
|
|
|
.pvr_mask = 0x7fff0000,
|
|
|
|
.pvr_value = 0x00850000,
|
|
|
|
.cpu_name = "e300c3",
|
|
|
|
.cpu_features = CPU_FTRS_E300,
|
|
|
|
.cpu_user_features = COMMON_USER,
|
2009-03-19 03:55:41 +00:00
|
|
|
.mmu_features = MMU_FTR_USE_HIGH_BATS |
|
|
|
|
MMU_FTR_NEED_DTLB_SW_LRU,
|
2006-12-01 18:57:05 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
|
|
|
.cpu_setup = __setup_cpu_603,
|
2015-01-06 11:26:59 +00:00
|
|
|
.machine_check = machine_check_generic,
|
2008-02-05 00:28:07 +00:00
|
|
|
.num_pmcs = 4,
|
|
|
|
.oprofile_cpu_type = "ppc/e300",
|
|
|
|
.oprofile_type = PPC_OPROFILE_FSL_EMB,
|
2006-12-01 18:57:05 +00:00
|
|
|
.platform = "ppc603",
|
|
|
|
},
|
2007-10-19 11:38:42 +00:00
|
|
|
{ /* e300c4 (e300c1, plus one IU) */
|
|
|
|
.pvr_mask = 0x7fff0000,
|
|
|
|
.pvr_value = 0x00860000,
|
|
|
|
.cpu_name = "e300c4",
|
|
|
|
.cpu_features = CPU_FTRS_E300,
|
|
|
|
.cpu_user_features = COMMON_USER,
|
2009-03-19 03:55:41 +00:00
|
|
|
.mmu_features = MMU_FTR_USE_HIGH_BATS |
|
|
|
|
MMU_FTR_NEED_DTLB_SW_LRU,
|
2007-10-19 11:38:42 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
|
|
|
.cpu_setup = __setup_cpu_603,
|
2007-12-21 04:39:21 +00:00
|
|
|
.machine_check = machine_check_generic,
|
2008-02-05 00:28:07 +00:00
|
|
|
.num_pmcs = 4,
|
|
|
|
.oprofile_cpu_type = "ppc/e300",
|
|
|
|
.oprofile_type = PPC_OPROFILE_FSL_EMB,
|
2007-10-19 11:38:42 +00:00
|
|
|
.platform = "ppc603",
|
|
|
|
},
|
2005-04-16 22:20:36 +00:00
|
|
|
{ /* default match, we assume split I/D cache & TB (non-601)... */
|
|
|
|
.pvr_mask = 0x00000000,
|
|
|
|
.pvr_value = 0x00000000,
|
|
|
|
.cpu_name = "(generic PPC)",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_CLASSIC32,
|
2005-10-12 05:55:09 +00:00
|
|
|
.cpu_user_features = COMMON_USER,
|
2008-12-18 19:13:32 +00:00
|
|
|
.mmu_features = MMU_FTR_HPTE_TABLE,
|
2005-04-16 22:20:36 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
2007-12-21 04:39:21 +00:00
|
|
|
.machine_check = machine_check_generic,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc603",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
2014-07-10 02:29:26 +00:00
|
|
|
#endif /* CONFIG_PPC_BOOK3S_32 */
|
2005-04-16 22:20:36 +00:00
|
|
|
#ifdef CONFIG_8xx
|
|
|
|
{ /* 8xx */
|
|
|
|
.pvr_mask = 0xffff0000,
|
|
|
|
.pvr_value = 0x00500000,
|
|
|
|
.cpu_name = "8xx",
|
|
|
|
/* CPU_FTR_MAYBE_CAN_DOZE is possible,
|
|
|
|
* if the 8xx code is there.... */
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_8XX,
|
2005-04-16 22:20:36 +00:00
|
|
|
.cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
|
2008-12-18 19:13:32 +00:00
|
|
|
.mmu_features = MMU_FTR_TYPE_8xx,
|
2005-04-16 22:20:36 +00:00
|
|
|
.icache_bsize = 16,
|
|
|
|
.dcache_bsize = 16,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc823",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
|
|
|
#endif /* CONFIG_8xx */
|
|
|
|
#ifdef CONFIG_40x
|
|
|
|
{ /* 403GC */
|
|
|
|
.pvr_mask = 0xffffff00,
|
|
|
|
.pvr_value = 0x00200200,
|
|
|
|
.cpu_name = "403GC",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_40X,
|
2005-04-16 22:20:36 +00:00
|
|
|
.cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
|
2008-12-18 19:13:32 +00:00
|
|
|
.mmu_features = MMU_FTR_TYPE_40x,
|
2005-04-16 22:20:36 +00:00
|
|
|
.icache_bsize = 16,
|
|
|
|
.dcache_bsize = 16,
|
2007-12-21 04:39:21 +00:00
|
|
|
.machine_check = machine_check_4xx,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc403",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
|
|
|
{ /* 403GCX */
|
|
|
|
.pvr_mask = 0xffffff00,
|
|
|
|
.pvr_value = 0x00201400,
|
|
|
|
.cpu_name = "403GCX",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_40X,
|
2005-10-12 04:22:50 +00:00
|
|
|
.cpu_user_features = PPC_FEATURE_32 |
|
|
|
|
PPC_FEATURE_HAS_MMU | PPC_FEATURE_NO_TB,
|
2008-12-18 19:13:32 +00:00
|
|
|
.mmu_features = MMU_FTR_TYPE_40x,
|
2005-04-16 22:20:36 +00:00
|
|
|
.icache_bsize = 16,
|
|
|
|
.dcache_bsize = 16,
|
2007-12-21 04:39:21 +00:00
|
|
|
.machine_check = machine_check_4xx,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc403",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
|
|
|
{ /* 403G ?? */
|
|
|
|
.pvr_mask = 0xffff0000,
|
|
|
|
.pvr_value = 0x00200000,
|
|
|
|
.cpu_name = "403G ??",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_40X,
|
2005-04-16 22:20:36 +00:00
|
|
|
.cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
|
2008-12-18 19:13:32 +00:00
|
|
|
.mmu_features = MMU_FTR_TYPE_40x,
|
2005-04-16 22:20:36 +00:00
|
|
|
.icache_bsize = 16,
|
|
|
|
.dcache_bsize = 16,
|
2007-12-21 04:39:21 +00:00
|
|
|
.machine_check = machine_check_4xx,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc403",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
|
|
|
{ /* 405GP */
|
|
|
|
.pvr_mask = 0xffff0000,
|
|
|
|
.pvr_value = 0x40110000,
|
|
|
|
.cpu_name = "405GP",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_40X,
|
2005-04-16 22:20:36 +00:00
|
|
|
.cpu_user_features = PPC_FEATURE_32 |
|
|
|
|
PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
|
2008-12-18 19:13:32 +00:00
|
|
|
.mmu_features = MMU_FTR_TYPE_40x,
|
2005-04-16 22:20:36 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
2007-12-21 04:39:21 +00:00
|
|
|
.machine_check = machine_check_4xx,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc405",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
|
|
|
{ /* STB 03xxx */
|
|
|
|
.pvr_mask = 0xffff0000,
|
|
|
|
.pvr_value = 0x40130000,
|
|
|
|
.cpu_name = "STB03xxx",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_40X,
|
2005-04-16 22:20:36 +00:00
|
|
|
.cpu_user_features = PPC_FEATURE_32 |
|
|
|
|
PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
|
2008-12-18 19:13:32 +00:00
|
|
|
.mmu_features = MMU_FTR_TYPE_40x,
|
2005-04-16 22:20:36 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
2007-12-21 04:39:21 +00:00
|
|
|
.machine_check = machine_check_4xx,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc405",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
|
|
|
{ /* STB 04xxx */
|
|
|
|
.pvr_mask = 0xffff0000,
|
|
|
|
.pvr_value = 0x41810000,
|
|
|
|
.cpu_name = "STB04xxx",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_40X,
|
2005-04-16 22:20:36 +00:00
|
|
|
.cpu_user_features = PPC_FEATURE_32 |
|
|
|
|
PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
|
2008-12-18 19:13:32 +00:00
|
|
|
.mmu_features = MMU_FTR_TYPE_40x,
|
2005-04-16 22:20:36 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
2007-12-21 04:39:21 +00:00
|
|
|
.machine_check = machine_check_4xx,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc405",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
|
|
|
{ /* NP405L */
|
|
|
|
.pvr_mask = 0xffff0000,
|
|
|
|
.pvr_value = 0x41610000,
|
|
|
|
.cpu_name = "NP405L",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_40X,
|
2005-04-16 22:20:36 +00:00
|
|
|
.cpu_user_features = PPC_FEATURE_32 |
|
|
|
|
PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
|
2008-12-18 19:13:32 +00:00
|
|
|
.mmu_features = MMU_FTR_TYPE_40x,
|
2005-04-16 22:20:36 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
2007-12-21 04:39:21 +00:00
|
|
|
.machine_check = machine_check_4xx,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc405",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
|
|
|
{ /* NP4GS3 */
|
|
|
|
.pvr_mask = 0xffff0000,
|
|
|
|
.pvr_value = 0x40B10000,
|
|
|
|
.cpu_name = "NP4GS3",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_40X,
|
2005-04-16 22:20:36 +00:00
|
|
|
.cpu_user_features = PPC_FEATURE_32 |
|
|
|
|
PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
|
2008-12-18 19:13:32 +00:00
|
|
|
.mmu_features = MMU_FTR_TYPE_40x,
|
2005-04-16 22:20:36 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
2007-12-21 04:39:21 +00:00
|
|
|
.machine_check = machine_check_4xx,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc405",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
|
|
|
{ /* NP405H */
|
|
|
|
.pvr_mask = 0xffff0000,
|
|
|
|
.pvr_value = 0x41410000,
|
|
|
|
.cpu_name = "NP405H",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_40X,
|
2005-04-16 22:20:36 +00:00
|
|
|
.cpu_user_features = PPC_FEATURE_32 |
|
|
|
|
PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
|
2008-12-18 19:13:32 +00:00
|
|
|
.mmu_features = MMU_FTR_TYPE_40x,
|
2005-04-16 22:20:36 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
2007-12-21 04:39:21 +00:00
|
|
|
.machine_check = machine_check_4xx,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc405",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
|
|
|
{ /* 405GPr */
|
|
|
|
.pvr_mask = 0xffff0000,
|
|
|
|
.pvr_value = 0x50910000,
|
|
|
|
.cpu_name = "405GPr",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_40X,
|
2005-04-16 22:20:36 +00:00
|
|
|
.cpu_user_features = PPC_FEATURE_32 |
|
|
|
|
PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
|
2008-12-18 19:13:32 +00:00
|
|
|
.mmu_features = MMU_FTR_TYPE_40x,
|
2005-04-16 22:20:36 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
2007-12-21 04:39:21 +00:00
|
|
|
.machine_check = machine_check_4xx,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc405",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
|
|
|
{ /* STBx25xx */
|
|
|
|
.pvr_mask = 0xffff0000,
|
|
|
|
.pvr_value = 0x51510000,
|
|
|
|
.cpu_name = "STBx25xx",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_40X,
|
2005-04-16 22:20:36 +00:00
|
|
|
.cpu_user_features = PPC_FEATURE_32 |
|
|
|
|
PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
|
2008-12-18 19:13:32 +00:00
|
|
|
.mmu_features = MMU_FTR_TYPE_40x,
|
2005-04-16 22:20:36 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
2007-12-21 04:39:21 +00:00
|
|
|
.machine_check = machine_check_4xx,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc405",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
|
|
|
{ /* 405LP */
|
|
|
|
.pvr_mask = 0xffff0000,
|
|
|
|
.pvr_value = 0x41F10000,
|
|
|
|
.cpu_name = "405LP",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_40X,
|
2005-04-16 22:20:36 +00:00
|
|
|
.cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
|
2008-12-18 19:13:32 +00:00
|
|
|
.mmu_features = MMU_FTR_TYPE_40x,
|
2005-04-16 22:20:36 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
2007-12-21 04:39:21 +00:00
|
|
|
.machine_check = machine_check_4xx,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc405",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
|
|
|
{ /* Xilinx Virtex-II Pro */
|
2006-01-19 08:13:20 +00:00
|
|
|
.pvr_mask = 0xfffff000,
|
2005-04-16 22:20:36 +00:00
|
|
|
.pvr_value = 0x20010000,
|
|
|
|
.cpu_name = "Virtex-II Pro",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_40X,
|
2005-04-16 22:20:36 +00:00
|
|
|
.cpu_user_features = PPC_FEATURE_32 |
|
|
|
|
PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
|
2008-12-18 19:13:32 +00:00
|
|
|
.mmu_features = MMU_FTR_TYPE_40x,
|
2005-04-16 22:20:36 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
2007-12-21 04:39:21 +00:00
|
|
|
.machine_check = machine_check_4xx,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc405",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
2006-01-19 08:13:20 +00:00
|
|
|
{ /* Xilinx Virtex-4 FX */
|
|
|
|
.pvr_mask = 0xfffff000,
|
|
|
|
.pvr_value = 0x20011000,
|
|
|
|
.cpu_name = "Virtex-4 FX",
|
|
|
|
.cpu_features = CPU_FTRS_40X,
|
|
|
|
.cpu_user_features = PPC_FEATURE_32 |
|
|
|
|
PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
|
2008-12-18 19:13:32 +00:00
|
|
|
.mmu_features = MMU_FTR_TYPE_40x,
|
2006-01-19 08:13:20 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
2007-12-21 04:39:21 +00:00
|
|
|
.machine_check = machine_check_4xx,
|
2006-09-14 19:18:38 +00:00
|
|
|
.platform = "ppc405",
|
2006-01-19 08:13:20 +00:00
|
|
|
},
|
2005-06-07 20:22:09 +00:00
|
|
|
{ /* 405EP */
|
|
|
|
.pvr_mask = 0xffff0000,
|
|
|
|
.pvr_value = 0x51210000,
|
|
|
|
.cpu_name = "405EP",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_40X,
|
2007-10-11 12:08:14 +00:00
|
|
|
.cpu_user_features = PPC_FEATURE_32 |
|
|
|
|
PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
|
2008-12-18 19:13:32 +00:00
|
|
|
.mmu_features = MMU_FTR_TYPE_40x,
|
2007-10-11 12:08:14 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
2007-12-21 04:39:21 +00:00
|
|
|
.machine_check = machine_check_4xx,
|
2007-10-11 12:08:14 +00:00
|
|
|
.platform = "ppc405",
|
|
|
|
},
|
2010-07-09 01:17:16 +00:00
|
|
|
{ /* 405EX Rev. A/B with Security */
|
|
|
|
.pvr_mask = 0xffff000f,
|
|
|
|
.pvr_value = 0x12910007,
|
|
|
|
.cpu_name = "405EX Rev. A/B",
|
2007-10-11 12:08:14 +00:00
|
|
|
.cpu_features = CPU_FTRS_40X,
|
2005-06-07 20:22:09 +00:00
|
|
|
.cpu_user_features = PPC_FEATURE_32 |
|
|
|
|
PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
|
2008-12-18 19:13:32 +00:00
|
|
|
.mmu_features = MMU_FTR_TYPE_40x,
|
2005-06-07 20:22:09 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
2007-12-21 04:39:21 +00:00
|
|
|
.machine_check = machine_check_4xx,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc405",
|
2005-06-07 20:22:09 +00:00
|
|
|
},
|
2010-07-09 01:17:16 +00:00
|
|
|
{ /* 405EX Rev. C without Security */
|
|
|
|
.pvr_mask = 0xffff000f,
|
|
|
|
.pvr_value = 0x1291000d,
|
|
|
|
.cpu_name = "405EX Rev. C",
|
|
|
|
.cpu_features = CPU_FTRS_40X,
|
|
|
|
.cpu_user_features = PPC_FEATURE_32 |
|
|
|
|
PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
|
|
|
|
.mmu_features = MMU_FTR_TYPE_40x,
|
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
|
|
|
.machine_check = machine_check_4xx,
|
|
|
|
.platform = "ppc405",
|
|
|
|
},
|
|
|
|
{ /* 405EX Rev. C with Security */
|
|
|
|
.pvr_mask = 0xffff000f,
|
|
|
|
.pvr_value = 0x1291000f,
|
|
|
|
.cpu_name = "405EX Rev. C",
|
|
|
|
.cpu_features = CPU_FTRS_40X,
|
|
|
|
.cpu_user_features = PPC_FEATURE_32 |
|
|
|
|
PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
|
|
|
|
.mmu_features = MMU_FTR_TYPE_40x,
|
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
|
|
|
.machine_check = machine_check_4xx,
|
|
|
|
.platform = "ppc405",
|
|
|
|
},
|
|
|
|
{ /* 405EX Rev. D without Security */
|
|
|
|
.pvr_mask = 0xffff000f,
|
|
|
|
.pvr_value = 0x12910003,
|
|
|
|
.cpu_name = "405EX Rev. D",
|
|
|
|
.cpu_features = CPU_FTRS_40X,
|
|
|
|
.cpu_user_features = PPC_FEATURE_32 |
|
|
|
|
PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
|
|
|
|
.mmu_features = MMU_FTR_TYPE_40x,
|
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
|
|
|
.machine_check = machine_check_4xx,
|
|
|
|
.platform = "ppc405",
|
|
|
|
},
|
|
|
|
{ /* 405EX Rev. D with Security */
|
|
|
|
.pvr_mask = 0xffff000f,
|
|
|
|
.pvr_value = 0x12910005,
|
|
|
|
.cpu_name = "405EX Rev. D",
|
|
|
|
.cpu_features = CPU_FTRS_40X,
|
|
|
|
.cpu_user_features = PPC_FEATURE_32 |
|
|
|
|
PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
|
|
|
|
.mmu_features = MMU_FTR_TYPE_40x,
|
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
|
|
|
.machine_check = machine_check_4xx,
|
|
|
|
.platform = "ppc405",
|
|
|
|
},
|
|
|
|
{ /* 405EXr Rev. A/B without Security */
|
|
|
|
.pvr_mask = 0xffff000f,
|
|
|
|
.pvr_value = 0x12910001,
|
|
|
|
.cpu_name = "405EXr Rev. A/B",
|
|
|
|
.cpu_features = CPU_FTRS_40X,
|
|
|
|
.cpu_user_features = PPC_FEATURE_32 |
|
|
|
|
PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
|
|
|
|
.mmu_features = MMU_FTR_TYPE_40x,
|
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
|
|
|
.machine_check = machine_check_4xx,
|
|
|
|
.platform = "ppc405",
|
|
|
|
},
|
|
|
|
{ /* 405EXr Rev. C without Security */
|
|
|
|
.pvr_mask = 0xffff000f,
|
|
|
|
.pvr_value = 0x12910009,
|
|
|
|
.cpu_name = "405EXr Rev. C",
|
|
|
|
.cpu_features = CPU_FTRS_40X,
|
|
|
|
.cpu_user_features = PPC_FEATURE_32 |
|
|
|
|
PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
|
|
|
|
.mmu_features = MMU_FTR_TYPE_40x,
|
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
|
|
|
.machine_check = machine_check_4xx,
|
|
|
|
.platform = "ppc405",
|
|
|
|
},
|
|
|
|
{ /* 405EXr Rev. C with Security */
|
|
|
|
.pvr_mask = 0xffff000f,
|
|
|
|
.pvr_value = 0x1291000b,
|
|
|
|
.cpu_name = "405EXr Rev. C",
|
|
|
|
.cpu_features = CPU_FTRS_40X,
|
|
|
|
.cpu_user_features = PPC_FEATURE_32 |
|
|
|
|
PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
|
|
|
|
.mmu_features = MMU_FTR_TYPE_40x,
|
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
|
|
|
.machine_check = machine_check_4xx,
|
|
|
|
.platform = "ppc405",
|
|
|
|
},
|
|
|
|
{ /* 405EXr Rev. D without Security */
|
|
|
|
.pvr_mask = 0xffff000f,
|
2008-01-15 07:09:15 +00:00
|
|
|
.pvr_value = 0x12910000,
|
2010-07-09 01:17:16 +00:00
|
|
|
.cpu_name = "405EXr Rev. D",
|
|
|
|
.cpu_features = CPU_FTRS_40X,
|
|
|
|
.cpu_user_features = PPC_FEATURE_32 |
|
|
|
|
PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
|
|
|
|
.mmu_features = MMU_FTR_TYPE_40x,
|
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
|
|
|
.machine_check = machine_check_4xx,
|
|
|
|
.platform = "ppc405",
|
|
|
|
},
|
|
|
|
{ /* 405EXr Rev. D with Security */
|
|
|
|
.pvr_mask = 0xffff000f,
|
|
|
|
.pvr_value = 0x12910002,
|
|
|
|
.cpu_name = "405EXr Rev. D",
|
2008-01-15 07:09:15 +00:00
|
|
|
.cpu_features = CPU_FTRS_40X,
|
|
|
|
.cpu_user_features = PPC_FEATURE_32 |
|
|
|
|
PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
|
2008-12-18 19:13:32 +00:00
|
|
|
.mmu_features = MMU_FTR_TYPE_40x,
|
2008-01-15 07:09:15 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
|
|
|
.machine_check = machine_check_4xx,
|
|
|
|
.platform = "ppc405",
|
|
|
|
},
|
2008-10-09 12:56:38 +00:00
|
|
|
{
|
|
|
|
/* 405EZ */
|
|
|
|
.pvr_mask = 0xffff0000,
|
|
|
|
.pvr_value = 0x41510000,
|
|
|
|
.cpu_name = "405EZ",
|
|
|
|
.cpu_features = CPU_FTRS_40X,
|
|
|
|
.cpu_user_features = PPC_FEATURE_32 |
|
|
|
|
PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
|
2008-12-18 19:13:32 +00:00
|
|
|
.mmu_features = MMU_FTR_TYPE_40x,
|
2008-10-09 12:56:38 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
|
|
|
.machine_check = machine_check_4xx,
|
|
|
|
.platform = "ppc405",
|
|
|
|
},
|
2011-11-28 21:01:41 +00:00
|
|
|
{ /* APM8018X */
|
|
|
|
.pvr_mask = 0xffff0000,
|
|
|
|
.pvr_value = 0x7ff11432,
|
|
|
|
.cpu_name = "APM8018X",
|
|
|
|
.cpu_features = CPU_FTRS_40X,
|
|
|
|
.cpu_user_features = PPC_FEATURE_32 |
|
|
|
|
PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
|
|
|
|
.mmu_features = MMU_FTR_TYPE_40x,
|
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
|
|
|
.machine_check = machine_check_4xx,
|
|
|
|
.platform = "ppc405",
|
|
|
|
},
|
2008-05-05 05:22:27 +00:00
|
|
|
{ /* default match */
|
|
|
|
.pvr_mask = 0x00000000,
|
|
|
|
.pvr_value = 0x00000000,
|
|
|
|
.cpu_name = "(generic 40x PPC)",
|
|
|
|
.cpu_features = CPU_FTRS_40X,
|
|
|
|
.cpu_user_features = PPC_FEATURE_32 |
|
|
|
|
PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
|
2008-12-18 19:13:32 +00:00
|
|
|
.mmu_features = MMU_FTR_TYPE_40x,
|
2008-05-05 05:22:27 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
|
|
|
.machine_check = machine_check_4xx,
|
|
|
|
.platform = "ppc405",
|
|
|
|
}
|
2005-04-16 22:20:36 +00:00
|
|
|
|
|
|
|
#endif /* CONFIG_40x */
|
|
|
|
#ifdef CONFIG_44x
|
2005-08-01 05:34:52 +00:00
|
|
|
{
|
|
|
|
.pvr_mask = 0xf0000fff,
|
|
|
|
.pvr_value = 0x40000850,
|
2007-10-25 18:16:40 +00:00
|
|
|
.cpu_name = "440GR Rev. A",
|
|
|
|
.cpu_features = CPU_FTRS_44X,
|
|
|
|
.cpu_user_features = COMMON_USER_BOOKE,
|
2008-12-18 19:13:32 +00:00
|
|
|
.mmu_features = MMU_FTR_TYPE_44x,
|
2007-10-25 18:16:40 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
2007-12-21 04:39:21 +00:00
|
|
|
.machine_check = machine_check_4xx,
|
2007-10-25 18:16:40 +00:00
|
|
|
.platform = "ppc440",
|
|
|
|
},
|
|
|
|
{ /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */
|
|
|
|
.pvr_mask = 0xf0000fff,
|
|
|
|
.pvr_value = 0x40000858,
|
2005-08-01 05:34:52 +00:00
|
|
|
.cpu_name = "440EP Rev. A",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_44X,
|
2006-01-13 23:11:39 +00:00
|
|
|
.cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
|
2008-12-18 19:13:32 +00:00
|
|
|
.mmu_features = MMU_FTR_TYPE_44x,
|
2005-08-01 05:34:52 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
2007-09-21 14:46:57 +00:00
|
|
|
.cpu_setup = __setup_cpu_440ep,
|
2007-12-21 04:39:21 +00:00
|
|
|
.machine_check = machine_check_4xx,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc440",
|
2005-08-01 05:34:52 +00:00
|
|
|
},
|
|
|
|
{
|
|
|
|
.pvr_mask = 0xf0000fff,
|
|
|
|
.pvr_value = 0x400008d3,
|
2007-10-25 18:16:40 +00:00
|
|
|
.cpu_name = "440GR Rev. B",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_44X,
|
2006-01-13 23:11:39 +00:00
|
|
|
.cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
|
2008-12-18 19:13:32 +00:00
|
|
|
.mmu_features = MMU_FTR_TYPE_44x,
|
2005-08-01 05:34:52 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
2007-12-21 04:39:21 +00:00
|
|
|
.machine_check = machine_check_4xx,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc440",
|
2005-08-01 05:34:52 +00:00
|
|
|
},
|
2008-01-09 20:25:58 +00:00
|
|
|
{ /* Matches both physical and logical PVR for 440EP (logical pvr = pvr | 0x8) */
|
|
|
|
.pvr_mask = 0xf0000ff7,
|
|
|
|
.pvr_value = 0x400008d4,
|
|
|
|
.cpu_name = "440EP Rev. C",
|
|
|
|
.cpu_features = CPU_FTRS_44X,
|
|
|
|
.cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
|
2008-12-18 19:13:32 +00:00
|
|
|
.mmu_features = MMU_FTR_TYPE_44x,
|
2008-01-09 20:25:58 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
|
|
|
.cpu_setup = __setup_cpu_440ep,
|
|
|
|
.machine_check = machine_check_4xx,
|
|
|
|
.platform = "ppc440",
|
|
|
|
},
|
2007-10-25 18:16:40 +00:00
|
|
|
{ /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */
|
|
|
|
.pvr_mask = 0xf0000fff,
|
|
|
|
.pvr_value = 0x400008db,
|
|
|
|
.cpu_name = "440EP Rev. B",
|
2007-08-29 13:40:30 +00:00
|
|
|
.cpu_features = CPU_FTRS_44X,
|
|
|
|
.cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
|
2008-12-18 19:13:32 +00:00
|
|
|
.mmu_features = MMU_FTR_TYPE_44x,
|
2007-08-29 13:40:30 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
2007-10-25 18:16:40 +00:00
|
|
|
.cpu_setup = __setup_cpu_440ep,
|
2007-12-21 04:39:21 +00:00
|
|
|
.machine_check = machine_check_4xx,
|
2007-09-21 14:46:57 +00:00
|
|
|
.platform = "ppc440",
|
2007-08-29 13:40:30 +00:00
|
|
|
},
|
|
|
|
{ /* 440GRX */
|
|
|
|
.pvr_mask = 0xf0000ffb,
|
2007-10-25 18:16:40 +00:00
|
|
|
.pvr_value = 0x200008D0,
|
2007-08-29 13:40:30 +00:00
|
|
|
.cpu_name = "440GRX",
|
|
|
|
.cpu_features = CPU_FTRS_44X,
|
|
|
|
.cpu_user_features = COMMON_USER_BOOKE,
|
2008-12-18 19:13:32 +00:00
|
|
|
.mmu_features = MMU_FTR_TYPE_44x,
|
2007-08-29 13:40:30 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
2007-09-21 14:50:09 +00:00
|
|
|
.cpu_setup = __setup_cpu_440grx,
|
2007-12-21 16:22:23 +00:00
|
|
|
.machine_check = machine_check_440A,
|
2007-09-21 14:50:09 +00:00
|
|
|
.platform = "ppc440",
|
2007-08-29 13:40:30 +00:00
|
|
|
},
|
2007-10-25 18:16:40 +00:00
|
|
|
{ /* Use logical PVR for 440EPx (logical pvr = pvr | 0x8) */
|
|
|
|
.pvr_mask = 0xf0000ffb,
|
|
|
|
.pvr_value = 0x200008D8,
|
|
|
|
.cpu_name = "440EPX",
|
|
|
|
.cpu_features = CPU_FTRS_44X,
|
|
|
|
.cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
|
2008-12-18 19:13:32 +00:00
|
|
|
.mmu_features = MMU_FTR_TYPE_44x,
|
2007-10-25 18:16:40 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
|
|
|
.cpu_setup = __setup_cpu_440epx,
|
2007-12-21 04:39:21 +00:00
|
|
|
.machine_check = machine_check_440A,
|
2007-10-25 18:16:40 +00:00
|
|
|
.platform = "ppc440",
|
|
|
|
},
|
2005-10-12 05:55:09 +00:00
|
|
|
{ /* 440GP Rev. B */
|
2005-04-16 22:20:36 +00:00
|
|
|
.pvr_mask = 0xf0000fff,
|
|
|
|
.pvr_value = 0x40000440,
|
|
|
|
.cpu_name = "440GP Rev. B",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_44X,
|
2006-01-13 23:11:39 +00:00
|
|
|
.cpu_user_features = COMMON_USER_BOOKE,
|
2008-12-18 19:13:32 +00:00
|
|
|
.mmu_features = MMU_FTR_TYPE_44x,
|
2005-04-16 22:20:36 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
2007-12-21 04:39:21 +00:00
|
|
|
.machine_check = machine_check_4xx,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc440gp",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
2005-10-12 05:55:09 +00:00
|
|
|
{ /* 440GP Rev. C */
|
2005-04-16 22:20:36 +00:00
|
|
|
.pvr_mask = 0xf0000fff,
|
|
|
|
.pvr_value = 0x40000481,
|
|
|
|
.cpu_name = "440GP Rev. C",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_44X,
|
2006-01-13 23:11:39 +00:00
|
|
|
.cpu_user_features = COMMON_USER_BOOKE,
|
2008-12-18 19:13:32 +00:00
|
|
|
.mmu_features = MMU_FTR_TYPE_44x,
|
2005-04-16 22:20:36 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
2007-12-21 04:39:21 +00:00
|
|
|
.machine_check = machine_check_4xx,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc440gp",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
|
|
|
{ /* 440GX Rev. A */
|
|
|
|
.pvr_mask = 0xf0000fff,
|
|
|
|
.pvr_value = 0x50000850,
|
|
|
|
.cpu_name = "440GX Rev. A",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_44X,
|
2006-01-13 23:11:39 +00:00
|
|
|
.cpu_user_features = COMMON_USER_BOOKE,
|
2008-12-18 19:13:32 +00:00
|
|
|
.mmu_features = MMU_FTR_TYPE_44x,
|
2005-04-16 22:20:36 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
2007-12-21 04:39:21 +00:00
|
|
|
.cpu_setup = __setup_cpu_440gx,
|
|
|
|
.machine_check = machine_check_440A,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc440",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
|
|
|
{ /* 440GX Rev. B */
|
|
|
|
.pvr_mask = 0xf0000fff,
|
|
|
|
.pvr_value = 0x50000851,
|
|
|
|
.cpu_name = "440GX Rev. B",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_44X,
|
2006-01-13 23:11:39 +00:00
|
|
|
.cpu_user_features = COMMON_USER_BOOKE,
|
2008-12-18 19:13:32 +00:00
|
|
|
.mmu_features = MMU_FTR_TYPE_44x,
|
2005-04-16 22:20:36 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
2007-12-21 04:39:21 +00:00
|
|
|
.cpu_setup = __setup_cpu_440gx,
|
|
|
|
.machine_check = machine_check_440A,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc440",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
|
|
|
{ /* 440GX Rev. C */
|
|
|
|
.pvr_mask = 0xf0000fff,
|
|
|
|
.pvr_value = 0x50000892,
|
|
|
|
.cpu_name = "440GX Rev. C",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_44X,
|
2006-01-13 23:11:39 +00:00
|
|
|
.cpu_user_features = COMMON_USER_BOOKE,
|
2008-12-18 19:13:32 +00:00
|
|
|
.mmu_features = MMU_FTR_TYPE_44x,
|
2005-04-16 22:20:36 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
2007-12-21 04:39:21 +00:00
|
|
|
.cpu_setup = __setup_cpu_440gx,
|
|
|
|
.machine_check = machine_check_440A,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc440",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
2005-09-03 22:55:40 +00:00
|
|
|
{ /* 440GX Rev. F */
|
|
|
|
.pvr_mask = 0xf0000fff,
|
|
|
|
.pvr_value = 0x50000894,
|
|
|
|
.cpu_name = "440GX Rev. F",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_44X,
|
2006-01-13 23:11:39 +00:00
|
|
|
.cpu_user_features = COMMON_USER_BOOKE,
|
2008-12-18 19:13:32 +00:00
|
|
|
.mmu_features = MMU_FTR_TYPE_44x,
|
2005-09-03 22:55:40 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
2007-12-21 04:39:21 +00:00
|
|
|
.cpu_setup = __setup_cpu_440gx,
|
|
|
|
.machine_check = machine_check_440A,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc440",
|
2005-09-03 22:55:40 +00:00
|
|
|
},
|
2005-09-03 22:55:42 +00:00
|
|
|
{ /* 440SP Rev. A */
|
2007-06-15 19:36:32 +00:00
|
|
|
.pvr_mask = 0xfff00fff,
|
|
|
|
.pvr_value = 0x53200891,
|
2005-09-03 22:55:42 +00:00
|
|
|
.cpu_name = "440SP Rev. A",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_44X,
|
2006-01-13 23:11:39 +00:00
|
|
|
.cpu_user_features = COMMON_USER_BOOKE,
|
2008-12-18 19:13:32 +00:00
|
|
|
.mmu_features = MMU_FTR_TYPE_44x,
|
2005-09-03 22:55:42 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
2007-12-21 04:39:21 +00:00
|
|
|
.machine_check = machine_check_4xx,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc440",
|
2005-09-03 22:55:42 +00:00
|
|
|
},
|
2005-11-07 08:58:13 +00:00
|
|
|
{ /* 440SPe Rev. A */
|
2007-06-15 19:36:32 +00:00
|
|
|
.pvr_mask = 0xfff00fff,
|
|
|
|
.pvr_value = 0x53400890,
|
|
|
|
.cpu_name = "440SPe Rev. A",
|
|
|
|
.cpu_features = CPU_FTRS_44X,
|
|
|
|
.cpu_user_features = COMMON_USER_BOOKE,
|
2008-12-18 19:13:32 +00:00
|
|
|
.mmu_features = MMU_FTR_TYPE_44x,
|
2007-06-15 19:36:32 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
2007-12-21 04:39:21 +00:00
|
|
|
.cpu_setup = __setup_cpu_440spe,
|
|
|
|
.machine_check = machine_check_440A,
|
2007-06-15 19:36:32 +00:00
|
|
|
.platform = "ppc440",
|
|
|
|
},
|
|
|
|
{ /* 440SPe Rev. B */
|
|
|
|
.pvr_mask = 0xfff00fff,
|
|
|
|
.pvr_value = 0x53400891,
|
|
|
|
.cpu_name = "440SPe Rev. B",
|
2006-12-08 08:34:38 +00:00
|
|
|
.cpu_features = CPU_FTRS_44X,
|
2006-01-13 23:11:39 +00:00
|
|
|
.cpu_user_features = COMMON_USER_BOOKE,
|
2008-12-18 19:13:32 +00:00
|
|
|
.mmu_features = MMU_FTR_TYPE_44x,
|
2005-11-07 08:58:13 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
2007-12-21 04:39:21 +00:00
|
|
|
.cpu_setup = __setup_cpu_440spe,
|
|
|
|
.machine_check = machine_check_440A,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc440",
|
2005-11-07 08:58:13 +00:00
|
|
|
},
|
2008-07-01 16:42:07 +00:00
|
|
|
{ /* 440 in Xilinx Virtex-5 FXT */
|
|
|
|
.pvr_mask = 0xfffffff0,
|
|
|
|
.pvr_value = 0x7ff21910,
|
|
|
|
.cpu_name = "440 in Virtex-5 FXT",
|
|
|
|
.cpu_features = CPU_FTRS_44X,
|
|
|
|
.cpu_user_features = COMMON_USER_BOOKE,
|
2008-12-18 19:13:32 +00:00
|
|
|
.mmu_features = MMU_FTR_TYPE_44x,
|
2008-07-01 16:42:07 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
2008-12-04 05:39:55 +00:00
|
|
|
.cpu_setup = __setup_cpu_440x5,
|
|
|
|
.machine_check = machine_check_440A,
|
2008-07-01 16:42:07 +00:00
|
|
|
.platform = "ppc440",
|
|
|
|
},
|
2008-02-23 21:07:41 +00:00
|
|
|
{ /* 460EX */
|
2009-07-29 07:04:46 +00:00
|
|
|
.pvr_mask = 0xffff0006,
|
2008-02-23 21:07:41 +00:00
|
|
|
.pvr_value = 0x13020002,
|
|
|
|
.cpu_name = "460EX",
|
2008-12-18 19:13:22 +00:00
|
|
|
.cpu_features = CPU_FTRS_440x6,
|
2008-02-23 21:07:41 +00:00
|
|
|
.cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
|
2008-12-18 19:13:32 +00:00
|
|
|
.mmu_features = MMU_FTR_TYPE_44x,
|
2008-02-23 21:07:41 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
|
|
|
.cpu_setup = __setup_cpu_460ex,
|
|
|
|
.machine_check = machine_check_440A,
|
|
|
|
.platform = "ppc440",
|
|
|
|
},
|
2009-07-29 07:04:46 +00:00
|
|
|
{ /* 460EX Rev B */
|
|
|
|
.pvr_mask = 0xffff0007,
|
|
|
|
.pvr_value = 0x13020004,
|
|
|
|
.cpu_name = "460EX Rev. B",
|
|
|
|
.cpu_features = CPU_FTRS_440x6,
|
|
|
|
.cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
|
|
|
|
.mmu_features = MMU_FTR_TYPE_44x,
|
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
|
|
|
.cpu_setup = __setup_cpu_460ex,
|
|
|
|
.machine_check = machine_check_440A,
|
|
|
|
.platform = "ppc440",
|
|
|
|
},
|
2008-02-23 21:07:41 +00:00
|
|
|
{ /* 460GT */
|
2009-07-29 07:04:46 +00:00
|
|
|
.pvr_mask = 0xffff0006,
|
2008-02-23 21:07:41 +00:00
|
|
|
.pvr_value = 0x13020000,
|
|
|
|
.cpu_name = "460GT",
|
2008-12-18 19:13:22 +00:00
|
|
|
.cpu_features = CPU_FTRS_440x6,
|
2008-06-11 11:52:40 +00:00
|
|
|
.cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
|
2008-12-18 19:13:32 +00:00
|
|
|
.mmu_features = MMU_FTR_TYPE_44x,
|
2008-02-23 21:07:41 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
2008-06-11 11:52:40 +00:00
|
|
|
.cpu_setup = __setup_cpu_460gt,
|
2008-02-23 21:07:41 +00:00
|
|
|
.machine_check = machine_check_440A,
|
|
|
|
.platform = "ppc440",
|
|
|
|
},
|
2009-07-29 07:04:46 +00:00
|
|
|
{ /* 460GT Rev B */
|
|
|
|
.pvr_mask = 0xffff0007,
|
|
|
|
.pvr_value = 0x13020005,
|
|
|
|
.cpu_name = "460GT Rev. B",
|
|
|
|
.cpu_features = CPU_FTRS_440x6,
|
|
|
|
.cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
|
|
|
|
.mmu_features = MMU_FTR_TYPE_44x,
|
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
|
|
|
.cpu_setup = __setup_cpu_460gt,
|
|
|
|
.machine_check = machine_check_440A,
|
|
|
|
.platform = "ppc440",
|
|
|
|
},
|
2009-02-05 13:31:36 +00:00
|
|
|
{ /* 460SX */
|
|
|
|
.pvr_mask = 0xffffff00,
|
|
|
|
.pvr_value = 0x13541800,
|
|
|
|
.cpu_name = "460SX",
|
|
|
|
.cpu_features = CPU_FTRS_44X,
|
|
|
|
.cpu_user_features = COMMON_USER_BOOKE,
|
|
|
|
.mmu_features = MMU_FTR_TYPE_44x,
|
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
|
|
|
.cpu_setup = __setup_cpu_460sx,
|
|
|
|
.machine_check = machine_check_440A,
|
|
|
|
.platform = "ppc440",
|
|
|
|
},
|
2010-09-13 13:26:11 +00:00
|
|
|
{ /* 464 in APM821xx */
|
2011-12-20 02:43:34 +00:00
|
|
|
.pvr_mask = 0xfffffff0,
|
2010-09-13 13:26:11 +00:00
|
|
|
.pvr_value = 0x12C41C80,
|
|
|
|
.cpu_name = "APM821XX",
|
|
|
|
.cpu_features = CPU_FTRS_44X,
|
|
|
|
.cpu_user_features = COMMON_USER_BOOKE |
|
|
|
|
PPC_FEATURE_HAS_FPU,
|
|
|
|
.mmu_features = MMU_FTR_TYPE_44x,
|
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
|
|
|
.cpu_setup = __setup_cpu_apm821xx,
|
|
|
|
.machine_check = machine_check_440A,
|
|
|
|
.platform = "ppc440",
|
|
|
|
},
|
2011-01-26 06:17:58 +00:00
|
|
|
{ /* 476 DD2 core */
|
|
|
|
.pvr_mask = 0xffffffff,
|
|
|
|
.pvr_value = 0x11a52080,
|
2010-03-05 10:43:12 +00:00
|
|
|
.cpu_name = "476",
|
2011-01-26 06:17:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_47X | CPU_FTR_476_DD2,
|
2010-03-05 10:43:12 +00:00
|
|
|
.cpu_user_features = COMMON_USER_BOOKE |
|
2011-11-30 21:39:23 +00:00
|
|
|
PPC_FEATURE_HAS_FPU,
|
|
|
|
.mmu_features = MMU_FTR_TYPE_47x |
|
|
|
|
MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
|
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 128,
|
|
|
|
.machine_check = machine_check_47x,
|
|
|
|
.platform = "ppc470",
|
|
|
|
},
|
|
|
|
{ /* 476fpe */
|
|
|
|
.pvr_mask = 0xffff0000,
|
|
|
|
.pvr_value = 0x7ff50000,
|
|
|
|
.cpu_name = "476fpe",
|
|
|
|
.cpu_features = CPU_FTRS_47X | CPU_FTR_476_DD2,
|
|
|
|
.cpu_user_features = COMMON_USER_BOOKE |
|
2010-03-05 10:43:12 +00:00
|
|
|
PPC_FEATURE_HAS_FPU,
|
|
|
|
.mmu_features = MMU_FTR_TYPE_47x |
|
|
|
|
MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
|
2010-03-05 10:45:54 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 128,
|
|
|
|
.machine_check = machine_check_47x,
|
|
|
|
.platform = "ppc470",
|
|
|
|
},
|
|
|
|
{ /* 476 iss */
|
|
|
|
.pvr_mask = 0xffff0000,
|
|
|
|
.pvr_value = 0x00050000,
|
|
|
|
.cpu_name = "476",
|
|
|
|
.cpu_features = CPU_FTRS_47X,
|
|
|
|
.cpu_user_features = COMMON_USER_BOOKE |
|
|
|
|
PPC_FEATURE_HAS_FPU,
|
|
|
|
.mmu_features = MMU_FTR_TYPE_47x |
|
|
|
|
MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
|
2010-03-05 10:43:12 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 128,
|
2010-03-05 03:43:18 +00:00
|
|
|
.machine_check = machine_check_47x,
|
2010-03-05 10:43:12 +00:00
|
|
|
.platform = "ppc470",
|
|
|
|
},
|
2011-01-26 06:17:58 +00:00
|
|
|
{ /* 476 others */
|
|
|
|
.pvr_mask = 0xffff0000,
|
|
|
|
.pvr_value = 0x11a50000,
|
|
|
|
.cpu_name = "476",
|
|
|
|
.cpu_features = CPU_FTRS_47X,
|
|
|
|
.cpu_user_features = COMMON_USER_BOOKE |
|
|
|
|
PPC_FEATURE_HAS_FPU,
|
|
|
|
.mmu_features = MMU_FTR_TYPE_47x |
|
|
|
|
MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
|
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 128,
|
|
|
|
.machine_check = machine_check_47x,
|
|
|
|
.platform = "ppc470",
|
|
|
|
},
|
2008-05-05 05:22:27 +00:00
|
|
|
{ /* default match */
|
|
|
|
.pvr_mask = 0x00000000,
|
|
|
|
.pvr_value = 0x00000000,
|
|
|
|
.cpu_name = "(generic 44x PPC)",
|
|
|
|
.cpu_features = CPU_FTRS_44X,
|
|
|
|
.cpu_user_features = COMMON_USER_BOOKE,
|
2008-12-18 19:13:32 +00:00
|
|
|
.mmu_features = MMU_FTR_TYPE_44x,
|
2008-05-05 05:22:27 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
|
|
|
.machine_check = machine_check_4xx,
|
|
|
|
.platform = "ppc440",
|
|
|
|
}
|
2005-04-16 22:20:36 +00:00
|
|
|
#endif /* CONFIG_44x */
|
2007-12-24 14:44:47 +00:00
|
|
|
#ifdef CONFIG_E200
|
2005-10-12 05:55:09 +00:00
|
|
|
{ /* e200z5 */
|
2005-06-25 21:54:37 +00:00
|
|
|
.pvr_mask = 0xfff00000,
|
|
|
|
.pvr_value = 0x81000000,
|
|
|
|
.cpu_name = "e200z5",
|
|
|
|
/* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_E200,
|
2006-01-13 23:11:39 +00:00
|
|
|
.cpu_user_features = COMMON_USER_BOOKE |
|
|
|
|
PPC_FEATURE_HAS_EFP_SINGLE |
|
2005-06-25 21:54:37 +00:00
|
|
|
PPC_FEATURE_UNIFIED_CACHE,
|
2008-12-18 19:13:32 +00:00
|
|
|
.mmu_features = MMU_FTR_TYPE_FSL_E,
|
2005-06-25 21:54:37 +00:00
|
|
|
.dcache_bsize = 32,
|
2007-12-21 04:39:21 +00:00
|
|
|
.machine_check = machine_check_e200,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc5554",
|
2005-06-25 21:54:37 +00:00
|
|
|
},
|
2005-10-12 05:55:09 +00:00
|
|
|
{ /* e200z6 */
|
2005-06-25 21:54:37 +00:00
|
|
|
.pvr_mask = 0xfff00000,
|
|
|
|
.pvr_value = 0x81100000,
|
|
|
|
.cpu_name = "e200z6",
|
|
|
|
/* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_E200,
|
2006-01-13 23:11:39 +00:00
|
|
|
.cpu_user_features = COMMON_USER_BOOKE |
|
2007-09-13 06:44:20 +00:00
|
|
|
PPC_FEATURE_HAS_SPE_COMP |
|
|
|
|
PPC_FEATURE_HAS_EFP_SINGLE_COMP |
|
2005-06-25 21:54:37 +00:00
|
|
|
PPC_FEATURE_UNIFIED_CACHE,
|
2008-12-18 19:13:32 +00:00
|
|
|
.mmu_features = MMU_FTR_TYPE_FSL_E,
|
2005-06-25 21:54:37 +00:00
|
|
|
.dcache_bsize = 32,
|
2007-12-21 04:39:21 +00:00
|
|
|
.machine_check = machine_check_e200,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc5554",
|
2005-06-25 21:54:37 +00:00
|
|
|
},
|
2008-05-05 05:22:27 +00:00
|
|
|
{ /* default match */
|
|
|
|
.pvr_mask = 0x00000000,
|
|
|
|
.pvr_value = 0x00000000,
|
|
|
|
.cpu_name = "(generic E200 PPC)",
|
|
|
|
.cpu_features = CPU_FTRS_E200,
|
|
|
|
.cpu_user_features = COMMON_USER_BOOKE |
|
|
|
|
PPC_FEATURE_HAS_EFP_SINGLE |
|
|
|
|
PPC_FEATURE_UNIFIED_CACHE,
|
2008-12-18 19:13:32 +00:00
|
|
|
.mmu_features = MMU_FTR_TYPE_FSL_E,
|
2008-05-05 05:22:27 +00:00
|
|
|
.dcache_bsize = 32,
|
2009-01-08 14:31:20 +00:00
|
|
|
.cpu_setup = __setup_cpu_e200,
|
2008-05-05 05:22:27 +00:00
|
|
|
.machine_check = machine_check_e200,
|
|
|
|
.platform = "ppc5554",
|
2008-05-12 04:20:35 +00:00
|
|
|
}
|
2008-05-05 05:22:27 +00:00
|
|
|
#endif /* CONFIG_E200 */
|
2010-10-08 13:32:11 +00:00
|
|
|
#endif /* CONFIG_PPC32 */
|
2008-05-05 05:22:27 +00:00
|
|
|
#ifdef CONFIG_E500
|
2010-10-08 13:32:11 +00:00
|
|
|
#ifdef CONFIG_PPC32
|
2014-08-20 13:09:03 +00:00
|
|
|
#ifndef CONFIG_PPC_E500MC
|
2005-10-12 05:55:09 +00:00
|
|
|
{ /* e500 */
|
2005-04-16 22:20:36 +00:00
|
|
|
.pvr_mask = 0xffff0000,
|
|
|
|
.pvr_value = 0x80200000,
|
|
|
|
.cpu_name = "e500",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_E500,
|
2006-01-13 23:11:39 +00:00
|
|
|
.cpu_user_features = COMMON_USER_BOOKE |
|
2007-09-13 06:44:20 +00:00
|
|
|
PPC_FEATURE_HAS_SPE_COMP |
|
|
|
|
PPC_FEATURE_HAS_EFP_SINGLE_COMP,
|
2013-05-04 16:01:17 +00:00
|
|
|
.cpu_user_features2 = PPC_FEATURE2_ISEL,
|
2008-12-18 19:13:32 +00:00
|
|
|
.mmu_features = MMU_FTR_TYPE_FSL_E,
|
2005-04-16 22:20:36 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
|
|
|
.num_pmcs = 4,
|
2005-12-16 02:02:04 +00:00
|
|
|
.oprofile_cpu_type = "ppc/e500",
|
2008-02-05 00:27:55 +00:00
|
|
|
.oprofile_type = PPC_OPROFILE_FSL_EMB,
|
2009-01-08 14:31:20 +00:00
|
|
|
.cpu_setup = __setup_cpu_e500v1,
|
2007-12-21 04:39:21 +00:00
|
|
|
.machine_check = machine_check_e500,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc8540",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
2005-10-12 05:55:09 +00:00
|
|
|
{ /* e500v2 */
|
2005-06-22 00:15:18 +00:00
|
|
|
.pvr_mask = 0xffff0000,
|
|
|
|
.pvr_value = 0x80210000,
|
|
|
|
.cpu_name = "e500v2",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_E500_2,
|
2006-01-13 23:11:39 +00:00
|
|
|
.cpu_user_features = COMMON_USER_BOOKE |
|
2007-09-13 06:44:20 +00:00
|
|
|
PPC_FEATURE_HAS_SPE_COMP |
|
|
|
|
PPC_FEATURE_HAS_EFP_SINGLE_COMP |
|
|
|
|
PPC_FEATURE_HAS_EFP_DOUBLE_COMP,
|
2013-05-04 16:01:17 +00:00
|
|
|
.cpu_user_features2 = PPC_FEATURE2_ISEL,
|
2008-12-18 19:13:32 +00:00
|
|
|
.mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS,
|
2005-06-22 00:15:18 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
|
|
|
.num_pmcs = 4,
|
2005-12-16 02:02:04 +00:00
|
|
|
.oprofile_cpu_type = "ppc/e500",
|
2008-02-05 00:27:55 +00:00
|
|
|
.oprofile_type = PPC_OPROFILE_FSL_EMB,
|
2009-01-08 14:31:20 +00:00
|
|
|
.cpu_setup = __setup_cpu_e500v2,
|
2007-12-21 04:39:21 +00:00
|
|
|
.machine_check = machine_check_e500,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc8548",
|
2015-11-20 09:13:58 +00:00
|
|
|
.cpu_down_flush = cpu_down_flush_e500v2,
|
2005-06-22 00:15:18 +00:00
|
|
|
},
|
2014-08-20 13:09:03 +00:00
|
|
|
#else
|
2008-06-16 14:41:32 +00:00
|
|
|
{ /* e500mc */
|
|
|
|
.pvr_mask = 0xffff0000,
|
|
|
|
.pvr_value = 0x80230000,
|
|
|
|
.cpu_name = "e500mc",
|
|
|
|
.cpu_features = CPU_FTRS_E500MC,
|
|
|
|
.cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
|
2013-05-04 16:01:17 +00:00
|
|
|
.cpu_user_features2 = PPC_FEATURE2_ISEL,
|
2009-02-11 04:26:06 +00:00
|
|
|
.mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS |
|
2009-04-23 13:51:22 +00:00
|
|
|
MMU_FTR_USE_TLBILX,
|
2008-06-16 14:41:32 +00:00
|
|
|
.icache_bsize = 64,
|
|
|
|
.dcache_bsize = 64,
|
|
|
|
.num_pmcs = 4,
|
2010-02-26 00:09:45 +00:00
|
|
|
.oprofile_cpu_type = "ppc/e500mc",
|
2008-06-16 14:41:32 +00:00
|
|
|
.oprofile_type = PPC_OPROFILE_FSL_EMB,
|
2009-01-08 14:31:20 +00:00
|
|
|
.cpu_setup = __setup_cpu_e500mc,
|
2010-04-08 05:38:22 +00:00
|
|
|
.machine_check = machine_check_e500mc,
|
2008-06-16 14:41:32 +00:00
|
|
|
.platform = "ppce500mc",
|
2015-11-20 09:13:58 +00:00
|
|
|
.cpu_down_flush = cpu_down_flush_e500mc,
|
2008-06-16 14:41:32 +00:00
|
|
|
},
|
2014-08-20 13:09:03 +00:00
|
|
|
#endif /* CONFIG_PPC_E500MC */
|
2010-10-08 13:32:11 +00:00
|
|
|
#endif /* CONFIG_PPC32 */
|
2014-08-20 13:09:03 +00:00
|
|
|
#ifdef CONFIG_PPC_E500MC
|
2010-10-08 13:32:11 +00:00
|
|
|
{ /* e5500 */
|
|
|
|
.pvr_mask = 0xffff0000,
|
|
|
|
.pvr_value = 0x80240000,
|
|
|
|
.cpu_name = "e5500",
|
2011-04-06 05:11:06 +00:00
|
|
|
.cpu_features = CPU_FTRS_E5500,
|
2011-06-02 16:26:13 +00:00
|
|
|
.cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
|
2013-05-04 16:01:17 +00:00
|
|
|
.cpu_user_features2 = PPC_FEATURE2_ISEL,
|
2010-10-08 13:32:11 +00:00
|
|
|
.mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS |
|
|
|
|
MMU_FTR_USE_TLBILX,
|
|
|
|
.icache_bsize = 64,
|
|
|
|
.dcache_bsize = 64,
|
|
|
|
.num_pmcs = 4,
|
|
|
|
.oprofile_cpu_type = "ppc/e500mc",
|
|
|
|
.oprofile_type = PPC_OPROFILE_FSL_EMB,
|
|
|
|
.cpu_setup = __setup_cpu_e5500,
|
2012-07-09 12:58:21 +00:00
|
|
|
#ifndef CONFIG_PPC32
|
2010-10-08 13:32:11 +00:00
|
|
|
.cpu_restore = __restore_cpu_e5500,
|
2012-07-09 12:58:21 +00:00
|
|
|
#endif
|
2010-10-08 13:32:11 +00:00
|
|
|
.machine_check = machine_check_e500mc,
|
|
|
|
.platform = "ppce5500",
|
2015-11-20 09:13:58 +00:00
|
|
|
.cpu_down_flush = cpu_down_flush_e5500,
|
2010-10-08 13:32:11 +00:00
|
|
|
},
|
2011-11-06 17:51:07 +00:00
|
|
|
{ /* e6500 */
|
|
|
|
.pvr_mask = 0xffff0000,
|
|
|
|
.pvr_value = 0x80400000,
|
|
|
|
.cpu_name = "e6500",
|
|
|
|
.cpu_features = CPU_FTRS_E6500,
|
2012-09-07 20:57:17 +00:00
|
|
|
.cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU |
|
|
|
|
PPC_FEATURE_HAS_ALTIVEC_COMP,
|
2013-05-04 16:01:17 +00:00
|
|
|
.cpu_user_features2 = PPC_FEATURE2_ISEL,
|
2011-11-06 17:51:07 +00:00
|
|
|
.mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS |
|
|
|
|
MMU_FTR_USE_TLBILX,
|
|
|
|
.icache_bsize = 64,
|
|
|
|
.dcache_bsize = 64,
|
2013-06-05 20:22:09 +00:00
|
|
|
.num_pmcs = 6,
|
2011-11-06 17:51:07 +00:00
|
|
|
.oprofile_cpu_type = "ppc/e6500",
|
|
|
|
.oprofile_type = PPC_OPROFILE_FSL_EMB,
|
2012-09-07 20:57:17 +00:00
|
|
|
.cpu_setup = __setup_cpu_e6500,
|
2012-07-09 12:58:21 +00:00
|
|
|
#ifndef CONFIG_PPC32
|
2012-09-07 20:57:17 +00:00
|
|
|
.cpu_restore = __restore_cpu_e6500,
|
2012-07-09 12:58:21 +00:00
|
|
|
#endif
|
2011-11-06 17:51:07 +00:00
|
|
|
.machine_check = machine_check_e500mc,
|
|
|
|
.platform = "ppce6500",
|
2015-11-20 09:13:58 +00:00
|
|
|
.cpu_down_flush = cpu_down_flush_e6500,
|
2011-11-06 17:51:07 +00:00
|
|
|
},
|
2014-08-20 13:09:03 +00:00
|
|
|
#endif /* CONFIG_PPC_E500MC */
|
2010-10-08 13:32:11 +00:00
|
|
|
#ifdef CONFIG_PPC32
|
2005-04-16 22:20:36 +00:00
|
|
|
{ /* default match */
|
|
|
|
.pvr_mask = 0x00000000,
|
|
|
|
.pvr_value = 0x00000000,
|
2008-05-05 05:22:27 +00:00
|
|
|
.cpu_name = "(generic E500 PPC)",
|
|
|
|
.cpu_features = CPU_FTRS_E500,
|
|
|
|
.cpu_user_features = COMMON_USER_BOOKE |
|
|
|
|
PPC_FEATURE_HAS_SPE_COMP |
|
|
|
|
PPC_FEATURE_HAS_EFP_SINGLE_COMP,
|
2008-12-18 19:13:32 +00:00
|
|
|
.mmu_features = MMU_FTR_TYPE_FSL_E,
|
2005-04-16 22:20:36 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
2008-05-05 05:22:27 +00:00
|
|
|
.machine_check = machine_check_e500,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "powerpc",
|
2008-05-12 04:20:35 +00:00
|
|
|
}
|
2005-10-12 05:55:09 +00:00
|
|
|
#endif /* CONFIG_PPC32 */
|
2010-10-08 13:32:11 +00:00
|
|
|
#endif /* CONFIG_E500 */
|
2005-04-16 22:20:36 +00:00
|
|
|
};
|
2006-10-24 06:42:40 +00:00
|
|
|
|
[POWERPC] Fix performance monitor on machines with logical PVR
Some IBM machines supply a "logical" PVR (processor version register)
value in the device tree in the cpu nodes rather than the real PVR.
This is used for instance to indicate that the processors in a POWER6
partition have been configured by the hypervisor to run in POWER5+
mode rather than POWER6 mode. To cope with this, we call identify_cpu
a second time with the logical PVR value (the first call is with the
real PVR value in the very early setup code).
However, POWER5+ machines can also supply a logical PVR value, and use
the same value (the value that indicates a v2.04 architecture
compliant processor). This causes problems for code that uses the
performance monitor (such as oprofile), because the PMU registers are
different in POWER6 (even in POWER5+ mode) from the real POWER5+.
This change works around this problem by taking out the PMU
information from the cputable entries for the logical PVR values, and
changing identify_cpu so that the second call to it won't overwrite
the PMU information that was established by the first call (the one
with the real PVR), but does update the other fields. Specifically,
if the cputable entry for the logical PVR value has num_pmcs == 0,
none of the PMU-related fields get used.
So that we can create a mixed cputable entry, we now make cur_cpu_spec
point to a single static struct cpu_spec, and copy stuff from
cpu_specs[i] into it. This has the side-effect that we can now make
cpu_specs[] be initdata.
Ultimately it would be good to move the PMU-related fields out to a
separate structure, pointed to by the cputable entries, and change
identify_cpu so that it saves the PMU info pointer, copies the whole
structure, and restores the PMU info pointer, rather than identify_cpu
having to list all the fields that are *not* PMU-related.
Signed-off-by: Paul Mackerras <paulus@samba.org>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2007-10-04 04:18:01 +00:00
|
|
|
static struct cpu_spec the_cpu_spec;
|
|
|
|
|
2011-07-25 11:04:36 +00:00
|
|
|
static struct cpu_spec * __init setup_cpu_spec(unsigned long offset,
|
|
|
|
struct cpu_spec *s)
|
2006-10-24 06:42:40 +00:00
|
|
|
{
|
[POWERPC] Fix performance monitor on machines with logical PVR
Some IBM machines supply a "logical" PVR (processor version register)
value in the device tree in the cpu nodes rather than the real PVR.
This is used for instance to indicate that the processors in a POWER6
partition have been configured by the hypervisor to run in POWER5+
mode rather than POWER6 mode. To cope with this, we call identify_cpu
a second time with the logical PVR value (the first call is with the
real PVR value in the very early setup code).
However, POWER5+ machines can also supply a logical PVR value, and use
the same value (the value that indicates a v2.04 architecture
compliant processor). This causes problems for code that uses the
performance monitor (such as oprofile), because the PMU registers are
different in POWER6 (even in POWER5+ mode) from the real POWER5+.
This change works around this problem by taking out the PMU
information from the cputable entries for the logical PVR values, and
changing identify_cpu so that the second call to it won't overwrite
the PMU information that was established by the first call (the one
with the real PVR), but does update the other fields. Specifically,
if the cputable entry for the logical PVR value has num_pmcs == 0,
none of the PMU-related fields get used.
So that we can create a mixed cputable entry, we now make cur_cpu_spec
point to a single static struct cpu_spec, and copy stuff from
cpu_specs[i] into it. This has the side-effect that we can now make
cpu_specs[] be initdata.
Ultimately it would be good to move the PMU-related fields out to a
separate structure, pointed to by the cputable entries, and change
identify_cpu so that it saves the PMU info pointer, copies the whole
structure, and restores the PMU info pointer, rather than identify_cpu
having to list all the fields that are *not* PMU-related.
Signed-off-by: Paul Mackerras <paulus@samba.org>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2007-10-04 04:18:01 +00:00
|
|
|
struct cpu_spec *t = &the_cpu_spec;
|
2009-02-22 16:25:45 +00:00
|
|
|
struct cpu_spec old;
|
|
|
|
|
[POWERPC] Fix performance monitor on machines with logical PVR
Some IBM machines supply a "logical" PVR (processor version register)
value in the device tree in the cpu nodes rather than the real PVR.
This is used for instance to indicate that the processors in a POWER6
partition have been configured by the hypervisor to run in POWER5+
mode rather than POWER6 mode. To cope with this, we call identify_cpu
a second time with the logical PVR value (the first call is with the
real PVR value in the very early setup code).
However, POWER5+ machines can also supply a logical PVR value, and use
the same value (the value that indicates a v2.04 architecture
compliant processor). This causes problems for code that uses the
performance monitor (such as oprofile), because the PMU registers are
different in POWER6 (even in POWER5+ mode) from the real POWER5+.
This change works around this problem by taking out the PMU
information from the cputable entries for the logical PVR values, and
changing identify_cpu so that the second call to it won't overwrite
the PMU information that was established by the first call (the one
with the real PVR), but does update the other fields. Specifically,
if the cputable entry for the logical PVR value has num_pmcs == 0,
none of the PMU-related fields get used.
So that we can create a mixed cputable entry, we now make cur_cpu_spec
point to a single static struct cpu_spec, and copy stuff from
cpu_specs[i] into it. This has the side-effect that we can now make
cpu_specs[] be initdata.
Ultimately it would be good to move the PMU-related fields out to a
separate structure, pointed to by the cputable entries, and change
identify_cpu so that it saves the PMU info pointer, copies the whole
structure, and restores the PMU info pointer, rather than identify_cpu
having to list all the fields that are *not* PMU-related.
Signed-off-by: Paul Mackerras <paulus@samba.org>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2007-10-04 04:18:01 +00:00
|
|
|
t = PTRRELOC(t);
|
2009-02-22 16:25:45 +00:00
|
|
|
old = *t;
|
|
|
|
|
|
|
|
/* Copy everything, then do fixups */
|
|
|
|
*t = *s;
|
2006-10-24 06:42:40 +00:00
|
|
|
|
2009-02-22 16:25:43 +00:00
|
|
|
/*
|
|
|
|
* If we are overriding a previous value derived from the real
|
|
|
|
* PVR with a new value obtained using a logical PVR value,
|
|
|
|
* don't modify the performance monitor fields.
|
|
|
|
*/
|
2009-02-22 16:25:45 +00:00
|
|
|
if (old.num_pmcs && !s->num_pmcs) {
|
|
|
|
t->num_pmcs = old.num_pmcs;
|
|
|
|
t->pmc_type = old.pmc_type;
|
|
|
|
t->oprofile_type = old.oprofile_type;
|
|
|
|
t->oprofile_mmcra_sihv = old.oprofile_mmcra_sihv;
|
|
|
|
t->oprofile_mmcra_sipr = old.oprofile_mmcra_sipr;
|
|
|
|
t->oprofile_mmcra_clear = old.oprofile_mmcra_clear;
|
|
|
|
|
2009-02-22 16:25:43 +00:00
|
|
|
/*
|
|
|
|
* If we have passed through this logic once before and
|
|
|
|
* have pulled the default case because the real PVR was
|
|
|
|
* not found inside cpu_specs[], then we are possibly
|
|
|
|
* running in compatibility mode. In that case, let the
|
|
|
|
* oprofiler know which set of compatibility counters to
|
|
|
|
* pull from by making sure the oprofile_cpu_type string
|
|
|
|
* is set to that of compatibility mode. If the
|
|
|
|
* oprofile_cpu_type already has a value, then we are
|
|
|
|
* possibly overriding a real PVR with a logical one,
|
|
|
|
* and, in that case, keep the current value for
|
|
|
|
* oprofile_cpu_type.
|
|
|
|
*/
|
2009-05-14 18:34:06 +00:00
|
|
|
if (old.oprofile_cpu_type != NULL) {
|
2009-04-29 19:39:38 +00:00
|
|
|
t->oprofile_cpu_type = old.oprofile_cpu_type;
|
|
|
|
t->oprofile_type = old.oprofile_type;
|
2009-04-27 06:17:54 +00:00
|
|
|
}
|
2009-02-22 16:25:45 +00:00
|
|
|
}
|
2009-02-22 16:25:43 +00:00
|
|
|
|
|
|
|
*PTRRELOC(&cur_cpu_spec) = &the_cpu_spec;
|
2008-07-15 23:58:51 +00:00
|
|
|
|
2009-02-22 16:25:43 +00:00
|
|
|
/*
|
|
|
|
* Set the base platform string once; assumes
|
|
|
|
* we're called with real pvr first.
|
|
|
|
*/
|
|
|
|
if (*PTRRELOC(&powerpc_base_platform) == NULL)
|
|
|
|
*PTRRELOC(&powerpc_base_platform) = t->platform;
|
2008-07-15 23:58:51 +00:00
|
|
|
|
2007-09-21 14:44:38 +00:00
|
|
|
#if defined(CONFIG_PPC64) || defined(CONFIG_BOOKE)
|
2009-02-22 16:25:43 +00:00
|
|
|
/* ppc64 and booke expect identify_cpu to also call setup_cpu for
|
|
|
|
* that processor. I will consolidate that at a later time, for now,
|
|
|
|
* just use #ifdef. We also don't need to PTRRELOC the function
|
|
|
|
* pointer on ppc64 and booke as we are running at 0 in real mode
|
|
|
|
* on ppc64 and reloc_offset is always 0 on booke.
|
|
|
|
*/
|
2011-01-20 20:36:03 +00:00
|
|
|
if (t->cpu_setup) {
|
|
|
|
t->cpu_setup(offset, t);
|
2009-02-22 16:25:43 +00:00
|
|
|
}
|
2007-09-21 14:44:38 +00:00
|
|
|
#endif /* CONFIG_PPC64 || CONFIG_BOOKE */
|
2011-07-25 11:04:36 +00:00
|
|
|
|
|
|
|
return t;
|
2009-02-22 16:25:43 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
struct cpu_spec * __init identify_cpu(unsigned long offset, unsigned int pvr)
|
|
|
|
{
|
|
|
|
struct cpu_spec *s = cpu_specs;
|
|
|
|
int i;
|
|
|
|
|
|
|
|
s = PTRRELOC(s);
|
|
|
|
|
|
|
|
for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++) {
|
2011-07-25 11:04:36 +00:00
|
|
|
if ((pvr & s->pvr_mask) == s->pvr_value)
|
|
|
|
return setup_cpu_spec(offset, s);
|
2009-02-22 16:25:43 +00:00
|
|
|
}
|
|
|
|
|
2006-10-24 06:42:40 +00:00
|
|
|
BUG();
|
2009-02-22 16:25:43 +00:00
|
|
|
|
2006-10-24 06:42:40 +00:00
|
|
|
return NULL;
|
|
|
|
}
|
powerpc: Add option to use jump label for cpu_has_feature()
We do binary patching of asm code using CPU features, which is a
one-time operation, done during early boot. However checks of CPU
features in C code are currently done at run time, even though the set
of CPU features can never change after boot.
We can optimise this by using jump labels to implement cpu_has_feature(),
meaning checks in C code are binary patched into a single nop or branch.
For a C sequence along the lines of:
if (cpu_has_feature(FOO))
return 2;
The generated code before is roughly:
ld r9,-27640(r2)
ld r9,0(r9)
lwz r9,32(r9)
cmpwi cr7,r9,0
bge cr7, 1f
li r3,2
blr
1: ...
After (true):
nop
li r3,2
blr
After (false):
b 1f
li r3,2
blr
1: ...
mpe: Rename MAX_CPU_FEATURES as we already have a #define with that
name, and define it simply as a constant, rather than doing tricks with
sizeof and NULL pointers. Rename the array to cpu_feature_keys. Use the
kconfig we added to guard it. Add BUILD_BUG_ON() if the feature is not a
compile time constant. Rewrite the change log.
Signed-off-by: Kevin Hao <haokexin@gmail.com>
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2016-07-23 09:12:41 +00:00
|
|
|
|
|
|
|
#ifdef CONFIG_JUMP_LABEL_FEATURE_CHECKS
|
|
|
|
struct static_key_true cpu_feature_keys[NUM_CPU_FTR_KEYS] = {
|
|
|
|
[0 ... NUM_CPU_FTR_KEYS - 1] = STATIC_KEY_TRUE_INIT
|
|
|
|
};
|
|
|
|
EXPORT_SYMBOL_GPL(cpu_feature_keys);
|
|
|
|
|
|
|
|
void __init cpu_feature_keys_init(void)
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
|
|
|
|
for (i = 0; i < NUM_CPU_FTR_KEYS; i++) {
|
|
|
|
unsigned long f = 1ul << i;
|
|
|
|
|
|
|
|
if (!(cur_cpu_spec->cpu_features & f))
|
|
|
|
static_branch_disable(&cpu_feature_keys[i]);
|
|
|
|
}
|
|
|
|
}
|
2016-07-23 09:12:42 +00:00
|
|
|
|
|
|
|
struct static_key_true mmu_feature_keys[NUM_MMU_FTR_KEYS] = {
|
|
|
|
[0 ... NUM_MMU_FTR_KEYS - 1] = STATIC_KEY_TRUE_INIT
|
|
|
|
};
|
|
|
|
EXPORT_SYMBOL_GPL(mmu_feature_keys);
|
|
|
|
|
|
|
|
void __init mmu_feature_keys_init(void)
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
|
|
|
|
for (i = 0; i < NUM_MMU_FTR_KEYS; i++) {
|
|
|
|
unsigned long f = 1ul << i;
|
|
|
|
|
|
|
|
if (!(cur_cpu_spec->mmu_features & f))
|
|
|
|
static_branch_disable(&mmu_feature_keys[i]);
|
|
|
|
}
|
|
|
|
}
|
powerpc: Add option to use jump label for cpu_has_feature()
We do binary patching of asm code using CPU features, which is a
one-time operation, done during early boot. However checks of CPU
features in C code are currently done at run time, even though the set
of CPU features can never change after boot.
We can optimise this by using jump labels to implement cpu_has_feature(),
meaning checks in C code are binary patched into a single nop or branch.
For a C sequence along the lines of:
if (cpu_has_feature(FOO))
return 2;
The generated code before is roughly:
ld r9,-27640(r2)
ld r9,0(r9)
lwz r9,32(r9)
cmpwi cr7,r9,0
bge cr7, 1f
li r3,2
blr
1: ...
After (true):
nop
li r3,2
blr
After (false):
b 1f
li r3,2
blr
1: ...
mpe: Rename MAX_CPU_FEATURES as we already have a #define with that
name, and define it simply as a constant, rather than doing tricks with
sizeof and NULL pointers. Rename the array to cpu_feature_keys. Use the
kconfig we added to guard it. Add BUILD_BUG_ON() if the feature is not a
compile time constant. Rewrite the change log.
Signed-off-by: Kevin Hao <haokexin@gmail.com>
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2016-07-23 09:12:41 +00:00
|
|
|
#endif
|