2019-05-27 06:55:01 +00:00
|
|
|
// SPDX-License-Identifier: GPL-2.0-or-later
|
2011-05-20 01:20:13 +00:00
|
|
|
/*
|
2013-07-30 21:39:26 +00:00
|
|
|
* Copyright 2010-2011, 2013 Freescale Semiconductor, Inc.
|
2011-05-20 01:20:13 +00:00
|
|
|
*
|
|
|
|
* Author: Roy Zang <tie-fei.zang@freescale.com>
|
|
|
|
*
|
|
|
|
* Description:
|
2014-05-05 18:23:15 +00:00
|
|
|
* P1023 RDB Board Setup
|
2011-05-20 01:20:13 +00:00
|
|
|
*/
|
|
|
|
|
|
|
|
#include <linux/kernel.h>
|
|
|
|
#include <linux/init.h>
|
|
|
|
#include <linux/errno.h>
|
|
|
|
#include <linux/pci.h>
|
|
|
|
#include <linux/delay.h>
|
|
|
|
#include <linux/module.h>
|
|
|
|
#include <linux/fsl_devices.h>
|
|
|
|
#include <linux/of_platform.h>
|
|
|
|
#include <linux/of_device.h>
|
|
|
|
|
|
|
|
#include <asm/time.h>
|
|
|
|
#include <asm/machdep.h>
|
|
|
|
#include <asm/pci-bridge.h>
|
|
|
|
#include <mm/mmu_decl.h>
|
|
|
|
#include <asm/prom.h>
|
|
|
|
#include <asm/udbg.h>
|
|
|
|
#include <asm/mpic.h>
|
2011-12-02 06:27:58 +00:00
|
|
|
#include "smp.h"
|
2011-05-20 01:20:13 +00:00
|
|
|
|
|
|
|
#include <sysdev/fsl_soc.h>
|
|
|
|
#include <sysdev/fsl_pci.h>
|
|
|
|
|
2011-11-24 07:00:10 +00:00
|
|
|
#include "mpc85xx.h"
|
|
|
|
|
2011-05-20 01:20:13 +00:00
|
|
|
/* ************************************************************************
|
|
|
|
*
|
|
|
|
* Setup the architecture
|
|
|
|
*
|
|
|
|
*/
|
2014-05-05 18:23:15 +00:00
|
|
|
static void __init mpc85xx_rdb_setup_arch(void)
|
2011-05-20 01:20:13 +00:00
|
|
|
{
|
|
|
|
struct device_node *np;
|
|
|
|
|
|
|
|
if (ppc_md.progress)
|
2014-05-05 18:23:15 +00:00
|
|
|
ppc_md.progress("p1023_rdb_setup_arch()", 0);
|
2011-05-20 01:20:13 +00:00
|
|
|
|
|
|
|
/* Map BCSR area */
|
|
|
|
np = of_find_node_by_name(NULL, "bcsr");
|
|
|
|
if (np != NULL) {
|
|
|
|
static u8 __iomem *bcsr_regs;
|
|
|
|
|
|
|
|
bcsr_regs = of_iomap(np, 0);
|
|
|
|
of_node_put(np);
|
|
|
|
|
|
|
|
if (!bcsr_regs) {
|
|
|
|
printk(KERN_ERR
|
|
|
|
"BCSR: Failed to map bcsr register space\n");
|
|
|
|
return;
|
|
|
|
} else {
|
|
|
|
#define BCSR15_I2C_BUS0_SEG_CLR 0x07
|
|
|
|
#define BCSR15_I2C_BUS0_SEG2 0x02
|
|
|
|
/*
|
|
|
|
* Note: Accessing exclusively i2c devices.
|
|
|
|
*
|
|
|
|
* The i2c controller selects initially ID EEPROM in the u-boot;
|
|
|
|
* but if menu configuration selects RTC support in the kernel,
|
|
|
|
* the i2c controller switches to select RTC chip in the kernel.
|
|
|
|
*/
|
|
|
|
#ifdef CONFIG_RTC_CLASS
|
|
|
|
/* Enable RTC chip on the segment #2 of i2c */
|
|
|
|
clrbits8(&bcsr_regs[15], BCSR15_I2C_BUS0_SEG_CLR);
|
|
|
|
setbits8(&bcsr_regs[15], BCSR15_I2C_BUS0_SEG2);
|
|
|
|
#endif
|
|
|
|
|
|
|
|
iounmap(bcsr_regs);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
mpc85xx_smp_init();
|
2012-08-28 07:44:08 +00:00
|
|
|
|
|
|
|
fsl_pci_assign_primary();
|
2011-05-20 01:20:13 +00:00
|
|
|
}
|
|
|
|
|
2013-07-30 21:39:26 +00:00
|
|
|
machine_arch_initcall(p1023_rdb, mpc85xx_common_publish_devices);
|
2011-05-20 01:20:13 +00:00
|
|
|
|
2014-05-05 18:23:15 +00:00
|
|
|
static void __init mpc85xx_rdb_pic_init(void)
|
2011-05-20 01:20:13 +00:00
|
|
|
{
|
2011-12-22 10:19:14 +00:00
|
|
|
struct mpic *mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN |
|
2011-12-22 10:19:12 +00:00
|
|
|
MPIC_SINGLE_DEST_CPU,
|
2011-05-20 01:20:13 +00:00
|
|
|
0, 256, " OpenPIC ");
|
|
|
|
|
|
|
|
BUG_ON(mpic == NULL);
|
|
|
|
|
|
|
|
mpic_init(mpic);
|
|
|
|
}
|
|
|
|
|
2013-07-30 21:39:26 +00:00
|
|
|
static int __init p1023_rdb_probe(void)
|
|
|
|
{
|
2016-07-05 05:04:05 +00:00
|
|
|
return of_machine_is_compatible("fsl,P1023RDB");
|
2013-07-30 21:39:26 +00:00
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
define_machine(p1023_rdb) {
|
|
|
|
.name = "P1023 RDB",
|
|
|
|
.probe = p1023_rdb_probe,
|
2014-05-05 18:23:15 +00:00
|
|
|
.setup_arch = mpc85xx_rdb_setup_arch,
|
|
|
|
.init_IRQ = mpc85xx_rdb_pic_init,
|
2013-07-30 21:39:26 +00:00
|
|
|
.get_irq = mpic_get_irq,
|
|
|
|
.calibrate_decr = generic_calibrate_decr,
|
|
|
|
.progress = udbg_progress,
|
|
|
|
#ifdef CONFIG_PCI
|
|
|
|
.pcibios_fixup_bus = fsl_pcibios_fixup_bus,
|
fsl/pci: The new pci suspend/resume implementation
If we do nothing in suspend/resume, some platform PCIe ip-block
can't guarantee the link back to L0 state from sleep, then, when
we read the EP device will hang. Only we send pme turnoff message
in pci controller suspend, and send pme exit message in resume, the
link state will be normal.
When we send pme turnoff message in pci controller suspend, the
links will into l2/l3 ready, then, host cannot communicate with
ep device, but pci-driver will call back EP device to save them
state. So we need to change platform_driver->suspend/resume to
syscore->suspend/resume.
So the new suspend/resume implementation, send pme turnoff message
in suspend, and send pme exit message in resume. And add a PME handler,
to response PME & message interrupt.
Change platform_driver->suspend/resume to syscore->suspend/resume.
pci-driver will call back EP device, to save EP state in
pci_pm_suspend_noirq, so we need to keep the link, until
pci_pm_suspend_noirq finish.
Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2014-03-20 03:19:37 +00:00
|
|
|
.pcibios_fixup_phb = fsl_pcibios_fixup_phb,
|
2013-07-30 21:39:26 +00:00
|
|
|
#endif
|
|
|
|
};
|