2019-05-29 14:18:00 +00:00
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// SPDX-License-Identifier: GPL-2.0-only
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2017-07-11 01:00:26 +00:00
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/*
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* Copyright (C) 2012 Regents of the University of California
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2019-06-28 20:36:21 +00:00
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* Copyright (C) 2019 Western Digital Corporation or its affiliates.
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2021-04-19 00:55:38 +00:00
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* Copyright (C) 2020 FORTH-ICS/CARV
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* Nick Kossifidis <mick@ics.forth.gr>
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2017-07-11 01:00:26 +00:00
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*/
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#include <linux/init.h>
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#include <linux/mm.h>
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#include <linux/memblock.h>
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2018-10-30 22:09:49 +00:00
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#include <linux/initrd.h>
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2017-07-11 01:00:26 +00:00
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#include <linux/swap.h>
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2021-06-02 08:55:16 +00:00
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#include <linux/swiotlb.h>
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2018-01-16 08:37:50 +00:00
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#include <linux/sizes.h>
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2019-02-21 05:55:49 +00:00
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#include <linux/of_fdt.h>
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2021-04-19 00:55:39 +00:00
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#include <linux/of_reserved_mem.h>
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riscv: Fix memblock reservation for device tree blob
This fixes an error with how the FDT blob is reserved in memblock.
An incorrect physical address calculation exposed the FDT header to
unintended corruption, which typically manifested with of_fdt_raw_init()
faulting during late boot after fdt_totalsize() returned a wrong value.
Systems with smaller physical memory sizes more frequently trigger this
issue, as the kernel is more likely to allocate from the DMA32 zone
where bbl places the DTB after the kernel image.
Commit 671f9a3e2e24 ("RISC-V: Setup initial page tables in two stages")
changed the mapping of the DTB to reside in the fixmap area.
Consequently, early_init_fdt_reserve_self() cannot be used anymore in
setup_bootmem() since it relies on __pa() to derive a physical address,
which does not work with dtb_early_va that is no longer a valid kernel
logical address.
The reserved[0x1] region shows the effect of the pointer underflow
resulting from the __pa(initial_boot_params) offset subtraction:
[ 0.000000] MEMBLOCK configuration:
[ 0.000000] memory size = 0x000000001fe00000 reserved size = 0x0000000000a2e514
[ 0.000000] memory.cnt = 0x1
[ 0.000000] memory[0x0] [0x0000000080200000-0x000000009fffffff], 0x000000001fe00000 bytes flags: 0x0
[ 0.000000] reserved.cnt = 0x2
[ 0.000000] reserved[0x0] [0x0000000080200000-0x0000000080c2dfeb], 0x0000000000a2dfec bytes flags: 0x0
[ 0.000000] reserved[0x1] [0xfffffff080100000-0xfffffff080100527], 0x0000000000000528 bytes flags: 0x0
With the fix applied:
[ 0.000000] MEMBLOCK configuration:
[ 0.000000] memory size = 0x000000001fe00000 reserved size = 0x0000000000a2e514
[ 0.000000] memory.cnt = 0x1
[ 0.000000] memory[0x0] [0x0000000080200000-0x000000009fffffff], 0x000000001fe00000 bytes flags: 0x0
[ 0.000000] reserved.cnt = 0x2
[ 0.000000] reserved[0x0] [0x0000000080200000-0x0000000080c2dfeb], 0x0000000000a2dfec bytes flags: 0x0
[ 0.000000] reserved[0x1] [0x0000000080e00000-0x0000000080e00527], 0x0000000000000528 bytes flags: 0x0
Fixes: 671f9a3e2e24 ("RISC-V: Setup initial page tables in two stages")
Signed-off-by: Albert Ou <aou@eecs.berkeley.edu>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>
2019-09-27 23:14:18 +00:00
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#include <linux/libfdt.h>
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2020-03-09 16:55:41 +00:00
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#include <linux/set_memory.h>
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2020-10-31 06:01:12 +00:00
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#include <linux/dma-map-ops.h>
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2021-04-19 00:55:38 +00:00
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#include <linux/crash_dump.h>
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2021-07-30 12:48:41 +00:00
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#include <linux/hugetlb.h>
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2017-07-11 01:00:26 +00:00
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2019-01-07 15:27:01 +00:00
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#include <asm/fixmap.h>
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2017-07-11 01:00:26 +00:00
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#include <asm/tlbflush.h>
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#include <asm/sections.h>
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2020-04-14 04:43:24 +00:00
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#include <asm/soc.h>
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2017-07-11 01:00:26 +00:00
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#include <asm/io.h>
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2020-06-03 23:03:55 +00:00
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#include <asm/ptdump.h>
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2020-11-19 00:38:29 +00:00
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#include <asm/numa.h>
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2017-07-11 01:00:26 +00:00
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2019-10-17 22:00:17 +00:00
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#include "../kernel/head.h"
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2021-06-17 13:53:07 +00:00
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struct kernel_mapping kernel_map __ro_after_init;
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EXPORT_SYMBOL(kernel_map);
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#ifdef CONFIG_XIP_KERNEL
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#define kernel_map (*(struct kernel_mapping *)XIP_FIXUP(&kernel_map))
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#endif
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2021-12-06 10:46:51 +00:00
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#ifdef CONFIG_64BIT
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2022-02-22 17:40:52 +00:00
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u64 satp_mode __ro_after_init = !IS_ENABLED(CONFIG_XIP_KERNEL) ? SATP_MODE_57 : SATP_MODE_39;
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2021-12-06 10:46:51 +00:00
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#else
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2022-01-25 16:00:12 +00:00
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u64 satp_mode __ro_after_init = SATP_MODE_32;
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2021-12-06 10:46:51 +00:00
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#endif
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EXPORT_SYMBOL(satp_mode);
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2022-01-19 03:38:36 +00:00
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bool pgtable_l4_enabled = IS_ENABLED(CONFIG_64BIT) && !IS_ENABLED(CONFIG_XIP_KERNEL);
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2022-01-27 02:48:43 +00:00
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bool pgtable_l5_enabled = IS_ENABLED(CONFIG_64BIT) && !IS_ENABLED(CONFIG_XIP_KERNEL);
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2021-12-06 10:46:51 +00:00
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EXPORT_SYMBOL(pgtable_l4_enabled);
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2022-01-27 02:48:41 +00:00
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EXPORT_SYMBOL(pgtable_l5_enabled);
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2021-12-06 10:46:51 +00:00
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2021-07-21 07:59:35 +00:00
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phys_addr_t phys_ram_base __ro_after_init;
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EXPORT_SYMBOL(phys_ram_base);
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2019-03-26 08:03:47 +00:00
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unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)]
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__page_aligned_bss;
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EXPORT_SYMBOL(empty_zero_page);
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2019-06-07 06:01:29 +00:00
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extern char _start[];
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2020-09-17 22:37:10 +00:00
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#define DTB_EARLY_BASE_VA PGDIR_SIZE
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2021-04-13 06:35:14 +00:00
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void *_dtb_early_va __initdata;
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uintptr_t _dtb_early_pa __initdata;
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2019-06-07 06:01:29 +00:00
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2021-05-16 13:15:56 +00:00
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static phys_addr_t dma32_phys_limit __initdata;
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2020-10-31 06:01:12 +00:00
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2017-07-11 01:00:26 +00:00
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static void __init zone_sizes_init(void)
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{
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2018-01-16 08:37:50 +00:00
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unsigned long max_zone_pfns[MAX_NR_ZONES] = { 0, };
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2017-07-11 01:00:26 +00:00
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2018-06-25 08:49:37 +00:00
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#ifdef CONFIG_ZONE_DMA32
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2020-10-31 06:01:12 +00:00
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max_zone_pfns[ZONE_DMA32] = PFN_DOWN(dma32_phys_limit);
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2018-06-25 08:49:37 +00:00
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#endif
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2018-01-16 08:37:50 +00:00
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max_zone_pfns[ZONE_NORMAL] = max_low_pfn;
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2020-06-03 22:57:10 +00:00
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free_area_init(max_zone_pfns);
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2017-07-11 01:00:26 +00:00
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}
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2020-05-14 11:53:35 +00:00
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#if defined(CONFIG_MMU) && defined(CONFIG_DEBUG_VM)
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2021-12-06 10:46:54 +00:00
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#define LOG2_SZ_1K ilog2(SZ_1K)
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#define LOG2_SZ_1M ilog2(SZ_1M)
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#define LOG2_SZ_1G ilog2(SZ_1G)
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#define LOG2_SZ_1T ilog2(SZ_1T)
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2019-11-18 05:58:34 +00:00
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static inline void print_mlk(char *name, unsigned long b, unsigned long t)
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{
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pr_notice("%12s : 0x%08lx - 0x%08lx (%4ld kB)\n", name, b, t,
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2021-12-06 10:46:54 +00:00
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(((t) - (b)) >> LOG2_SZ_1K));
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2019-11-18 05:58:34 +00:00
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}
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static inline void print_mlm(char *name, unsigned long b, unsigned long t)
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{
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pr_notice("%12s : 0x%08lx - 0x%08lx (%4ld MB)\n", name, b, t,
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2021-12-06 10:46:54 +00:00
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(((t) - (b)) >> LOG2_SZ_1M));
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}
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static inline void print_mlg(char *name, unsigned long b, unsigned long t)
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{
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pr_notice("%12s : 0x%08lx - 0x%08lx (%4ld GB)\n", name, b, t,
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(((t) - (b)) >> LOG2_SZ_1G));
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}
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#ifdef CONFIG_64BIT
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static inline void print_mlt(char *name, unsigned long b, unsigned long t)
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{
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pr_notice("%12s : 0x%08lx - 0x%08lx (%4ld TB)\n", name, b, t,
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(((t) - (b)) >> LOG2_SZ_1T));
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}
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#else
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#define print_mlt(n, b, t) do {} while (0)
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#endif
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static inline void print_ml(char *name, unsigned long b, unsigned long t)
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{
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unsigned long diff = t - b;
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if (IS_ENABLED(CONFIG_64BIT) && (diff >> LOG2_SZ_1T) >= 10)
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print_mlt(name, b, t);
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else if ((diff >> LOG2_SZ_1G) >= 10)
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print_mlg(name, b, t);
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else if ((diff >> LOG2_SZ_1M) >= 10)
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print_mlm(name, b, t);
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else
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print_mlk(name, b, t);
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2019-11-18 05:58:34 +00:00
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}
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2021-03-29 18:22:21 +00:00
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static void __init print_vm_layout(void)
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2019-11-18 05:58:34 +00:00
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{
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pr_notice("Virtual kernel memory layout:\n");
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2021-12-06 10:46:54 +00:00
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print_ml("fixmap", (unsigned long)FIXADDR_START,
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(unsigned long)FIXADDR_TOP);
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print_ml("pci io", (unsigned long)PCI_IO_START,
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(unsigned long)PCI_IO_END);
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print_ml("vmemmap", (unsigned long)VMEMMAP_START,
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(unsigned long)VMEMMAP_END);
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print_ml("vmalloc", (unsigned long)VMALLOC_START,
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(unsigned long)VMALLOC_END);
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2022-08-11 07:41:48 +00:00
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#ifdef CONFIG_64BIT
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print_ml("modules", (unsigned long)MODULES_VADDR,
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(unsigned long)MODULES_END);
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#endif
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2021-12-06 10:46:54 +00:00
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print_ml("lowmem", (unsigned long)PAGE_OFFSET,
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(unsigned long)high_memory);
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2022-01-20 03:23:41 +00:00
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if (IS_ENABLED(CONFIG_64BIT)) {
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2021-12-06 10:46:45 +00:00
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#ifdef CONFIG_KASAN
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2021-12-06 10:46:54 +00:00
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print_ml("kasan", KASAN_SHADOW_START, KASAN_SHADOW_END);
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2021-04-11 16:41:44 +00:00
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#endif
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2022-01-20 03:23:41 +00:00
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2021-12-06 10:46:54 +00:00
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print_ml("kernel", (unsigned long)KERNEL_LINK_ADDR,
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(unsigned long)ADDRESS_SPACE_END);
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2022-01-20 03:23:41 +00:00
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}
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2019-11-18 05:58:34 +00:00
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}
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#else
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static void print_vm_layout(void) { }
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#endif /* CONFIG_DEBUG_VM */
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2017-07-11 01:00:26 +00:00
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void __init mem_init(void)
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{
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#ifdef CONFIG_FLATMEM
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BUG_ON(!mem_map);
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#endif /* CONFIG_FLATMEM */
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2022-03-29 15:27:33 +00:00
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swiotlb_init(max_pfn > PFN_DOWN(dma32_phys_limit), SWIOTLB_VERBOSE);
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2018-10-30 22:09:30 +00:00
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memblock_free_all();
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2017-07-11 01:00:26 +00:00
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2019-11-18 05:58:34 +00:00
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print_vm_layout();
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2017-07-11 01:00:26 +00:00
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}
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2021-12-06 10:46:45 +00:00
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/* Limit the memory size via mem. */
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static phys_addr_t memory_limit;
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2021-06-02 08:55:17 +00:00
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static int __init early_mem(char *p)
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{
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u64 size;
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if (!p)
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return 1;
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size = memparse(p, &p) & PAGE_MASK;
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memory_limit = min_t(u64, size, memory_limit);
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pr_notice("Memory limited to %lldMB\n", (u64)memory_limit >> 20);
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return 0;
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}
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early_param("mem", early_mem);
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2021-05-10 11:42:22 +00:00
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static void __init setup_bootmem(void)
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2019-02-21 05:55:49 +00:00
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{
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2020-01-02 03:12:40 +00:00
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phys_addr_t vmlinux_end = __pa_symbol(&_end);
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2021-12-06 15:03:50 +00:00
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phys_addr_t max_mapped_addr;
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2021-12-06 15:03:52 +00:00
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phys_addr_t phys_ram_end, vmlinux_start;
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2019-02-21 05:55:49 +00:00
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2021-12-06 15:03:52 +00:00
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if (IS_ENABLED(CONFIG_XIP_KERNEL))
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vmlinux_start = __pa_symbol(&_sdata);
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else
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vmlinux_start = __pa_symbol(&_start);
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2021-04-13 06:35:14 +00:00
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2021-06-02 08:55:17 +00:00
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memblock_enforce_memory_limit(memory_limit);
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2019-02-21 05:55:49 +00:00
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2021-04-29 15:05:00 +00:00
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/*
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* Make sure we align the reservation on PMD_SIZE since we will
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2021-04-11 16:41:44 +00:00
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* map the kernel in the linear mapping as read-only: we do not want
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* any allocation to happen between _end and the next pmd aligned page.
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*/
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2021-12-06 15:03:50 +00:00
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if (IS_ENABLED(CONFIG_64BIT) && IS_ENABLED(CONFIG_STRICT_KERNEL_RWX))
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vmlinux_end = (vmlinux_end + PMD_SIZE - 1) & PMD_MASK;
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/*
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* Reserve from the start of the kernel to the end of the kernel
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*/
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2021-04-29 15:05:00 +00:00
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memblock_reserve(vmlinux_start, vmlinux_end - vmlinux_start);
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2019-06-07 06:01:29 +00:00
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2021-07-21 07:59:35 +00:00
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phys_ram_end = memblock_end_of_DRAM();
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2021-12-06 15:03:52 +00:00
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if (!IS_ENABLED(CONFIG_XIP_KERNEL))
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phys_ram_base = memblock_start_of_DRAM();
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2021-01-11 23:45:02 +00:00
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/*
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* memblock allocator is not aware of the fact that last 4K bytes of
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* the addressable memory can not be mapped because of IS_ERR_VALUE
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* macro. Make sure that last 4k bytes are not usable by memblock
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2021-06-29 09:13:48 +00:00
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* if end of dram is equal to maximum addressable memory. For 64-bit
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* kernel, this problem can't happen here as the end of the virtual
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* address space is occupied by the kernel mapping then this check must
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2021-07-26 05:42:54 +00:00
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* be done as soon as the kernel mapping base address is determined.
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2021-01-11 23:45:02 +00:00
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*/
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2021-12-06 15:03:50 +00:00
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if (!IS_ENABLED(CONFIG_64BIT)) {
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max_mapped_addr = __pa(~(ulong)0);
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if (max_mapped_addr == (phys_ram_end - 1))
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memblock_set_current_limit(max_mapped_addr - 4096);
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}
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2021-01-11 23:45:02 +00:00
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2021-07-21 07:59:35 +00:00
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min_low_pfn = PFN_UP(phys_ram_base);
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max_low_pfn = max_pfn = PFN_DOWN(phys_ram_end);
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2022-02-25 12:39:52 +00:00
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high_memory = (void *)(__va(PFN_PHYS(max_low_pfn)));
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2021-02-25 06:54:17 +00:00
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2020-10-31 06:01:12 +00:00
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dma32_phys_limit = min(4UL * SZ_1G, (unsigned long)PFN_PHYS(max_low_pfn));
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2021-01-21 06:31:17 +00:00
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|
|
set_max_mapnr(max_low_pfn - ARCH_PFN_OFFSET);
|
2019-02-21 05:55:49 +00:00
|
|
|
|
2021-01-15 05:46:06 +00:00
|
|
|
reserve_initrd_mem();
|
riscv: Fix memblock reservation for device tree blob
This fixes an error with how the FDT blob is reserved in memblock.
An incorrect physical address calculation exposed the FDT header to
unintended corruption, which typically manifested with of_fdt_raw_init()
faulting during late boot after fdt_totalsize() returned a wrong value.
Systems with smaller physical memory sizes more frequently trigger this
issue, as the kernel is more likely to allocate from the DMA32 zone
where bbl places the DTB after the kernel image.
Commit 671f9a3e2e24 ("RISC-V: Setup initial page tables in two stages")
changed the mapping of the DTB to reside in the fixmap area.
Consequently, early_init_fdt_reserve_self() cannot be used anymore in
setup_bootmem() since it relies on __pa() to derive a physical address,
which does not work with dtb_early_va that is no longer a valid kernel
logical address.
The reserved[0x1] region shows the effect of the pointer underflow
resulting from the __pa(initial_boot_params) offset subtraction:
[ 0.000000] MEMBLOCK configuration:
[ 0.000000] memory size = 0x000000001fe00000 reserved size = 0x0000000000a2e514
[ 0.000000] memory.cnt = 0x1
[ 0.000000] memory[0x0] [0x0000000080200000-0x000000009fffffff], 0x000000001fe00000 bytes flags: 0x0
[ 0.000000] reserved.cnt = 0x2
[ 0.000000] reserved[0x0] [0x0000000080200000-0x0000000080c2dfeb], 0x0000000000a2dfec bytes flags: 0x0
[ 0.000000] reserved[0x1] [0xfffffff080100000-0xfffffff080100527], 0x0000000000000528 bytes flags: 0x0
With the fix applied:
[ 0.000000] MEMBLOCK configuration:
[ 0.000000] memory size = 0x000000001fe00000 reserved size = 0x0000000000a2e514
[ 0.000000] memory.cnt = 0x1
[ 0.000000] memory[0x0] [0x0000000080200000-0x000000009fffffff], 0x000000001fe00000 bytes flags: 0x0
[ 0.000000] reserved.cnt = 0x2
[ 0.000000] reserved[0x0] [0x0000000080200000-0x0000000080c2dfeb], 0x0000000000a2dfec bytes flags: 0x0
[ 0.000000] reserved[0x1] [0x0000000080e00000-0x0000000080e00527], 0x0000000000000528 bytes flags: 0x0
Fixes: 671f9a3e2e24 ("RISC-V: Setup initial page tables in two stages")
Signed-off-by: Albert Ou <aou@eecs.berkeley.edu>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>
2019-09-27 23:14:18 +00:00
|
|
|
/*
|
2021-01-15 23:49:48 +00:00
|
|
|
* If DTB is built in, no need to reserve its memblock.
|
|
|
|
* Otherwise, do reserve it but avoid using
|
|
|
|
* early_init_fdt_reserve_self() since __pa() does
|
riscv: Fix memblock reservation for device tree blob
This fixes an error with how the FDT blob is reserved in memblock.
An incorrect physical address calculation exposed the FDT header to
unintended corruption, which typically manifested with of_fdt_raw_init()
faulting during late boot after fdt_totalsize() returned a wrong value.
Systems with smaller physical memory sizes more frequently trigger this
issue, as the kernel is more likely to allocate from the DMA32 zone
where bbl places the DTB after the kernel image.
Commit 671f9a3e2e24 ("RISC-V: Setup initial page tables in two stages")
changed the mapping of the DTB to reside in the fixmap area.
Consequently, early_init_fdt_reserve_self() cannot be used anymore in
setup_bootmem() since it relies on __pa() to derive a physical address,
which does not work with dtb_early_va that is no longer a valid kernel
logical address.
The reserved[0x1] region shows the effect of the pointer underflow
resulting from the __pa(initial_boot_params) offset subtraction:
[ 0.000000] MEMBLOCK configuration:
[ 0.000000] memory size = 0x000000001fe00000 reserved size = 0x0000000000a2e514
[ 0.000000] memory.cnt = 0x1
[ 0.000000] memory[0x0] [0x0000000080200000-0x000000009fffffff], 0x000000001fe00000 bytes flags: 0x0
[ 0.000000] reserved.cnt = 0x2
[ 0.000000] reserved[0x0] [0x0000000080200000-0x0000000080c2dfeb], 0x0000000000a2dfec bytes flags: 0x0
[ 0.000000] reserved[0x1] [0xfffffff080100000-0xfffffff080100527], 0x0000000000000528 bytes flags: 0x0
With the fix applied:
[ 0.000000] MEMBLOCK configuration:
[ 0.000000] memory size = 0x000000001fe00000 reserved size = 0x0000000000a2e514
[ 0.000000] memory.cnt = 0x1
[ 0.000000] memory[0x0] [0x0000000080200000-0x000000009fffffff], 0x000000001fe00000 bytes flags: 0x0
[ 0.000000] reserved.cnt = 0x2
[ 0.000000] reserved[0x0] [0x0000000080200000-0x0000000080c2dfeb], 0x0000000000a2dfec bytes flags: 0x0
[ 0.000000] reserved[0x1] [0x0000000080e00000-0x0000000080e00527], 0x0000000000000528 bytes flags: 0x0
Fixes: 671f9a3e2e24 ("RISC-V: Setup initial page tables in two stages")
Signed-off-by: Albert Ou <aou@eecs.berkeley.edu>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>
2019-09-27 23:14:18 +00:00
|
|
|
* not work for DTB pointers that are fixmap addresses
|
|
|
|
*/
|
2022-03-22 13:28:39 +00:00
|
|
|
if (!IS_ENABLED(CONFIG_BUILTIN_DTB)) {
|
|
|
|
/*
|
|
|
|
* In case the DTB is not located in a memory region we won't
|
|
|
|
* be able to locate it later on via the linear mapping and
|
|
|
|
* get a segfault when accessing it via __va(dtb_early_pa).
|
|
|
|
* To avoid this situation copy DTB to a memory region.
|
|
|
|
* Note that memblock_phys_alloc will also reserve DTB region.
|
|
|
|
*/
|
|
|
|
if (!memblock_is_memory(dtb_early_pa)) {
|
|
|
|
size_t fdt_size = fdt_totalsize(dtb_early_va);
|
|
|
|
phys_addr_t new_dtb_early_pa = memblock_phys_alloc(fdt_size, PAGE_SIZE);
|
|
|
|
void *new_dtb_early_va = early_memremap(new_dtb_early_pa, fdt_size);
|
|
|
|
|
|
|
|
memcpy(new_dtb_early_va, dtb_early_va, fdt_size);
|
|
|
|
early_memunmap(new_dtb_early_va, fdt_size);
|
|
|
|
_dtb_early_pa = new_dtb_early_pa;
|
|
|
|
} else
|
|
|
|
memblock_reserve(dtb_early_pa, fdt_totalsize(dtb_early_va));
|
|
|
|
}
|
riscv: Fix memblock reservation for device tree blob
This fixes an error with how the FDT blob is reserved in memblock.
An incorrect physical address calculation exposed the FDT header to
unintended corruption, which typically manifested with of_fdt_raw_init()
faulting during late boot after fdt_totalsize() returned a wrong value.
Systems with smaller physical memory sizes more frequently trigger this
issue, as the kernel is more likely to allocate from the DMA32 zone
where bbl places the DTB after the kernel image.
Commit 671f9a3e2e24 ("RISC-V: Setup initial page tables in two stages")
changed the mapping of the DTB to reside in the fixmap area.
Consequently, early_init_fdt_reserve_self() cannot be used anymore in
setup_bootmem() since it relies on __pa() to derive a physical address,
which does not work with dtb_early_va that is no longer a valid kernel
logical address.
The reserved[0x1] region shows the effect of the pointer underflow
resulting from the __pa(initial_boot_params) offset subtraction:
[ 0.000000] MEMBLOCK configuration:
[ 0.000000] memory size = 0x000000001fe00000 reserved size = 0x0000000000a2e514
[ 0.000000] memory.cnt = 0x1
[ 0.000000] memory[0x0] [0x0000000080200000-0x000000009fffffff], 0x000000001fe00000 bytes flags: 0x0
[ 0.000000] reserved.cnt = 0x2
[ 0.000000] reserved[0x0] [0x0000000080200000-0x0000000080c2dfeb], 0x0000000000a2dfec bytes flags: 0x0
[ 0.000000] reserved[0x1] [0xfffffff080100000-0xfffffff080100527], 0x0000000000000528 bytes flags: 0x0
With the fix applied:
[ 0.000000] MEMBLOCK configuration:
[ 0.000000] memory size = 0x000000001fe00000 reserved size = 0x0000000000a2e514
[ 0.000000] memory.cnt = 0x1
[ 0.000000] memory[0x0] [0x0000000080200000-0x000000009fffffff], 0x000000001fe00000 bytes flags: 0x0
[ 0.000000] reserved.cnt = 0x2
[ 0.000000] reserved[0x0] [0x0000000080200000-0x0000000080c2dfeb], 0x0000000000a2dfec bytes flags: 0x0
[ 0.000000] reserved[0x1] [0x0000000080e00000-0x0000000080e00527], 0x0000000000000528 bytes flags: 0x0
Fixes: 671f9a3e2e24 ("RISC-V: Setup initial page tables in two stages")
Signed-off-by: Albert Ou <aou@eecs.berkeley.edu>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>
2019-09-27 23:14:18 +00:00
|
|
|
|
2020-10-31 06:01:12 +00:00
|
|
|
dma_contiguous_reserve(dma32_phys_limit);
|
2021-07-30 12:48:41 +00:00
|
|
|
if (IS_ENABLED(CONFIG_64BIT))
|
|
|
|
hugetlb_cma_reserve(PUD_SHIFT - PAGE_SHIFT);
|
2019-02-21 05:55:49 +00:00
|
|
|
memblock_allow_resize();
|
|
|
|
}
|
2019-02-13 11:08:36 +00:00
|
|
|
|
2019-10-28 12:10:41 +00:00
|
|
|
#ifdef CONFIG_MMU
|
2022-01-20 03:23:41 +00:00
|
|
|
struct pt_alloc_ops pt_ops __initdata;
|
2021-04-13 06:35:14 +00:00
|
|
|
|
2021-07-28 07:15:57 +00:00
|
|
|
unsigned long riscv_pfn_base __ro_after_init;
|
|
|
|
EXPORT_SYMBOL(riscv_pfn_base);
|
2019-03-26 08:03:47 +00:00
|
|
|
|
2019-02-13 11:08:36 +00:00
|
|
|
pgd_t swapper_pg_dir[PTRS_PER_PGD] __page_aligned_bss;
|
2019-06-28 20:36:21 +00:00
|
|
|
pgd_t trampoline_pg_dir[PTRS_PER_PGD] __page_aligned_bss;
|
2021-05-16 13:15:56 +00:00
|
|
|
static pte_t fixmap_pte[PTRS_PER_PTE] __page_aligned_bss;
|
2019-02-13 11:08:36 +00:00
|
|
|
|
2019-06-28 20:36:21 +00:00
|
|
|
pgd_t early_pg_dir[PTRS_PER_PGD] __initdata __aligned(PAGE_SIZE);
|
2022-01-27 02:48:42 +00:00
|
|
|
static p4d_t __maybe_unused early_dtb_p4d[PTRS_PER_P4D] __initdata __aligned(PAGE_SIZE);
|
2021-12-06 10:46:51 +00:00
|
|
|
static pud_t __maybe_unused early_dtb_pud[PTRS_PER_PUD] __initdata __aligned(PAGE_SIZE);
|
2021-07-23 13:01:28 +00:00
|
|
|
static pmd_t __maybe_unused early_dtb_pmd[PTRS_PER_PMD] __initdata __aligned(PAGE_SIZE);
|
2019-01-07 15:27:01 +00:00
|
|
|
|
2021-04-13 06:35:14 +00:00
|
|
|
#ifdef CONFIG_XIP_KERNEL
|
2021-12-06 15:03:53 +00:00
|
|
|
#define pt_ops (*(struct pt_alloc_ops *)XIP_FIXUP(&pt_ops))
|
2022-02-04 21:14:08 +00:00
|
|
|
#define riscv_pfn_base (*(unsigned long *)XIP_FIXUP(&riscv_pfn_base))
|
2021-04-13 06:35:14 +00:00
|
|
|
#define trampoline_pg_dir ((pgd_t *)XIP_FIXUP(trampoline_pg_dir))
|
|
|
|
#define fixmap_pte ((pte_t *)XIP_FIXUP(fixmap_pte))
|
|
|
|
#define early_pg_dir ((pgd_t *)XIP_FIXUP(early_pg_dir))
|
|
|
|
#endif /* CONFIG_XIP_KERNEL */
|
|
|
|
|
2022-07-11 07:05:50 +00:00
|
|
|
static const pgprot_t protection_map[16] = {
|
|
|
|
[VM_NONE] = PAGE_NONE,
|
|
|
|
[VM_READ] = PAGE_READ,
|
|
|
|
[VM_WRITE] = PAGE_COPY,
|
|
|
|
[VM_WRITE | VM_READ] = PAGE_COPY,
|
|
|
|
[VM_EXEC] = PAGE_EXEC,
|
|
|
|
[VM_EXEC | VM_READ] = PAGE_READ_EXEC,
|
|
|
|
[VM_EXEC | VM_WRITE] = PAGE_COPY_EXEC,
|
|
|
|
[VM_EXEC | VM_WRITE | VM_READ] = PAGE_COPY_READ_EXEC,
|
|
|
|
[VM_SHARED] = PAGE_NONE,
|
|
|
|
[VM_SHARED | VM_READ] = PAGE_READ,
|
|
|
|
[VM_SHARED | VM_WRITE] = PAGE_SHARED,
|
|
|
|
[VM_SHARED | VM_WRITE | VM_READ] = PAGE_SHARED,
|
|
|
|
[VM_SHARED | VM_EXEC] = PAGE_EXEC,
|
|
|
|
[VM_SHARED | VM_EXEC | VM_READ] = PAGE_READ_EXEC,
|
|
|
|
[VM_SHARED | VM_EXEC | VM_WRITE] = PAGE_SHARED_EXEC,
|
|
|
|
[VM_SHARED | VM_EXEC | VM_WRITE | VM_READ] = PAGE_SHARED_EXEC
|
|
|
|
};
|
|
|
|
DECLARE_VM_GET_PAGE_PROT
|
|
|
|
|
2019-01-07 15:27:01 +00:00
|
|
|
void __set_fixmap(enum fixed_addresses idx, phys_addr_t phys, pgprot_t prot)
|
|
|
|
{
|
|
|
|
unsigned long addr = __fix_to_virt(idx);
|
|
|
|
pte_t *ptep;
|
|
|
|
|
|
|
|
BUG_ON(idx <= FIX_HOLE || idx >= __end_of_fixed_addresses);
|
|
|
|
|
|
|
|
ptep = &fixmap_pte[pte_index(addr)];
|
|
|
|
|
2020-08-04 03:02:05 +00:00
|
|
|
if (pgprot_val(prot))
|
2019-01-07 15:27:01 +00:00
|
|
|
set_pte(ptep, pfn_pte(phys >> PAGE_SHIFT, prot));
|
2020-08-04 03:02:05 +00:00
|
|
|
else
|
2019-01-07 15:27:01 +00:00
|
|
|
pte_clear(&init_mm, addr, ptep);
|
2020-08-04 03:02:05 +00:00
|
|
|
local_flush_tlb_page(addr);
|
2019-01-07 15:27:01 +00:00
|
|
|
}
|
|
|
|
|
2020-09-17 22:37:12 +00:00
|
|
|
static inline pte_t *__init get_pte_virt_early(phys_addr_t pa)
|
2019-06-28 20:36:21 +00:00
|
|
|
{
|
2020-09-17 22:37:12 +00:00
|
|
|
return (pte_t *)((uintptr_t)pa);
|
2019-06-28 20:36:21 +00:00
|
|
|
}
|
|
|
|
|
2020-09-17 22:37:12 +00:00
|
|
|
static inline pte_t *__init get_pte_virt_fixmap(phys_addr_t pa)
|
|
|
|
{
|
|
|
|
clear_fixmap(FIX_PTE);
|
|
|
|
return (pte_t *)set_fixmap_offset(FIX_PTE, pa);
|
|
|
|
}
|
|
|
|
|
2021-05-16 13:15:56 +00:00
|
|
|
static inline pte_t *__init get_pte_virt_late(phys_addr_t pa)
|
2020-09-17 22:37:12 +00:00
|
|
|
{
|
|
|
|
return (pte_t *) __va(pa);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline phys_addr_t __init alloc_pte_early(uintptr_t va)
|
2019-06-28 20:36:21 +00:00
|
|
|
{
|
|
|
|
/*
|
|
|
|
* We only create PMD or PGD early mappings so we
|
|
|
|
* should never reach here with MMU disabled.
|
|
|
|
*/
|
2020-09-17 22:37:12 +00:00
|
|
|
BUG();
|
|
|
|
}
|
2019-06-28 20:36:21 +00:00
|
|
|
|
2020-09-17 22:37:12 +00:00
|
|
|
static inline phys_addr_t __init alloc_pte_fixmap(uintptr_t va)
|
|
|
|
{
|
2019-06-28 20:36:21 +00:00
|
|
|
return memblock_phys_alloc(PAGE_SIZE, PAGE_SIZE);
|
|
|
|
}
|
|
|
|
|
2021-05-16 13:15:56 +00:00
|
|
|
static phys_addr_t __init alloc_pte_late(uintptr_t va)
|
2020-09-17 22:37:12 +00:00
|
|
|
{
|
|
|
|
unsigned long vaddr;
|
|
|
|
|
|
|
|
vaddr = __get_free_page(GFP_KERNEL);
|
2021-03-30 13:56:26 +00:00
|
|
|
BUG_ON(!vaddr || !pgtable_pte_page_ctor(virt_to_page(vaddr)));
|
|
|
|
|
2020-09-17 22:37:12 +00:00
|
|
|
return __pa(vaddr);
|
|
|
|
}
|
|
|
|
|
2019-06-28 20:36:21 +00:00
|
|
|
static void __init create_pte_mapping(pte_t *ptep,
|
|
|
|
uintptr_t va, phys_addr_t pa,
|
|
|
|
phys_addr_t sz, pgprot_t prot)
|
|
|
|
{
|
2020-06-09 04:33:10 +00:00
|
|
|
uintptr_t pte_idx = pte_index(va);
|
2019-06-28 20:36:21 +00:00
|
|
|
|
|
|
|
BUG_ON(sz != PAGE_SIZE);
|
|
|
|
|
2020-06-09 04:33:10 +00:00
|
|
|
if (pte_none(ptep[pte_idx]))
|
|
|
|
ptep[pte_idx] = pfn_pte(PFN_DOWN(pa), prot);
|
2019-06-28 20:36:21 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
#ifndef __PAGETABLE_PMD_FOLDED
|
|
|
|
|
2021-05-16 13:15:56 +00:00
|
|
|
static pmd_t trampoline_pmd[PTRS_PER_PMD] __page_aligned_bss;
|
|
|
|
static pmd_t fixmap_pmd[PTRS_PER_PMD] __page_aligned_bss;
|
|
|
|
static pmd_t early_pmd[PTRS_PER_PMD] __initdata __aligned(PAGE_SIZE);
|
2019-06-28 20:36:21 +00:00
|
|
|
|
2021-04-13 06:35:14 +00:00
|
|
|
#ifdef CONFIG_XIP_KERNEL
|
|
|
|
#define trampoline_pmd ((pmd_t *)XIP_FIXUP(trampoline_pmd))
|
|
|
|
#define fixmap_pmd ((pmd_t *)XIP_FIXUP(fixmap_pmd))
|
|
|
|
#define early_pmd ((pmd_t *)XIP_FIXUP(early_pmd))
|
|
|
|
#endif /* CONFIG_XIP_KERNEL */
|
|
|
|
|
2022-01-27 02:48:42 +00:00
|
|
|
static p4d_t trampoline_p4d[PTRS_PER_P4D] __page_aligned_bss;
|
|
|
|
static p4d_t fixmap_p4d[PTRS_PER_P4D] __page_aligned_bss;
|
|
|
|
static p4d_t early_p4d[PTRS_PER_P4D] __initdata __aligned(PAGE_SIZE);
|
|
|
|
|
|
|
|
#ifdef CONFIG_XIP_KERNEL
|
|
|
|
#define trampoline_p4d ((p4d_t *)XIP_FIXUP(trampoline_p4d))
|
|
|
|
#define fixmap_p4d ((p4d_t *)XIP_FIXUP(fixmap_p4d))
|
|
|
|
#define early_p4d ((p4d_t *)XIP_FIXUP(early_p4d))
|
|
|
|
#endif /* CONFIG_XIP_KERNEL */
|
|
|
|
|
2021-12-06 10:46:51 +00:00
|
|
|
static pud_t trampoline_pud[PTRS_PER_PUD] __page_aligned_bss;
|
|
|
|
static pud_t fixmap_pud[PTRS_PER_PUD] __page_aligned_bss;
|
|
|
|
static pud_t early_pud[PTRS_PER_PUD] __initdata __aligned(PAGE_SIZE);
|
|
|
|
|
|
|
|
#ifdef CONFIG_XIP_KERNEL
|
|
|
|
#define trampoline_pud ((pud_t *)XIP_FIXUP(trampoline_pud))
|
|
|
|
#define fixmap_pud ((pud_t *)XIP_FIXUP(fixmap_pud))
|
|
|
|
#define early_pud ((pud_t *)XIP_FIXUP(early_pud))
|
|
|
|
#endif /* CONFIG_XIP_KERNEL */
|
|
|
|
|
2020-09-17 22:37:12 +00:00
|
|
|
static pmd_t *__init get_pmd_virt_early(phys_addr_t pa)
|
2019-06-28 20:36:21 +00:00
|
|
|
{
|
2020-09-17 22:37:12 +00:00
|
|
|
/* Before MMU is enabled */
|
|
|
|
return (pmd_t *)((uintptr_t)pa);
|
2019-06-28 20:36:21 +00:00
|
|
|
}
|
|
|
|
|
2020-09-17 22:37:12 +00:00
|
|
|
static pmd_t *__init get_pmd_virt_fixmap(phys_addr_t pa)
|
2019-06-28 20:36:21 +00:00
|
|
|
{
|
2020-09-17 22:37:12 +00:00
|
|
|
clear_fixmap(FIX_PMD);
|
|
|
|
return (pmd_t *)set_fixmap_offset(FIX_PMD, pa);
|
|
|
|
}
|
2019-06-28 20:36:21 +00:00
|
|
|
|
2021-05-16 13:15:56 +00:00
|
|
|
static pmd_t *__init get_pmd_virt_late(phys_addr_t pa)
|
2020-09-17 22:37:12 +00:00
|
|
|
{
|
|
|
|
return (pmd_t *) __va(pa);
|
|
|
|
}
|
2019-06-28 20:36:21 +00:00
|
|
|
|
2020-09-17 22:37:12 +00:00
|
|
|
static phys_addr_t __init alloc_pmd_early(uintptr_t va)
|
|
|
|
{
|
2021-12-06 10:46:51 +00:00
|
|
|
BUG_ON((va - kernel_map.virt_addr) >> PUD_SHIFT);
|
2019-06-28 20:36:21 +00:00
|
|
|
|
2021-02-21 14:22:33 +00:00
|
|
|
return (uintptr_t)early_pmd;
|
2019-06-28 20:36:21 +00:00
|
|
|
}
|
|
|
|
|
2020-09-17 22:37:12 +00:00
|
|
|
static phys_addr_t __init alloc_pmd_fixmap(uintptr_t va)
|
|
|
|
{
|
|
|
|
return memblock_phys_alloc(PAGE_SIZE, PAGE_SIZE);
|
|
|
|
}
|
|
|
|
|
2021-05-16 13:15:56 +00:00
|
|
|
static phys_addr_t __init alloc_pmd_late(uintptr_t va)
|
2020-09-17 22:37:12 +00:00
|
|
|
{
|
|
|
|
unsigned long vaddr;
|
|
|
|
|
|
|
|
vaddr = __get_free_page(GFP_KERNEL);
|
2021-09-27 03:03:25 +00:00
|
|
|
BUG_ON(!vaddr || !pgtable_pmd_page_ctor(virt_to_page(vaddr)));
|
|
|
|
|
2020-09-17 22:37:12 +00:00
|
|
|
return __pa(vaddr);
|
|
|
|
}
|
|
|
|
|
2019-06-28 20:36:21 +00:00
|
|
|
static void __init create_pmd_mapping(pmd_t *pmdp,
|
|
|
|
uintptr_t va, phys_addr_t pa,
|
|
|
|
phys_addr_t sz, pgprot_t prot)
|
|
|
|
{
|
|
|
|
pte_t *ptep;
|
|
|
|
phys_addr_t pte_phys;
|
2020-06-09 04:33:10 +00:00
|
|
|
uintptr_t pmd_idx = pmd_index(va);
|
2019-06-28 20:36:21 +00:00
|
|
|
|
|
|
|
if (sz == PMD_SIZE) {
|
2020-06-09 04:33:10 +00:00
|
|
|
if (pmd_none(pmdp[pmd_idx]))
|
|
|
|
pmdp[pmd_idx] = pfn_pmd(PFN_DOWN(pa), prot);
|
2019-06-28 20:36:21 +00:00
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2020-06-09 04:33:10 +00:00
|
|
|
if (pmd_none(pmdp[pmd_idx])) {
|
2020-09-17 22:37:12 +00:00
|
|
|
pte_phys = pt_ops.alloc_pte(va);
|
2020-06-09 04:33:10 +00:00
|
|
|
pmdp[pmd_idx] = pfn_pmd(PFN_DOWN(pte_phys), PAGE_TABLE);
|
2020-09-17 22:37:12 +00:00
|
|
|
ptep = pt_ops.get_pte_virt(pte_phys);
|
2019-06-28 20:36:21 +00:00
|
|
|
memset(ptep, 0, PAGE_SIZE);
|
|
|
|
} else {
|
2020-06-09 04:33:10 +00:00
|
|
|
pte_phys = PFN_PHYS(_pmd_pfn(pmdp[pmd_idx]));
|
2020-09-17 22:37:12 +00:00
|
|
|
ptep = pt_ops.get_pte_virt(pte_phys);
|
2019-06-28 20:36:21 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
create_pte_mapping(ptep, va, pa, sz, prot);
|
|
|
|
}
|
|
|
|
|
2021-12-06 10:46:51 +00:00
|
|
|
static pud_t *__init get_pud_virt_early(phys_addr_t pa)
|
|
|
|
{
|
|
|
|
return (pud_t *)((uintptr_t)pa);
|
|
|
|
}
|
|
|
|
|
|
|
|
static pud_t *__init get_pud_virt_fixmap(phys_addr_t pa)
|
|
|
|
{
|
|
|
|
clear_fixmap(FIX_PUD);
|
|
|
|
return (pud_t *)set_fixmap_offset(FIX_PUD, pa);
|
|
|
|
}
|
|
|
|
|
|
|
|
static pud_t *__init get_pud_virt_late(phys_addr_t pa)
|
|
|
|
{
|
|
|
|
return (pud_t *)__va(pa);
|
|
|
|
}
|
|
|
|
|
|
|
|
static phys_addr_t __init alloc_pud_early(uintptr_t va)
|
|
|
|
{
|
|
|
|
/* Only one PUD is available for early mapping */
|
|
|
|
BUG_ON((va - kernel_map.virt_addr) >> PGDIR_SHIFT);
|
|
|
|
|
|
|
|
return (uintptr_t)early_pud;
|
|
|
|
}
|
|
|
|
|
|
|
|
static phys_addr_t __init alloc_pud_fixmap(uintptr_t va)
|
|
|
|
{
|
|
|
|
return memblock_phys_alloc(PAGE_SIZE, PAGE_SIZE);
|
|
|
|
}
|
|
|
|
|
|
|
|
static phys_addr_t alloc_pud_late(uintptr_t va)
|
|
|
|
{
|
|
|
|
unsigned long vaddr;
|
|
|
|
|
|
|
|
vaddr = __get_free_page(GFP_KERNEL);
|
|
|
|
BUG_ON(!vaddr);
|
|
|
|
return __pa(vaddr);
|
|
|
|
}
|
|
|
|
|
2022-01-27 02:48:42 +00:00
|
|
|
static p4d_t *__init get_p4d_virt_early(phys_addr_t pa)
|
|
|
|
{
|
|
|
|
return (p4d_t *)((uintptr_t)pa);
|
|
|
|
}
|
|
|
|
|
|
|
|
static p4d_t *__init get_p4d_virt_fixmap(phys_addr_t pa)
|
|
|
|
{
|
|
|
|
clear_fixmap(FIX_P4D);
|
|
|
|
return (p4d_t *)set_fixmap_offset(FIX_P4D, pa);
|
|
|
|
}
|
|
|
|
|
|
|
|
static p4d_t *__init get_p4d_virt_late(phys_addr_t pa)
|
|
|
|
{
|
|
|
|
return (p4d_t *)__va(pa);
|
|
|
|
}
|
|
|
|
|
|
|
|
static phys_addr_t __init alloc_p4d_early(uintptr_t va)
|
|
|
|
{
|
|
|
|
/* Only one P4D is available for early mapping */
|
|
|
|
BUG_ON((va - kernel_map.virt_addr) >> PGDIR_SHIFT);
|
|
|
|
|
|
|
|
return (uintptr_t)early_p4d;
|
|
|
|
}
|
|
|
|
|
|
|
|
static phys_addr_t __init alloc_p4d_fixmap(uintptr_t va)
|
|
|
|
{
|
|
|
|
return memblock_phys_alloc(PAGE_SIZE, PAGE_SIZE);
|
|
|
|
}
|
|
|
|
|
|
|
|
static phys_addr_t alloc_p4d_late(uintptr_t va)
|
|
|
|
{
|
|
|
|
unsigned long vaddr;
|
|
|
|
|
|
|
|
vaddr = __get_free_page(GFP_KERNEL);
|
|
|
|
BUG_ON(!vaddr);
|
|
|
|
return __pa(vaddr);
|
|
|
|
}
|
|
|
|
|
2021-12-06 10:46:51 +00:00
|
|
|
static void __init create_pud_mapping(pud_t *pudp,
|
|
|
|
uintptr_t va, phys_addr_t pa,
|
|
|
|
phys_addr_t sz, pgprot_t prot)
|
|
|
|
{
|
|
|
|
pmd_t *nextp;
|
|
|
|
phys_addr_t next_phys;
|
|
|
|
uintptr_t pud_index = pud_index(va);
|
|
|
|
|
|
|
|
if (sz == PUD_SIZE) {
|
|
|
|
if (pud_val(pudp[pud_index]) == 0)
|
|
|
|
pudp[pud_index] = pfn_pud(PFN_DOWN(pa), prot);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (pud_val(pudp[pud_index]) == 0) {
|
|
|
|
next_phys = pt_ops.alloc_pmd(va);
|
|
|
|
pudp[pud_index] = pfn_pud(PFN_DOWN(next_phys), PAGE_TABLE);
|
|
|
|
nextp = pt_ops.get_pmd_virt(next_phys);
|
|
|
|
memset(nextp, 0, PAGE_SIZE);
|
|
|
|
} else {
|
|
|
|
next_phys = PFN_PHYS(_pud_pfn(pudp[pud_index]));
|
|
|
|
nextp = pt_ops.get_pmd_virt(next_phys);
|
|
|
|
}
|
|
|
|
|
|
|
|
create_pmd_mapping(nextp, va, pa, sz, prot);
|
|
|
|
}
|
|
|
|
|
2022-01-27 02:48:42 +00:00
|
|
|
static void __init create_p4d_mapping(p4d_t *p4dp,
|
|
|
|
uintptr_t va, phys_addr_t pa,
|
|
|
|
phys_addr_t sz, pgprot_t prot)
|
|
|
|
{
|
|
|
|
pud_t *nextp;
|
|
|
|
phys_addr_t next_phys;
|
|
|
|
uintptr_t p4d_index = p4d_index(va);
|
|
|
|
|
|
|
|
if (sz == P4D_SIZE) {
|
|
|
|
if (p4d_val(p4dp[p4d_index]) == 0)
|
|
|
|
p4dp[p4d_index] = pfn_p4d(PFN_DOWN(pa), prot);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (p4d_val(p4dp[p4d_index]) == 0) {
|
|
|
|
next_phys = pt_ops.alloc_pud(va);
|
|
|
|
p4dp[p4d_index] = pfn_p4d(PFN_DOWN(next_phys), PAGE_TABLE);
|
|
|
|
nextp = pt_ops.get_pud_virt(next_phys);
|
|
|
|
memset(nextp, 0, PAGE_SIZE);
|
|
|
|
} else {
|
|
|
|
next_phys = PFN_PHYS(_p4d_pfn(p4dp[p4d_index]));
|
|
|
|
nextp = pt_ops.get_pud_virt(next_phys);
|
|
|
|
}
|
|
|
|
|
|
|
|
create_pud_mapping(nextp, va, pa, sz, prot);
|
|
|
|
}
|
|
|
|
|
|
|
|
#define pgd_next_t p4d_t
|
|
|
|
#define alloc_pgd_next(__va) (pgtable_l5_enabled ? \
|
|
|
|
pt_ops.alloc_p4d(__va) : (pgtable_l4_enabled ? \
|
|
|
|
pt_ops.alloc_pud(__va) : pt_ops.alloc_pmd(__va)))
|
|
|
|
#define get_pgd_next_virt(__pa) (pgtable_l5_enabled ? \
|
|
|
|
pt_ops.get_p4d_virt(__pa) : (pgd_next_t *)(pgtable_l4_enabled ? \
|
|
|
|
pt_ops.get_pud_virt(__pa) : (pud_t *)pt_ops.get_pmd_virt(__pa)))
|
2019-06-28 20:36:21 +00:00
|
|
|
#define create_pgd_next_mapping(__nextp, __va, __pa, __sz, __prot) \
|
2022-01-27 02:48:42 +00:00
|
|
|
(pgtable_l5_enabled ? \
|
|
|
|
create_p4d_mapping(__nextp, __va, __pa, __sz, __prot) : \
|
2021-12-06 10:46:51 +00:00
|
|
|
(pgtable_l4_enabled ? \
|
2022-01-27 02:48:42 +00:00
|
|
|
create_pud_mapping((pud_t *)__nextp, __va, __pa, __sz, __prot) : \
|
|
|
|
create_pmd_mapping((pmd_t *)__nextp, __va, __pa, __sz, __prot)))
|
|
|
|
#define fixmap_pgd_next (pgtable_l5_enabled ? \
|
|
|
|
(uintptr_t)fixmap_p4d : (pgtable_l4_enabled ? \
|
|
|
|
(uintptr_t)fixmap_pud : (uintptr_t)fixmap_pmd))
|
|
|
|
#define trampoline_pgd_next (pgtable_l5_enabled ? \
|
|
|
|
(uintptr_t)trampoline_p4d : (pgtable_l4_enabled ? \
|
|
|
|
(uintptr_t)trampoline_pud : (uintptr_t)trampoline_pmd))
|
|
|
|
#define early_dtb_pgd_next (pgtable_l5_enabled ? \
|
|
|
|
(uintptr_t)early_dtb_p4d : (pgtable_l4_enabled ? \
|
|
|
|
(uintptr_t)early_dtb_pud : (uintptr_t)early_dtb_pmd))
|
2019-06-28 20:36:21 +00:00
|
|
|
#else
|
|
|
|
#define pgd_next_t pte_t
|
2020-09-17 22:37:12 +00:00
|
|
|
#define alloc_pgd_next(__va) pt_ops.alloc_pte(__va)
|
|
|
|
#define get_pgd_next_virt(__pa) pt_ops.get_pte_virt(__pa)
|
2019-06-28 20:36:21 +00:00
|
|
|
#define create_pgd_next_mapping(__nextp, __va, __pa, __sz, __prot) \
|
|
|
|
create_pte_mapping(__nextp, __va, __pa, __sz, __prot)
|
2021-12-06 10:46:51 +00:00
|
|
|
#define fixmap_pgd_next ((uintptr_t)fixmap_pte)
|
|
|
|
#define early_dtb_pgd_next ((uintptr_t)early_dtb_pmd)
|
2022-04-20 01:12:01 +00:00
|
|
|
#define create_p4d_mapping(__pmdp, __va, __pa, __sz, __prot) do {} while(0)
|
|
|
|
#define create_pud_mapping(__pmdp, __va, __pa, __sz, __prot) do {} while(0)
|
|
|
|
#define create_pmd_mapping(__pmdp, __va, __pa, __sz, __prot) do {} while(0)
|
2021-12-06 10:46:51 +00:00
|
|
|
#endif /* __PAGETABLE_PMD_FOLDED */
|
2019-06-28 20:36:21 +00:00
|
|
|
|
2020-09-17 22:37:15 +00:00
|
|
|
void __init create_pgd_mapping(pgd_t *pgdp,
|
2019-06-28 20:36:21 +00:00
|
|
|
uintptr_t va, phys_addr_t pa,
|
|
|
|
phys_addr_t sz, pgprot_t prot)
|
|
|
|
{
|
|
|
|
pgd_next_t *nextp;
|
|
|
|
phys_addr_t next_phys;
|
2020-06-09 04:33:10 +00:00
|
|
|
uintptr_t pgd_idx = pgd_index(va);
|
2019-06-28 20:36:21 +00:00
|
|
|
|
|
|
|
if (sz == PGDIR_SIZE) {
|
2020-06-09 04:33:10 +00:00
|
|
|
if (pgd_val(pgdp[pgd_idx]) == 0)
|
|
|
|
pgdp[pgd_idx] = pfn_pgd(PFN_DOWN(pa), prot);
|
2019-06-28 20:36:21 +00:00
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2020-06-09 04:33:10 +00:00
|
|
|
if (pgd_val(pgdp[pgd_idx]) == 0) {
|
2019-06-28 20:36:21 +00:00
|
|
|
next_phys = alloc_pgd_next(va);
|
2020-06-09 04:33:10 +00:00
|
|
|
pgdp[pgd_idx] = pfn_pgd(PFN_DOWN(next_phys), PAGE_TABLE);
|
2019-06-28 20:36:21 +00:00
|
|
|
nextp = get_pgd_next_virt(next_phys);
|
|
|
|
memset(nextp, 0, PAGE_SIZE);
|
|
|
|
} else {
|
2020-06-09 04:33:10 +00:00
|
|
|
next_phys = PFN_PHYS(_pgd_pfn(pgdp[pgd_idx]));
|
2019-06-28 20:36:21 +00:00
|
|
|
nextp = get_pgd_next_virt(next_phys);
|
|
|
|
}
|
|
|
|
|
|
|
|
create_pgd_next_mapping(nextp, va, pa, sz, prot);
|
|
|
|
}
|
|
|
|
|
|
|
|
static uintptr_t __init best_map_size(phys_addr_t base, phys_addr_t size)
|
|
|
|
{
|
2019-11-08 09:00:40 +00:00
|
|
|
/* Upgrade to PMD_SIZE mappings whenever possible */
|
|
|
|
if ((base & (PMD_SIZE - 1)) || (size & (PMD_SIZE - 1)))
|
|
|
|
return PAGE_SIZE;
|
2019-06-28 20:36:21 +00:00
|
|
|
|
2019-11-08 09:00:40 +00:00
|
|
|
return PMD_SIZE;
|
2019-06-28 20:36:21 +00:00
|
|
|
}
|
|
|
|
|
2021-04-13 06:35:14 +00:00
|
|
|
#ifdef CONFIG_XIP_KERNEL
|
2022-02-04 21:13:37 +00:00
|
|
|
#define phys_ram_base (*(phys_addr_t *)XIP_FIXUP(&phys_ram_base))
|
2021-12-06 15:03:53 +00:00
|
|
|
extern char _xiprom[], _exiprom[], __data_loc;
|
|
|
|
|
2021-04-13 06:35:14 +00:00
|
|
|
/* called from head.S with MMU off */
|
|
|
|
asmlinkage void __init __copy_data(void)
|
|
|
|
{
|
2021-10-11 09:14:14 +00:00
|
|
|
void *from = (void *)(&__data_loc);
|
2021-04-13 06:35:14 +00:00
|
|
|
void *to = (void *)CONFIG_PHYS_RAM_BASE;
|
2021-10-11 09:14:14 +00:00
|
|
|
size_t sz = (size_t)((uintptr_t)(&_end) - (uintptr_t)(&_sdata));
|
2021-04-13 06:35:14 +00:00
|
|
|
|
|
|
|
memcpy(to, from, sz);
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
2021-06-24 12:00:41 +00:00
|
|
|
#ifdef CONFIG_STRICT_KERNEL_RWX
|
|
|
|
static __init pgprot_t pgprot_from_va(uintptr_t va)
|
|
|
|
{
|
|
|
|
if (is_va_kernel_text(va))
|
|
|
|
return PAGE_KERNEL_READ_EXEC;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* In 64-bit kernel, the kernel mapping is outside the linear mapping so
|
|
|
|
* we must protect its linear mapping alias from being executed and
|
|
|
|
* written.
|
|
|
|
* And rodata section is marked readonly in mark_rodata_ro.
|
|
|
|
*/
|
|
|
|
if (IS_ENABLED(CONFIG_64BIT) && is_va_kernel_lm_alias_text(va))
|
|
|
|
return PAGE_KERNEL_READ;
|
|
|
|
|
|
|
|
return PAGE_KERNEL;
|
|
|
|
}
|
|
|
|
|
|
|
|
void mark_rodata_ro(void)
|
|
|
|
{
|
|
|
|
set_kernel_memory(__start_rodata, _data, set_memory_ro);
|
|
|
|
if (IS_ENABLED(CONFIG_64BIT))
|
|
|
|
set_kernel_memory(lm_alias(__start_rodata), lm_alias(_data),
|
|
|
|
set_memory_ro);
|
|
|
|
|
|
|
|
debug_checkwx();
|
|
|
|
}
|
|
|
|
#else
|
|
|
|
static __init pgprot_t pgprot_from_va(uintptr_t va)
|
|
|
|
{
|
|
|
|
if (IS_ENABLED(CONFIG_64BIT) && !is_kernel_mapping(va))
|
|
|
|
return PAGE_KERNEL;
|
|
|
|
|
|
|
|
return PAGE_KERNEL_EXEC;
|
|
|
|
}
|
|
|
|
#endif /* CONFIG_STRICT_KERNEL_RWX */
|
|
|
|
|
2022-04-20 03:13:27 +00:00
|
|
|
#if defined(CONFIG_64BIT) && !defined(CONFIG_XIP_KERNEL)
|
2022-01-27 02:48:43 +00:00
|
|
|
static void __init disable_pgtable_l5(void)
|
|
|
|
{
|
|
|
|
pgtable_l5_enabled = false;
|
|
|
|
kernel_map.page_offset = PAGE_OFFSET_L4;
|
|
|
|
satp_mode = SATP_MODE_48;
|
|
|
|
}
|
|
|
|
|
2021-12-06 10:46:51 +00:00
|
|
|
static void __init disable_pgtable_l4(void)
|
|
|
|
{
|
|
|
|
pgtable_l4_enabled = false;
|
|
|
|
kernel_map.page_offset = PAGE_OFFSET_L3;
|
|
|
|
satp_mode = SATP_MODE_39;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* There is a simple way to determine if 4-level is supported by the
|
|
|
|
* underlying hardware: establish 1:1 mapping in 4-level page table mode
|
|
|
|
* then read SATP to see if the configuration was taken into account
|
|
|
|
* meaning sv48 is supported.
|
|
|
|
*/
|
|
|
|
static __init void set_satp_mode(void)
|
|
|
|
{
|
|
|
|
u64 identity_satp, hw_satp;
|
2022-01-27 02:48:43 +00:00
|
|
|
uintptr_t set_satp_mode_pmd = ((unsigned long)set_satp_mode) & PMD_MASK;
|
|
|
|
bool check_l4 = false;
|
2021-12-06 10:46:51 +00:00
|
|
|
|
2022-01-27 02:48:43 +00:00
|
|
|
create_p4d_mapping(early_p4d,
|
|
|
|
set_satp_mode_pmd, (uintptr_t)early_pud,
|
|
|
|
P4D_SIZE, PAGE_TABLE);
|
2021-12-06 10:46:51 +00:00
|
|
|
create_pud_mapping(early_pud,
|
|
|
|
set_satp_mode_pmd, (uintptr_t)early_pmd,
|
|
|
|
PUD_SIZE, PAGE_TABLE);
|
|
|
|
/* Handle the case where set_satp_mode straddles 2 PMDs */
|
|
|
|
create_pmd_mapping(early_pmd,
|
|
|
|
set_satp_mode_pmd, set_satp_mode_pmd,
|
|
|
|
PMD_SIZE, PAGE_KERNEL_EXEC);
|
|
|
|
create_pmd_mapping(early_pmd,
|
|
|
|
set_satp_mode_pmd + PMD_SIZE,
|
|
|
|
set_satp_mode_pmd + PMD_SIZE,
|
|
|
|
PMD_SIZE, PAGE_KERNEL_EXEC);
|
2022-01-27 02:48:43 +00:00
|
|
|
retry:
|
|
|
|
create_pgd_mapping(early_pg_dir,
|
|
|
|
set_satp_mode_pmd,
|
|
|
|
check_l4 ? (uintptr_t)early_pud : (uintptr_t)early_p4d,
|
|
|
|
PGDIR_SIZE, PAGE_TABLE);
|
2021-12-06 10:46:51 +00:00
|
|
|
|
|
|
|
identity_satp = PFN_DOWN((uintptr_t)&early_pg_dir) | satp_mode;
|
|
|
|
|
|
|
|
local_flush_tlb_all();
|
|
|
|
csr_write(CSR_SATP, identity_satp);
|
|
|
|
hw_satp = csr_swap(CSR_SATP, 0ULL);
|
|
|
|
local_flush_tlb_all();
|
|
|
|
|
2022-01-27 02:48:43 +00:00
|
|
|
if (hw_satp != identity_satp) {
|
|
|
|
if (!check_l4) {
|
|
|
|
disable_pgtable_l5();
|
|
|
|
check_l4 = true;
|
2022-04-12 03:33:35 +00:00
|
|
|
memset(early_pg_dir, 0, PAGE_SIZE);
|
2022-01-27 02:48:43 +00:00
|
|
|
goto retry;
|
|
|
|
}
|
2021-12-06 10:46:51 +00:00
|
|
|
disable_pgtable_l4();
|
2022-01-27 02:48:43 +00:00
|
|
|
}
|
2021-12-06 10:46:51 +00:00
|
|
|
|
|
|
|
memset(early_pg_dir, 0, PAGE_SIZE);
|
2022-01-27 02:48:43 +00:00
|
|
|
memset(early_p4d, 0, PAGE_SIZE);
|
2021-12-06 10:46:51 +00:00
|
|
|
memset(early_pud, 0, PAGE_SIZE);
|
|
|
|
memset(early_pmd, 0, PAGE_SIZE);
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
2019-03-26 08:03:47 +00:00
|
|
|
/*
|
|
|
|
* setup_vm() is called from head.S with MMU-off.
|
|
|
|
*
|
|
|
|
* Following requirements should be honoured for setup_vm() to work
|
|
|
|
* correctly:
|
|
|
|
* 1) It should use PC-relative addressing for accessing kernel symbols.
|
|
|
|
* To achieve this we always use GCC cmodel=medany.
|
|
|
|
* 2) The compiler instrumentation for FTRACE will not work for setup_vm()
|
|
|
|
* so disable compiler instrumentation when FTRACE is enabled.
|
|
|
|
*
|
|
|
|
* Currently, the above requirements are honoured by using custom CFLAGS
|
|
|
|
* for init.o in mm/Makefile.
|
|
|
|
*/
|
|
|
|
|
|
|
|
#ifndef __riscv_cmodel_medany
|
2019-10-17 21:45:58 +00:00
|
|
|
#error "setup_vm() is called from head.S before relocate so it should not use absolute addressing."
|
2019-03-26 08:03:47 +00:00
|
|
|
#endif
|
|
|
|
|
2021-04-13 06:35:14 +00:00
|
|
|
#ifdef CONFIG_XIP_KERNEL
|
2021-07-23 13:01:25 +00:00
|
|
|
static void __init create_kernel_page_table(pgd_t *pgdir,
|
2021-06-24 12:00:41 +00:00
|
|
|
__always_unused bool early)
|
2021-04-13 06:35:14 +00:00
|
|
|
{
|
|
|
|
uintptr_t va, end_va;
|
|
|
|
|
|
|
|
/* Map the flash resident part */
|
2021-06-17 13:53:07 +00:00
|
|
|
end_va = kernel_map.virt_addr + kernel_map.xiprom_sz;
|
2021-07-23 13:01:25 +00:00
|
|
|
for (va = kernel_map.virt_addr; va < end_va; va += PMD_SIZE)
|
2021-04-13 06:35:14 +00:00
|
|
|
create_pgd_mapping(pgdir, va,
|
2021-06-17 13:53:07 +00:00
|
|
|
kernel_map.xiprom + (va - kernel_map.virt_addr),
|
2021-07-23 13:01:25 +00:00
|
|
|
PMD_SIZE, PAGE_KERNEL_EXEC);
|
2021-04-13 06:35:14 +00:00
|
|
|
|
|
|
|
/* Map the data in RAM */
|
2021-06-17 13:53:07 +00:00
|
|
|
end_va = kernel_map.virt_addr + XIP_OFFSET + kernel_map.size;
|
2021-07-23 13:01:25 +00:00
|
|
|
for (va = kernel_map.virt_addr + XIP_OFFSET; va < end_va; va += PMD_SIZE)
|
2021-04-13 06:35:14 +00:00
|
|
|
create_pgd_mapping(pgdir, va,
|
2021-06-17 13:53:07 +00:00
|
|
|
kernel_map.phys_addr + (va - (kernel_map.virt_addr + XIP_OFFSET)),
|
2021-07-23 13:01:25 +00:00
|
|
|
PMD_SIZE, PAGE_KERNEL);
|
2021-04-13 06:35:14 +00:00
|
|
|
}
|
|
|
|
#else
|
2021-07-23 13:01:25 +00:00
|
|
|
static void __init create_kernel_page_table(pgd_t *pgdir, bool early)
|
2021-04-11 16:41:44 +00:00
|
|
|
{
|
|
|
|
uintptr_t va, end_va;
|
|
|
|
|
2021-06-17 13:53:07 +00:00
|
|
|
end_va = kernel_map.virt_addr + kernel_map.size;
|
2021-07-23 13:01:25 +00:00
|
|
|
for (va = kernel_map.virt_addr; va < end_va; va += PMD_SIZE)
|
2021-04-11 16:41:44 +00:00
|
|
|
create_pgd_mapping(pgdir, va,
|
2021-06-17 13:53:07 +00:00
|
|
|
kernel_map.phys_addr + (va - kernel_map.virt_addr),
|
2021-07-23 13:01:25 +00:00
|
|
|
PMD_SIZE,
|
2021-06-24 12:00:41 +00:00
|
|
|
early ?
|
|
|
|
PAGE_KERNEL_EXEC : pgprot_from_va(va));
|
2021-04-11 16:41:44 +00:00
|
|
|
}
|
2021-04-13 06:35:14 +00:00
|
|
|
#endif
|
2021-04-11 16:41:44 +00:00
|
|
|
|
2021-07-23 13:01:28 +00:00
|
|
|
/*
|
|
|
|
* Setup a 4MB mapping that encompasses the device tree: for 64-bit kernel,
|
|
|
|
* this means 2 PMD entries whereas for 32-bit kernel, this is only 1 PGDIR
|
|
|
|
* entry.
|
|
|
|
*/
|
|
|
|
static void __init create_fdt_early_page_table(pgd_t *pgdir, uintptr_t dtb_pa)
|
2019-02-13 11:08:36 +00:00
|
|
|
{
|
2021-07-23 13:01:28 +00:00
|
|
|
#ifndef CONFIG_BUILTIN_DTB
|
|
|
|
uintptr_t pa = dtb_pa & ~(PMD_SIZE - 1);
|
|
|
|
|
|
|
|
create_pgd_mapping(early_pg_dir, DTB_EARLY_BASE_VA,
|
2021-12-06 10:46:51 +00:00
|
|
|
IS_ENABLED(CONFIG_64BIT) ? early_dtb_pgd_next : pa,
|
2021-07-23 13:01:28 +00:00
|
|
|
PGDIR_SIZE,
|
|
|
|
IS_ENABLED(CONFIG_64BIT) ? PAGE_TABLE : PAGE_KERNEL);
|
|
|
|
|
2022-01-27 02:48:42 +00:00
|
|
|
if (pgtable_l5_enabled)
|
|
|
|
create_p4d_mapping(early_dtb_p4d, DTB_EARLY_BASE_VA,
|
|
|
|
(uintptr_t)early_dtb_pud, P4D_SIZE, PAGE_TABLE);
|
|
|
|
|
|
|
|
if (pgtable_l4_enabled)
|
2021-12-06 10:46:51 +00:00
|
|
|
create_pud_mapping(early_dtb_pud, DTB_EARLY_BASE_VA,
|
|
|
|
(uintptr_t)early_dtb_pmd, PUD_SIZE, PAGE_TABLE);
|
|
|
|
|
2021-07-23 13:01:28 +00:00
|
|
|
if (IS_ENABLED(CONFIG_64BIT)) {
|
|
|
|
create_pmd_mapping(early_dtb_pmd, DTB_EARLY_BASE_VA,
|
|
|
|
pa, PMD_SIZE, PAGE_KERNEL);
|
|
|
|
create_pmd_mapping(early_dtb_pmd, DTB_EARLY_BASE_VA + PMD_SIZE,
|
|
|
|
pa + PMD_SIZE, PMD_SIZE, PAGE_KERNEL);
|
|
|
|
}
|
|
|
|
|
|
|
|
dtb_early_va = (void *)DTB_EARLY_BASE_VA + (dtb_pa & (PMD_SIZE - 1));
|
|
|
|
#else
|
|
|
|
/*
|
|
|
|
* For 64-bit kernel, __va can't be used since it would return a linear
|
|
|
|
* mapping address whereas dtb_early_va will be used before
|
|
|
|
* setup_vm_final installs the linear mapping. For 32-bit kernel, as the
|
|
|
|
* kernel is mapped in the linear mapping, that makes no difference.
|
|
|
|
*/
|
|
|
|
dtb_early_va = kernel_mapping_pa_to_va(XIP_FIXUP(dtb_pa));
|
2020-09-17 22:37:11 +00:00
|
|
|
#endif
|
2019-06-28 20:36:21 +00:00
|
|
|
|
2021-07-23 13:01:28 +00:00
|
|
|
dtb_early_pa = dtb_pa;
|
|
|
|
}
|
|
|
|
|
2021-12-06 10:46:47 +00:00
|
|
|
/*
|
|
|
|
* MMU is not enabled, the page tables are allocated directly using
|
|
|
|
* early_pmd/pud/p4d and the address returned is the physical one.
|
|
|
|
*/
|
2022-05-16 14:32:04 +00:00
|
|
|
static void __init pt_ops_set_early(void)
|
2021-12-06 10:46:47 +00:00
|
|
|
{
|
|
|
|
pt_ops.alloc_pte = alloc_pte_early;
|
|
|
|
pt_ops.get_pte_virt = get_pte_virt_early;
|
|
|
|
#ifndef __PAGETABLE_PMD_FOLDED
|
|
|
|
pt_ops.alloc_pmd = alloc_pmd_early;
|
|
|
|
pt_ops.get_pmd_virt = get_pmd_virt_early;
|
2021-12-06 10:46:51 +00:00
|
|
|
pt_ops.alloc_pud = alloc_pud_early;
|
|
|
|
pt_ops.get_pud_virt = get_pud_virt_early;
|
2022-01-27 02:48:42 +00:00
|
|
|
pt_ops.alloc_p4d = alloc_p4d_early;
|
|
|
|
pt_ops.get_p4d_virt = get_p4d_virt_early;
|
2021-12-06 10:46:47 +00:00
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* MMU is enabled but page table setup is not complete yet.
|
|
|
|
* fixmap page table alloc functions must be used as a means to temporarily
|
|
|
|
* map the allocated physical pages since the linear mapping does not exist yet.
|
|
|
|
*
|
|
|
|
* Note that this is called with MMU disabled, hence kernel_mapping_pa_to_va,
|
|
|
|
* but it will be used as described above.
|
|
|
|
*/
|
2022-05-16 14:32:04 +00:00
|
|
|
static void __init pt_ops_set_fixmap(void)
|
2021-12-06 10:46:47 +00:00
|
|
|
{
|
|
|
|
pt_ops.alloc_pte = kernel_mapping_pa_to_va((uintptr_t)alloc_pte_fixmap);
|
|
|
|
pt_ops.get_pte_virt = kernel_mapping_pa_to_va((uintptr_t)get_pte_virt_fixmap);
|
|
|
|
#ifndef __PAGETABLE_PMD_FOLDED
|
|
|
|
pt_ops.alloc_pmd = kernel_mapping_pa_to_va((uintptr_t)alloc_pmd_fixmap);
|
|
|
|
pt_ops.get_pmd_virt = kernel_mapping_pa_to_va((uintptr_t)get_pmd_virt_fixmap);
|
2021-12-06 10:46:51 +00:00
|
|
|
pt_ops.alloc_pud = kernel_mapping_pa_to_va((uintptr_t)alloc_pud_fixmap);
|
|
|
|
pt_ops.get_pud_virt = kernel_mapping_pa_to_va((uintptr_t)get_pud_virt_fixmap);
|
2022-01-27 02:48:42 +00:00
|
|
|
pt_ops.alloc_p4d = kernel_mapping_pa_to_va((uintptr_t)alloc_p4d_fixmap);
|
|
|
|
pt_ops.get_p4d_virt = kernel_mapping_pa_to_va((uintptr_t)get_p4d_virt_fixmap);
|
2021-12-06 10:46:47 +00:00
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* MMU is enabled and page table setup is complete, so from now, we can use
|
|
|
|
* generic page allocation functions to setup page table.
|
|
|
|
*/
|
2022-05-16 14:32:04 +00:00
|
|
|
static void __init pt_ops_set_late(void)
|
2021-12-06 10:46:47 +00:00
|
|
|
{
|
|
|
|
pt_ops.alloc_pte = alloc_pte_late;
|
|
|
|
pt_ops.get_pte_virt = get_pte_virt_late;
|
|
|
|
#ifndef __PAGETABLE_PMD_FOLDED
|
|
|
|
pt_ops.alloc_pmd = alloc_pmd_late;
|
|
|
|
pt_ops.get_pmd_virt = get_pmd_virt_late;
|
2021-12-06 10:46:51 +00:00
|
|
|
pt_ops.alloc_pud = alloc_pud_late;
|
|
|
|
pt_ops.get_pud_virt = get_pud_virt_late;
|
2022-01-27 02:48:42 +00:00
|
|
|
pt_ops.alloc_p4d = alloc_p4d_late;
|
|
|
|
pt_ops.get_p4d_virt = get_p4d_virt_late;
|
2021-12-06 10:46:47 +00:00
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
2019-06-28 20:36:21 +00:00
|
|
|
asmlinkage void __init setup_vm(uintptr_t dtb_pa)
|
2019-02-13 11:08:36 +00:00
|
|
|
{
|
2021-07-23 13:01:26 +00:00
|
|
|
pmd_t __maybe_unused fix_bmap_spmd, fix_bmap_epmd;
|
2019-06-28 20:36:21 +00:00
|
|
|
|
2021-06-17 13:53:07 +00:00
|
|
|
kernel_map.virt_addr = KERNEL_LINK_ADDR;
|
2021-12-06 10:46:51 +00:00
|
|
|
kernel_map.page_offset = _AC(CONFIG_PAGE_OFFSET, UL);
|
2021-06-17 13:53:07 +00:00
|
|
|
|
2021-04-13 06:35:14 +00:00
|
|
|
#ifdef CONFIG_XIP_KERNEL
|
2021-06-17 13:53:07 +00:00
|
|
|
kernel_map.xiprom = (uintptr_t)CONFIG_XIP_PHYS_ADDR;
|
|
|
|
kernel_map.xiprom_sz = (uintptr_t)(&_exiprom) - (uintptr_t)(&_xiprom);
|
2021-04-13 06:35:14 +00:00
|
|
|
|
2021-07-21 07:59:35 +00:00
|
|
|
phys_ram_base = CONFIG_PHYS_RAM_BASE;
|
2021-06-17 13:53:07 +00:00
|
|
|
kernel_map.phys_addr = (uintptr_t)CONFIG_PHYS_RAM_BASE;
|
|
|
|
kernel_map.size = (uintptr_t)(&_end) - (uintptr_t)(&_sdata);
|
2021-04-13 06:35:14 +00:00
|
|
|
|
2021-06-17 13:53:07 +00:00
|
|
|
kernel_map.va_kernel_xip_pa_offset = kernel_map.virt_addr - kernel_map.xiprom;
|
2021-04-13 06:35:14 +00:00
|
|
|
#else
|
2021-06-17 13:53:07 +00:00
|
|
|
kernel_map.phys_addr = (uintptr_t)(&_start);
|
|
|
|
kernel_map.size = (uintptr_t)(&_end) - kernel_map.phys_addr;
|
2021-04-13 06:35:14 +00:00
|
|
|
#endif
|
2021-12-06 10:46:51 +00:00
|
|
|
|
|
|
|
#if defined(CONFIG_64BIT) && !defined(CONFIG_XIP_KERNEL)
|
|
|
|
set_satp_mode();
|
|
|
|
#endif
|
|
|
|
|
2021-06-17 13:53:07 +00:00
|
|
|
kernel_map.va_pa_offset = PAGE_OFFSET - kernel_map.phys_addr;
|
|
|
|
kernel_map.va_kernel_pa_offset = kernel_map.virt_addr - kernel_map.phys_addr;
|
2019-02-13 11:08:36 +00:00
|
|
|
|
2021-07-28 07:15:57 +00:00
|
|
|
riscv_pfn_base = PFN_DOWN(kernel_map.phys_addr);
|
2019-02-13 11:08:36 +00:00
|
|
|
|
2021-12-06 10:46:45 +00:00
|
|
|
/*
|
|
|
|
* The default maximal physical memory size is KERN_VIRT_SIZE for 32-bit
|
|
|
|
* kernel, whereas for 64-bit kernel, the end of the virtual address
|
|
|
|
* space is occupied by the modules/BPF/kernel mappings which reduces
|
|
|
|
* the available size of the linear mapping.
|
|
|
|
*/
|
|
|
|
memory_limit = KERN_VIRT_SIZE - (IS_ENABLED(CONFIG_64BIT) ? SZ_4G : 0);
|
|
|
|
|
2019-02-13 11:08:36 +00:00
|
|
|
/* Sanity check alignment and size */
|
|
|
|
BUG_ON((PAGE_OFFSET % PGDIR_SIZE) != 0);
|
2021-07-23 13:01:25 +00:00
|
|
|
BUG_ON((kernel_map.phys_addr % PMD_SIZE) != 0);
|
2019-06-28 20:36:21 +00:00
|
|
|
|
2021-06-29 09:13:48 +00:00
|
|
|
#ifdef CONFIG_64BIT
|
|
|
|
/*
|
|
|
|
* The last 4K bytes of the addressable memory can not be mapped because
|
|
|
|
* of IS_ERR_VALUE macro.
|
|
|
|
*/
|
|
|
|
BUG_ON((kernel_map.virt_addr + kernel_map.size) > ADDRESS_SPACE_END - SZ_4K);
|
2020-09-17 22:37:12 +00:00
|
|
|
#endif
|
2021-06-29 09:13:48 +00:00
|
|
|
|
2022-05-11 19:29:21 +00:00
|
|
|
apply_early_boot_alternatives();
|
2021-12-06 10:46:47 +00:00
|
|
|
pt_ops_set_early();
|
|
|
|
|
2019-06-28 20:36:21 +00:00
|
|
|
/* Setup early PGD for fixmap */
|
|
|
|
create_pgd_mapping(early_pg_dir, FIXADDR_START,
|
2021-12-06 10:46:51 +00:00
|
|
|
fixmap_pgd_next, PGDIR_SIZE, PAGE_TABLE);
|
2019-02-13 11:08:36 +00:00
|
|
|
|
|
|
|
#ifndef __PAGETABLE_PMD_FOLDED
|
2022-01-27 02:48:42 +00:00
|
|
|
/* Setup fixmap P4D and PUD */
|
|
|
|
if (pgtable_l5_enabled)
|
|
|
|
create_p4d_mapping(fixmap_p4d, FIXADDR_START,
|
|
|
|
(uintptr_t)fixmap_pud, P4D_SIZE, PAGE_TABLE);
|
2021-12-06 10:46:51 +00:00
|
|
|
/* Setup fixmap PUD and PMD */
|
|
|
|
if (pgtable_l4_enabled)
|
|
|
|
create_pud_mapping(fixmap_pud, FIXADDR_START,
|
|
|
|
(uintptr_t)fixmap_pmd, PUD_SIZE, PAGE_TABLE);
|
2019-06-28 20:36:21 +00:00
|
|
|
create_pmd_mapping(fixmap_pmd, FIXADDR_START,
|
|
|
|
(uintptr_t)fixmap_pte, PMD_SIZE, PAGE_TABLE);
|
|
|
|
/* Setup trampoline PGD and PMD */
|
2021-06-17 13:53:07 +00:00
|
|
|
create_pgd_mapping(trampoline_pg_dir, kernel_map.virt_addr,
|
2021-12-06 10:46:51 +00:00
|
|
|
trampoline_pgd_next, PGDIR_SIZE, PAGE_TABLE);
|
2022-01-27 02:48:42 +00:00
|
|
|
if (pgtable_l5_enabled)
|
|
|
|
create_p4d_mapping(trampoline_p4d, kernel_map.virt_addr,
|
|
|
|
(uintptr_t)trampoline_pud, P4D_SIZE, PAGE_TABLE);
|
2021-12-06 10:46:51 +00:00
|
|
|
if (pgtable_l4_enabled)
|
|
|
|
create_pud_mapping(trampoline_pud, kernel_map.virt_addr,
|
|
|
|
(uintptr_t)trampoline_pmd, PUD_SIZE, PAGE_TABLE);
|
2021-04-13 06:35:14 +00:00
|
|
|
#ifdef CONFIG_XIP_KERNEL
|
2021-06-17 13:53:07 +00:00
|
|
|
create_pmd_mapping(trampoline_pmd, kernel_map.virt_addr,
|
|
|
|
kernel_map.xiprom, PMD_SIZE, PAGE_KERNEL_EXEC);
|
2021-04-13 06:35:14 +00:00
|
|
|
#else
|
2021-06-17 13:53:07 +00:00
|
|
|
create_pmd_mapping(trampoline_pmd, kernel_map.virt_addr,
|
|
|
|
kernel_map.phys_addr, PMD_SIZE, PAGE_KERNEL_EXEC);
|
2021-04-13 06:35:14 +00:00
|
|
|
#endif
|
2019-06-28 20:36:21 +00:00
|
|
|
#else
|
|
|
|
/* Setup trampoline PGD */
|
2021-06-17 13:53:07 +00:00
|
|
|
create_pgd_mapping(trampoline_pg_dir, kernel_map.virt_addr,
|
|
|
|
kernel_map.phys_addr, PGDIR_SIZE, PAGE_KERNEL_EXEC);
|
2019-06-28 20:36:21 +00:00
|
|
|
#endif
|
2019-02-13 11:08:36 +00:00
|
|
|
|
2019-06-28 20:36:21 +00:00
|
|
|
/*
|
2021-04-11 16:41:44 +00:00
|
|
|
* Setup early PGD covering entire kernel which will allow
|
2019-06-28 20:36:21 +00:00
|
|
|
* us to reach paging_init(). We map all memory banks later
|
|
|
|
* in setup_vm_final() below.
|
|
|
|
*/
|
2021-07-23 13:01:25 +00:00
|
|
|
create_kernel_page_table(early_pg_dir, true);
|
2019-06-28 20:36:21 +00:00
|
|
|
|
2021-07-23 13:01:28 +00:00
|
|
|
/* Setup early mapping for FDT early scan */
|
|
|
|
create_fdt_early_page_table(early_pg_dir, dtb_pa);
|
2020-09-17 22:37:11 +00:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Bootime fixmap only can handle PMD_SIZE mapping. Thus, boot-ioremap
|
|
|
|
* range can not span multiple pmds.
|
|
|
|
*/
|
2021-12-06 10:46:51 +00:00
|
|
|
BUG_ON((__fix_to_virt(FIX_BTMAP_BEGIN) >> PMD_SHIFT)
|
2020-09-17 22:37:11 +00:00
|
|
|
!= (__fix_to_virt(FIX_BTMAP_END) >> PMD_SHIFT));
|
|
|
|
|
|
|
|
#ifndef __PAGETABLE_PMD_FOLDED
|
|
|
|
/*
|
|
|
|
* Early ioremap fixmap is already created as it lies within first 2MB
|
|
|
|
* of fixmap region. We always map PMD_SIZE. Thus, both FIX_BTMAP_END
|
|
|
|
* FIX_BTMAP_BEGIN should lie in the same pmd. Verify that and warn
|
|
|
|
* the user if not.
|
|
|
|
*/
|
|
|
|
fix_bmap_spmd = fixmap_pmd[pmd_index(__fix_to_virt(FIX_BTMAP_BEGIN))];
|
|
|
|
fix_bmap_epmd = fixmap_pmd[pmd_index(__fix_to_virt(FIX_BTMAP_END))];
|
|
|
|
if (pmd_val(fix_bmap_spmd) != pmd_val(fix_bmap_epmd)) {
|
|
|
|
WARN_ON(1);
|
|
|
|
pr_warn("fixmap btmap start [%08lx] != end [%08lx]\n",
|
|
|
|
pmd_val(fix_bmap_spmd), pmd_val(fix_bmap_epmd));
|
|
|
|
pr_warn("fix_to_virt(FIX_BTMAP_BEGIN): %08lx\n",
|
|
|
|
fix_to_virt(FIX_BTMAP_BEGIN));
|
|
|
|
pr_warn("fix_to_virt(FIX_BTMAP_END): %08lx\n",
|
|
|
|
fix_to_virt(FIX_BTMAP_END));
|
|
|
|
|
|
|
|
pr_warn("FIX_BTMAP_END: %d\n", FIX_BTMAP_END);
|
|
|
|
pr_warn("FIX_BTMAP_BEGIN: %d\n", FIX_BTMAP_BEGIN);
|
|
|
|
}
|
|
|
|
#endif
|
2021-12-06 10:46:47 +00:00
|
|
|
|
|
|
|
pt_ops_set_fixmap();
|
2019-06-28 20:36:21 +00:00
|
|
|
}
|
2019-01-07 15:27:01 +00:00
|
|
|
|
2019-06-28 20:36:21 +00:00
|
|
|
static void __init setup_vm_final(void)
|
|
|
|
{
|
|
|
|
uintptr_t va, map_size;
|
|
|
|
phys_addr_t pa, start, end;
|
2020-10-13 23:58:08 +00:00
|
|
|
u64 i;
|
2019-06-28 20:36:21 +00:00
|
|
|
|
|
|
|
/* Setup swapper PGD for fixmap */
|
|
|
|
create_pgd_mapping(swapper_pg_dir, FIXADDR_START,
|
2020-01-02 03:12:40 +00:00
|
|
|
__pa_symbol(fixmap_pgd_next),
|
2019-06-28 20:36:21 +00:00
|
|
|
PGDIR_SIZE, PAGE_TABLE);
|
2019-01-07 15:27:01 +00:00
|
|
|
|
2021-04-11 16:41:44 +00:00
|
|
|
/* Map all memory banks in the linear mapping */
|
2020-10-13 23:58:08 +00:00
|
|
|
for_each_mem_range(i, &start, &end) {
|
2019-06-28 20:36:21 +00:00
|
|
|
if (start >= end)
|
|
|
|
break;
|
|
|
|
if (start <= __pa(PAGE_OFFSET) &&
|
|
|
|
__pa(PAGE_OFFSET) < end)
|
|
|
|
start = __pa(PAGE_OFFSET);
|
2021-06-29 09:13:47 +00:00
|
|
|
if (end >= __pa(PAGE_OFFSET) + memory_limit)
|
|
|
|
end = __pa(PAGE_OFFSET) + memory_limit;
|
2019-06-28 20:36:21 +00:00
|
|
|
|
|
|
|
map_size = best_map_size(start, end - start);
|
|
|
|
for (pa = start; pa < end; pa += map_size) {
|
|
|
|
va = (uintptr_t)__va(pa);
|
2021-04-11 16:41:44 +00:00
|
|
|
|
2021-06-24 12:00:41 +00:00
|
|
|
create_pgd_mapping(swapper_pg_dir, va, pa, map_size,
|
|
|
|
pgprot_from_va(va));
|
2019-06-28 20:36:21 +00:00
|
|
|
}
|
2019-02-13 11:08:36 +00:00
|
|
|
}
|
2019-01-07 15:27:01 +00:00
|
|
|
|
2021-04-11 16:41:44 +00:00
|
|
|
/* Map the kernel */
|
2021-12-06 15:03:50 +00:00
|
|
|
if (IS_ENABLED(CONFIG_64BIT))
|
|
|
|
create_kernel_page_table(swapper_pg_dir, false);
|
2021-04-11 16:41:44 +00:00
|
|
|
|
2021-12-06 10:46:46 +00:00
|
|
|
#ifdef CONFIG_KASAN
|
|
|
|
kasan_swapper_init();
|
|
|
|
#endif
|
|
|
|
|
2019-06-28 20:36:21 +00:00
|
|
|
/* Clear fixmap PTE and PMD mappings */
|
|
|
|
clear_fixmap(FIX_PTE);
|
|
|
|
clear_fixmap(FIX_PMD);
|
2021-12-06 10:46:51 +00:00
|
|
|
clear_fixmap(FIX_PUD);
|
2022-01-27 02:48:42 +00:00
|
|
|
clear_fixmap(FIX_P4D);
|
2019-06-28 20:36:21 +00:00
|
|
|
|
|
|
|
/* Move to swapper page table */
|
2021-12-06 10:46:51 +00:00
|
|
|
csr_write(CSR_SATP, PFN_DOWN(__pa_symbol(swapper_pg_dir)) | satp_mode);
|
2019-06-28 20:36:21 +00:00
|
|
|
local_flush_tlb_all();
|
2020-09-17 22:37:12 +00:00
|
|
|
|
2021-12-06 10:46:47 +00:00
|
|
|
pt_ops_set_late();
|
2019-06-28 20:36:21 +00:00
|
|
|
}
|
2019-10-28 12:10:41 +00:00
|
|
|
#else
|
|
|
|
asmlinkage void __init setup_vm(uintptr_t dtb_pa)
|
|
|
|
{
|
|
|
|
dtb_early_va = (void *)dtb_pa;
|
2020-10-01 19:04:56 +00:00
|
|
|
dtb_early_pa = dtb_pa;
|
2019-10-28 12:10:41 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static inline void setup_vm_final(void)
|
|
|
|
{
|
|
|
|
}
|
|
|
|
#endif /* CONFIG_MMU */
|
2019-06-28 20:36:21 +00:00
|
|
|
|
2021-04-19 00:55:38 +00:00
|
|
|
/*
|
|
|
|
* reserve_crashkernel() - reserves memory for crash kernel
|
|
|
|
*
|
|
|
|
* This function reserves memory area given in "crashkernel=" kernel command
|
|
|
|
* line parameter. The memory reserved is used by dump capture kernel when
|
|
|
|
* primary kernel is crashing.
|
|
|
|
*/
|
|
|
|
static void __init reserve_crashkernel(void)
|
|
|
|
{
|
|
|
|
unsigned long long crash_base = 0;
|
|
|
|
unsigned long long crash_size = 0;
|
|
|
|
unsigned long search_start = memblock_start_of_DRAM();
|
|
|
|
unsigned long search_end = memblock_end_of_DRAM();
|
|
|
|
|
|
|
|
int ret = 0;
|
|
|
|
|
2022-03-23 23:06:36 +00:00
|
|
|
if (!IS_ENABLED(CONFIG_KEXEC_CORE))
|
|
|
|
return;
|
2021-04-19 00:55:39 +00:00
|
|
|
/*
|
|
|
|
* Don't reserve a region for a crash kernel on a crash kernel
|
|
|
|
* since it doesn't make much sense and we have limited memory
|
|
|
|
* resources.
|
|
|
|
*/
|
|
|
|
if (is_kdump_kernel()) {
|
|
|
|
pr_info("crashkernel: ignoring reservation request\n");
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2021-04-19 00:55:38 +00:00
|
|
|
ret = parse_crashkernel(boot_command_line, memblock_phys_mem_size(),
|
|
|
|
&crash_size, &crash_base);
|
|
|
|
if (ret || !crash_size)
|
|
|
|
return;
|
|
|
|
|
|
|
|
crash_size = PAGE_ALIGN(crash_size);
|
|
|
|
|
2021-09-02 22:00:26 +00:00
|
|
|
if (crash_base) {
|
|
|
|
search_start = crash_base;
|
|
|
|
search_end = crash_base + crash_size;
|
|
|
|
}
|
2021-04-19 00:55:38 +00:00
|
|
|
|
2021-09-02 22:00:26 +00:00
|
|
|
/*
|
|
|
|
* Current riscv boot protocol requires 2MB alignment for
|
|
|
|
* RV64 and 4MB alignment for RV32 (hugepage size)
|
2021-11-26 18:04:11 +00:00
|
|
|
*
|
|
|
|
* Try to alloc from 32bit addressible physical memory so that
|
|
|
|
* swiotlb can work on the crash kernel.
|
2021-09-02 22:00:26 +00:00
|
|
|
*/
|
|
|
|
crash_base = memblock_phys_alloc_range(crash_size, PMD_SIZE,
|
2021-11-26 18:04:11 +00:00
|
|
|
search_start,
|
|
|
|
min(search_end, (unsigned long) SZ_4G));
|
2021-09-02 22:00:26 +00:00
|
|
|
if (crash_base == 0) {
|
2021-11-26 18:04:11 +00:00
|
|
|
/* Try again without restricting region to 32bit addressible memory */
|
|
|
|
crash_base = memblock_phys_alloc_range(crash_size, PMD_SIZE,
|
|
|
|
search_start, search_end);
|
|
|
|
if (crash_base == 0) {
|
|
|
|
pr_warn("crashkernel: couldn't allocate %lldKB\n",
|
|
|
|
crash_size >> 10);
|
|
|
|
return;
|
|
|
|
}
|
2021-04-19 00:55:38 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
pr_info("crashkernel: reserved 0x%016llx - 0x%016llx (%lld MB)\n",
|
|
|
|
crash_base, crash_base + crash_size, crash_size >> 20);
|
|
|
|
|
|
|
|
crashk_res.start = crash_base;
|
|
|
|
crashk_res.end = crash_base + crash_size - 1;
|
|
|
|
}
|
|
|
|
|
2019-06-28 20:36:21 +00:00
|
|
|
void __init paging_init(void)
|
|
|
|
{
|
2021-05-10 11:42:22 +00:00
|
|
|
setup_bootmem();
|
2019-06-28 20:36:21 +00:00
|
|
|
setup_vm_final();
|
2020-11-19 00:38:27 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
void __init misc_mem_init(void)
|
|
|
|
{
|
2021-02-25 06:54:17 +00:00
|
|
|
early_memtest(min_low_pfn << PAGE_SHIFT, max_low_pfn << PAGE_SHIFT);
|
2020-11-19 00:38:29 +00:00
|
|
|
arch_numa_init();
|
2020-11-19 00:38:27 +00:00
|
|
|
sparse_init();
|
2019-06-28 20:36:21 +00:00
|
|
|
zone_sizes_init();
|
2021-04-19 00:55:38 +00:00
|
|
|
reserve_crashkernel();
|
2020-11-19 00:38:29 +00:00
|
|
|
memblock_dump_all();
|
2019-02-13 11:08:36 +00:00
|
|
|
}
|
2019-08-28 21:40:54 +00:00
|
|
|
|
2019-10-23 03:23:02 +00:00
|
|
|
#ifdef CONFIG_SPARSEMEM_VMEMMAP
|
2019-08-28 21:40:54 +00:00
|
|
|
int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node,
|
|
|
|
struct vmem_altmap *altmap)
|
|
|
|
{
|
2020-08-07 06:23:19 +00:00
|
|
|
return vmemmap_populate_basepages(start, end, node, NULL);
|
2019-08-28 21:40:54 +00:00
|
|
|
}
|
|
|
|
#endif
|