Chen-Yu Tsai cd6eb534fb clk: sunxi: Fix gate indexing for sun6i-a31-apb0-gates ... sun6i-a31-apb0-gates supports using clock-indices for holes between individual gates. However, the driver passes the number of gates registered in clk_data->clk_num, which of_clk_src_onecell_get uses to recognize the range of valid indices a consumer can use. This patch makes the driver pass the maximum gate index + 1, so of_clk_src_onecell_get does not complain about indices greater than gates registered. This was tested on the A23 SoC, which has a similar APB0 clock, but has holes for gates to removed IP blocks. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>		2014-07-07 10:53:52 +02:00
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clk-a10-hosc.c	clk: sunxi: Move the 24M oscillator to a file of its own	2014-06-11 09:58:44 +02:00
clk-a20-gmac.c	clk: sunxi: Move the GMAC clock to a file of its own	2014-06-11 09:58:44 +02:00
clk-factors.c	clk: sunxi: Support factor clocks with N factor starting not from 0	2014-07-04 12:05:12 +02:00
clk-factors.h	clk: sunxi: Support factor clocks with N factor starting not from 0	2014-07-04 12:05:12 +02:00
clk-sun6i-apb0-gates.c	clk: sunxi: Fix gate indexing for sun6i-a31-apb0-gates	2014-07-07 10:53:52 +02:00
clk-sun6i-apb0.c	clk: sunxi: add PRCM (Power/Reset/Clock Management) clks support	2014-06-11 10:25:02 +02:00
clk-sun6i-ar100.c	clk: sunxi: add PRCM (Power/Reset/Clock Management) clks support	2014-06-11 10:25:02 +02:00
clk-sun8i-apb0.c	clk: sunxi: Add A23 APB0 divider clock support	2014-07-07 10:46:21 +02:00
clk-sunxi.c	clk: sunxi: Add A23 clocks support	2014-07-04 12:05:17 +02:00
Makefile	clk: sunxi: Add A23 APB0 divider clock support	2014-07-07 10:46:21 +02:00