linux/arch/arm64/mm
Dave Martin c0cda3b8ee arm64: capabilities: Update prototype for enable call back
We issue the enable() call back for all CPU hwcaps capabilities
available on the system, on all the CPUs. So far we have ignored
the argument passed to the call back, which had a prototype to
accept a "void *" for use with on_each_cpu() and later with
stop_machine(). However, with commit 0a0d111d40
("arm64: cpufeature: Pass capability structure to ->enable callback"),
there are some users of the argument who wants the matching capability
struct pointer where there are multiple matching criteria for a single
capability. Clean up the declaration of the call back to make it clear.

 1) Renamed to cpu_enable(), to imply taking necessary actions on the
    called CPU for the entry.
 2) Pass const pointer to the capability, to allow the call back to
    check the entry. (e.,g to check if any action is needed on the CPU)
 3) We don't care about the result of the call back, turning this to
    a void.

Cc: Will Deacon <will.deacon@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Andre Przywara <andre.przywara@arm.com>
Cc: James Morse <james.morse@arm.com>
Acked-by: Robin Murphy <robin.murphy@arm.com>
Reviewed-by: Julien Thierry <julien.thierry@arm.com>
Signed-off-by: Dave Martin <dave.martin@arm.com>
[suzuki: convert more users, rename call back and drop results]
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
2018-03-26 18:00:37 +01:00
..
cache.S arm64: Add support for new control bits CTR_EL0.DIC and CTR_EL0.IDC 2018-03-09 13:57:57 +00:00
context.c arm64: Move BP hardening to check_and_switch_context 2018-01-23 15:40:29 +00:00
copypage.c arm64: Defer dcache flush in __cpu_copy_user_page 2015-12-17 11:07:13 +00:00
dma-mapping.c arm64: Revert L1_CACHE_SHIFT back to 6 (64-byte cache line size) 2018-03-06 18:52:32 +00:00
dump.c arm64: mm: Use READ_ONCE/WRITE_ONCE when accessing page tables 2018-02-16 18:13:57 +00:00
extable.c License cleanup: add SPDX GPL-2.0 license identifier to files with no license 2017-11-02 11:10:55 +01:00
fault.c arm64: capabilities: Update prototype for enable call back 2018-03-26 18:00:37 +01:00
flush.c arm64: fix pmem interface definition 2017-08-10 18:13:59 +01:00
hugetlbpage.c arm64: mm: Use READ_ONCE/WRITE_ONCE when accessing page tables 2018-02-16 18:13:57 +00:00
init.c arm64: Revert L1_CACHE_SHIFT back to 6 (64-byte cache line size) 2018-03-06 18:52:32 +00:00
ioremap.c arm64: use is_vmalloc_addr 2017-02-09 13:47:56 +00:00
kasan_init.c arm64: mm: Use READ_ONCE/WRITE_ONCE when accessing page tables 2018-02-16 18:13:57 +00:00
Makefile License cleanup: add SPDX GPL-2.0 license identifier to files with no license 2017-11-02 11:10:55 +01:00
mmap.c arm64/mmap: properly account for stack randomization in mmap_base 2017-07-12 16:26:03 -07:00
mmu.c arm64: Enforce BBM for huge IO/VMAP mappings 2018-02-22 11:25:53 +00:00
numa.c arm64/numa: Drop duplicate message 2017-07-20 17:03:53 +01:00
pageattr.c arm64: mm: Use READ_ONCE/WRITE_ONCE when accessing page tables 2018-02-16 18:13:57 +00:00
pgd.c arm64: handle 52-bit addresses in TTBR 2017-12-22 17:35:21 +00:00
physaddr.c License cleanup: add SPDX GPL-2.0 license identifier to files with no license 2017-11-02 11:10:55 +01:00
proc.S arm64: kaslr: Set TCR_EL1.NFD1 when CONFIG_RANDOMIZE_BASE=y 2018-03-06 18:52:34 +00:00
ptdump_debugfs.c License cleanup: add SPDX GPL-2.0 license identifier to files with no license 2017-11-02 11:10:55 +01:00