Chen-Yu Tsai 7f3ed79188 clk: sunxi-ng: sun6i: Rename HDMI DDC clock to avoid name collision ... The HDMI DDC clock found in the CCU is the parent of the actual DDC clock within the HDMI controller. That clock is also named "hdmi-ddc". Rename the one in the CCU to "ddc". This makes more sense than renaming the one in the HDMI controller to something else. Fixes: c6e6c96d8f ("clk: sunxi-ng: Add A31/A31s clocks") Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>		2017-09-29 10:46:17 +02:00
..
ccu_common.c	Allwinner clock patches for 4.12	2017-04-19 09:02:00 -07:00
ccu_common.h	clk: sunxi-ng: Add interface to query or configure MMC timing modes.	2017-08-30 14:01:47 +02:00
ccu_div.c	clk: sunxi-ng: div: Add support for fixed post-divider	2017-08-14 22:31:46 +08:00
ccu_div.h	clk: sunxi-ng: div: Add support for fixed post-divider	2017-08-14 22:31:46 +08:00
ccu_frac.c	clk: sunxi-ng: Wait for lock when using fractional mode	2017-08-01 10:18:23 +08:00
ccu_frac.h	clk: sunxi-ng: Wait for lock when using fractional mode	2017-08-01 10:18:23 +08:00
ccu_gate.c	clk: sunxi-ng: gate: Support common pre-dividers	2017-03-06 10:25:56 +01:00
ccu_gate.h	clk: sunxi-ng: Add gate clock support	2016-07-08 18:04:38 -07:00
ccu_mmc_timing.c	clk: sunxi-ng: Add interface to query or configure MMC timing modes.	2017-08-30 14:01:47 +02:00
ccu_mp.c	clk: sunxi-ng: Add MP_MMC clocks that support MMC timing modes switching	2017-08-30 14:01:47 +02:00
ccu_mp.h	clk: sunxi-ng: Add MP_MMC clocks that support MMC timing modes switching	2017-08-30 14:01:47 +02:00
ccu_mult.c	clk: sunxi-ng: Wait for lock when using fractional mode	2017-08-01 10:18:23 +08:00
ccu_mult.h	clk: sunxi-ng: mult: Support PLL lock detection	2017-04-05 09:01:41 +02:00
ccu_mux.c	clk: sunxi-ng: Staticize ccu_mux_helper_unapply_prediv()	2017-06-16 14:51:36 -07:00
ccu_mux.h	clk: sunxi-ng: Support multiple variable pre-dividers	2017-06-07 15:32:15 +02:00
ccu_nk.c	clk: sunxi-ng: use 1 as fallback for minimum multiplier	2017-04-13 14:09:25 +02:00
ccu_nk.h	clk: sunxi-ng: Rename the internal structures	2016-10-20 19:24:20 +02:00
ccu_nkm.c	clk: sunxi-ng: nkm: add support for fixed post-divider	2017-08-14 22:45:06 +08:00
ccu_nkm.h	clk: sunxi-ng: nkm: add support for fixed post-divider	2017-08-14 22:45:06 +08:00
ccu_nkmp.c	Allwinner clock changes, take 2	2017-04-21 19:19:46 -07:00
ccu_nkmp.h	clk: sunxi-ng: Rename the internal structures	2016-10-20 19:24:20 +02:00
ccu_nm.c	clk: sunxi-ng: Wait for lock when using fractional mode	2017-08-01 10:18:23 +08:00
ccu_nm.h	clk: sunxi-ng: Rename the internal structures	2016-10-20 19:24:20 +02:00
ccu_phase.c	clk: sunxi-ng: Add phase clock support	2016-07-08 18:04:45 -07:00
ccu_phase.h	clk: sunxi-ng: Add phase clock support	2016-07-08 18:04:45 -07:00
ccu_reset.c	clk: sunxi-ng: Implement reset control status readback	2017-09-26 11:13:03 +02:00
ccu_reset.h	clk: sunxi-ng: explicitly include linux/spinlock.h	2017-06-07 15:32:12 +02:00
ccu-sun4i-a10.c	clk: sunxi-ng: Fix missing CLK_SET_RATE_PARENT in ccu-sun4i-a10.c	2017-09-17 12:03:08 +02:00
ccu-sun4i-a10.h	clk: sunxi-ng: Add sun4i/sun7i CCU driver	2017-08-24 10:15:54 +02:00
ccu-sun5i.c	Merge branch 'clk-fixes' into clk-next	2017-08-02 18:38:01 -07:00
ccu-sun5i.h	clk: sunxi-ng: sun5i: Export video PLLs	2017-06-07 15:32:14 +02:00
ccu-sun6i-a31.c	clk: sunxi-ng: sun6i: Rename HDMI DDC clock to avoid name collision	2017-09-29 10:46:17 +02:00
ccu-sun6i-a31.h	clk: sunxi-ng: sun6i: Export video PLLs	2017-09-29 10:46:10 +02:00
ccu-sun8i-a23-a33.h	clk: sunxi-ng: Add A33 CCU support	2016-09-10 11:41:19 +02:00
ccu-sun8i-a23.c	clk: Convert to using %pOF instead of full_name	2017-07-21 15:49:54 -07:00
ccu-sun8i-a33.c	clk: Convert to using %pOF instead of full_name	2017-07-21 15:49:54 -07:00
ccu-sun8i-a83t.c	clk: sunxi-ng: a83t: Support new timing mode for mmc2 clock	2017-08-30 14:01:48 +02:00
ccu-sun8i-a83t.h	clk: sunxi-ng: Add driver for A83T CCU	2017-06-07 15:32:16 +02:00
ccu-sun8i-de2.c	clk: sunxi-ng: de2: fix wrong pointer passed to PTR_ERR()	2017-06-07 15:32:14 +02:00
ccu-sun8i-de2.h	clk: sunxi-ng: add support for DE2 CCU	2017-06-07 15:32:12 +02:00
ccu-sun8i-h3.c	clk: sunxi-ng: add CLK_SET_RATE_PARENT flag to H3 GPU clock	2017-09-17 12:03:08 +02:00
ccu-sun8i-h3.h	clk: sunxi-ng: h3: Export PLL_PERIPH0 clock for the PRCM	2017-05-31 21:57:27 +02:00
ccu-sun8i-r40.c	clk: sunxi-ng: support R40 SoC	2017-08-19 17:04:37 +08:00
ccu-sun8i-r40.h	clk: sunxi-ng: support R40 SoC	2017-08-19 17:04:37 +08:00
ccu-sun8i-r.c	clk: Convert to using %pOF instead of full_name	2017-07-21 15:49:54 -07:00
ccu-sun8i-r.h	clk: sunxi-ng: Fix header guard of ccu-sun8i-r.h	2017-07-27 16:53:47 +02:00
ccu-sun8i-v3s.c	clk: Convert to using %pOF instead of full_name	2017-07-21 15:49:54 -07:00
ccu-sun8i-v3s.h	clk: sunxi-ng: add support for V3s CCU	2017-01-20 21:39:03 +01:00
ccu-sun9i-a80-de.c	clk: sunxi-ng: sun9i-a80: Fix wrong pointer passed to PTR_ERR()	2017-02-06 15:01:29 -08:00
ccu-sun9i-a80-de.h	clk: sunxi-ng: Add A80 Display Engine CCU	2017-01-30 08:38:30 +01:00
ccu-sun9i-a80-usb.c	clk: sunxi-ng: Add A80 USB CCU	2017-01-30 08:37:51 +01:00
ccu-sun9i-a80-usb.h	clk: sunxi-ng: Add A80 USB CCU	2017-01-30 08:37:51 +01:00
ccu-sun9i-a80.c	clk: sunxi-ng: a80: Fix audio PLL comment not matching actual code	2017-04-13 14:09:30 +02:00
ccu-sun9i-a80.h	clk: sunxi-ng: Add A80 CCU	2017-01-30 08:37:30 +01:00
ccu-sun50i-a64.c	clk: sunxi-ng: Support multiple variable pre-dividers	2017-06-07 15:32:15 +02:00
ccu-sun50i-a64.h	clk: sunxi-ng: a64: Export PLL_PERIPH0 clock for the PRCM	2017-05-31 21:57:30 +02:00
Kconfig	clk: sunxi-ng: Add sun4i/sun7i CCU driver	2017-08-24 10:15:54 +02:00
Makefile	The diff is dominated by the Allwinner A10/A20 SoCs getting converted to	2017-09-13 11:04:14 -07:00