mirror of
https://github.com/torvalds/linux.git
synced 2024-12-18 17:12:55 +00:00
7f31c9595e
Relax the tlb flush condition since we will write-protect the spte out of mmu
lock. Note lockless write-protection only marks the writable spte to readonly
and the spte can be writable only if both SPTE_HOST_WRITEABLE and
SPTE_MMU_WRITEABLE are set (that are tested by spte_is_locklessly_modifiable)
This patch is used to avoid this kind of race:
VCPU 0 VCPU 1
lockless wirte protection:
set spte.w = 0
lock mmu-lock
write protection the spte to sync shadow page,
see spte.w = 0, then without flush tlb
unlock mmu-lock
!!! At this point, the shadow page can still be
writable due to the corrupt tlb entry
Flush all TLB
Reviewed-by: Marcelo Tosatti <mtosatti@redhat.com>
Signed-off-by: Xiao Guangrong <xiaoguangrong@linux.vnet.ibm.com>
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
|
||
|---|---|---|
| .. | ||
| cpuid.c | ||
| cpuid.h | ||
| emulate.c | ||
| i8254.c | ||
| i8254.h | ||
| i8259.c | ||
| irq.c | ||
| irq.h | ||
| Kconfig | ||
| kvm_cache_regs.h | ||
| lapic.c | ||
| lapic.h | ||
| Makefile | ||
| mmu_audit.c | ||
| mmu.c | ||
| mmu.h | ||
| mmutrace.h | ||
| paging_tmpl.h | ||
| pmu.c | ||
| svm.c | ||
| trace.h | ||
| tss.h | ||
| vmx.c | ||
| x86.c | ||
| x86.h | ||