Tiezhu Yang 5fa1f7680f MIPS: Loongson64: Add UART node for LS7A PCH ... When I update the latest kernel on the Loongson platform used with LS7A bridge chip, the serial console has no output, this is because the machine uses LS7A UART0 instead of CPU UART0, add UART node for LS7A PCH to enhance the compatibility. Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>		2020-09-21 22:19:07 +02:00
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brcm	arch: mips: brcm: Add 7425 flash-edu support	2020-03-11 16:21:35 +01:00
cavium-octeon	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500	2019-06-19 17:09:55 +02:00
img	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500	2019-06-19 17:09:55 +02:00
ingenic	MIPS: Ingenic: Add CPU nodes for Ingenic SoCs.	2020-09-21 22:17:38 +02:00
lantiq	MIPS: dts: Change upper case to lower case	2018-10-15 23:11:15 -07:00
loongson	MIPS: Loongson64: Add UART node for LS7A PCH	2020-09-21 22:19:07 +02:00
mscc	MIPS: dts: ocelot: describe the load/save GPIO	2020-06-24 14:33:16 -07:00
mti	MIPS: malta: Use img-ascii-lcd driver for LCD display	2018-11-20 21:05:39 -08:00
netlogic	MIPS: dts: Avoid unneeded built-in.a in DTS dirs	2018-04-23 16:38:53 +01:00
ni	treewide: Add SPDX license identifier - Makefile/Kconfig	2019-05-21 10:50:46 +02:00
pic32	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500	2019-06-19 17:09:55 +02:00
qca	MIPS: ath79: ar9331: rename uart to serial node	2020-05-15 09:33:46 +02:00
ralink	MIPS: ralink: dts: gardena_smart_gateway_mt7688: Limit UART1	2020-01-14 16:02:34 -08:00
xilfpga	MIPS: Use lower case for addresses in nexys4ddr.dts	2019-02-04 11:55:49 -08:00
Makefile	MIPS: DTS: Fix build errors used with various configs	2020-05-28 09:35:47 +02:00