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4f2ebe0059
This allows to explicitly specify the covered bus numbers in the devicetree, which will come in handy once we see a SoC with more than one PCIe host controller instance. Previously the driver relied on the behavior of pci_scan_root_bus() to fill in a range of 0x00-0xff if no valid range was found. We fall back to the same range if no valid DT entry was found to keep backwards compatibility, but now do it explicitly. [bhelgaas: use %pR in error message to avoid duplication] Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Pratyush Anand <pratyush.anand@st.com> Acked-by: Mohit Kumar <mohit.kumar@st.com> |
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| .. | ||
| 83xx-512x-pci.txt | ||
| designware-pcie.txt | ||
| fsl,imx6q-pcie.txt | ||
| host-generic-pci.txt | ||
| mvebu-pci.txt | ||
| nvidia,tegra20-pcie.txt | ||
| pci-rcar-gen2.txt | ||
| pci.txt | ||
| ralink,rt3883-pci.txt | ||
| rcar-pci.txt | ||
| samsung,exynos5440-pcie.txt | ||
| spear13xx-pcie.txt | ||
| ti-pci.txt | ||
| v3-v360epc-pci.txt | ||