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3b56496865
This adds the workaround for erratum 793 as a precaution in case not every BIOS implements it. This addresses CVE-2013-6885. Erratum text: [Revision Guide for AMD Family 16h Models 00h-0Fh Processors, document 51810 Rev. 3.04 November 2013] 793 Specific Combination of Writes to Write Combined Memory Types and Locked Instructions May Cause Core Hang Description Under a highly specific and detailed set of internal timing conditions, a locked instruction may trigger a timing sequence whereby the write to a write combined memory type is not flushed, causing the locked instruction to stall indefinitely. Potential Effect on System Processor core hang. Suggested Workaround BIOS should set MSR C001_1020[15] = 1b. Fix Planned No fix planned [ hpa: updated description, fixed typo in MSR name ] Signed-off-by: Borislav Petkov <bp@suse.de> Link: http://lkml.kernel.org/r/20140114230711.GS29865@pd.tnic Tested-by: Aravind Gopalakrishnan <aravind.gopalakrishnan@amd.com> Signed-off-by: H. Peter Anvin <hpa@linux.intel.com> |
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| .. | ||
| a.out.h | ||
| auxvec.h | ||
| bitsperlong.h | ||
| boot.h | ||
| bootparam.h | ||
| byteorder.h | ||
| debugreg.h | ||
| e820.h | ||
| errno.h | ||
| fcntl.h | ||
| hw_breakpoint.h | ||
| hyperv.h | ||
| ioctl.h | ||
| ioctls.h | ||
| ipcbuf.h | ||
| ist.h | ||
| Kbuild | ||
| kvm_para.h | ||
| kvm.h | ||
| ldt.h | ||
| mce.h | ||
| mman.h | ||
| msgbuf.h | ||
| msr-index.h | ||
| msr.h | ||
| mtrr.h | ||
| param.h | ||
| perf_regs.h | ||
| poll.h | ||
| posix_types_32.h | ||
| posix_types_64.h | ||
| posix_types_x32.h | ||
| posix_types.h | ||
| prctl.h | ||
| processor-flags.h | ||
| ptrace-abi.h | ||
| ptrace.h | ||
| resource.h | ||
| sembuf.h | ||
| setup.h | ||
| shmbuf.h | ||
| sigcontext32.h | ||
| sigcontext.h | ||
| siginfo.h | ||
| signal.h | ||
| socket.h | ||
| sockios.h | ||
| stat.h | ||
| statfs.h | ||
| svm.h | ||
| swab.h | ||
| termbits.h | ||
| termios.h | ||
| types.h | ||
| ucontext.h | ||
| unistd.h | ||
| vm86.h | ||
| vmx.h | ||
| vsyscall.h | ||