linux/drivers/clk/renesas
Geert Uytterhoeven 1b131e08e7 clk: renesas: rcar-gen4: Add support for fractional multiplication
R-Car Gen4 PLLs support fractional multiplication, which can improve
accuracy when configuring a specific frequency.

Add support for fractional multiplication to the custom clock driver
for PLLs, which is currently used only for PLL2 on R-Car V4H.
While at it, add the missing blank line after the function.

Note that Fractional Multiplication is not enabled by the driver,
but used only if the boot loaded enabled it before.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/1a58ebef6f54460f49fb81ba9bbf288164de2646.1721648548.git.geert+renesas@glider.be
2024-07-30 10:44:18 +02:00
..
clk-div6.c clk: renesas: div6: Implement range checking 2021-05-11 09:58:13 +02:00
clk-div6.h We have two changes to the core framework this time around. The first being a 2017-11-17 20:04:24 -08:00
clk-emev2.c clk: renesas: emev2: Remove obsolete clkdev registration 2023-07-27 14:32:41 +02:00
clk-mstp.c clk: renesas: mstp: Remove obsolete clkdev registration 2024-01-23 21:23:47 +01:00
clk-r8a73a4.c clk: renesas: shmobile: Remove unused CLK_ENABLE_ON_INIT 2024-04-25 10:38:19 +02:00
clk-r8a7740.c clk: renesas: shmobile: Remove unused CLK_ENABLE_ON_INIT 2024-04-25 10:38:19 +02:00
clk-r8a7778.c clk: renesas: r8a7778: Remove struct r8a7778_cpg 2022-06-13 11:53:18 +02:00
clk-r8a7779.c clk: renesas: r8a7779: Remove struct r8a7779_cpg 2022-06-13 11:53:18 +02:00
clk-rz.c clk: renesas: rza1: Remove struct rz_cpg 2022-06-13 11:53:18 +02:00
clk-sh73a0.c clk: renesas: shmobile: Remove unused CLK_ENABLE_ON_INIT 2024-04-25 10:38:19 +02:00
Kconfig clk: renesas: Drop "Renesas" from individual driver descriptions 2024-06-24 15:51:06 +02:00
Makefile clk: renesas: cpg-mssr: Add support for R-Car V4M 2024-01-31 11:19:21 +01:00
r7s9210-cpg-mssr.c clk: renesas: cpg-mssr: Use enum clk_reg_layout instead of a boolean flag 2020-09-17 15:30:08 +02:00
r8a774a1-cpg-mssr.c clk: renesas: rcar-gen3: Add ADG clocks 2023-08-15 11:34:43 +02:00
r8a774b1-cpg-mssr.c clk: renesas: rcar-gen3: Add ADG clocks 2023-08-15 11:34:43 +02:00
r8a774c0-cpg-mssr.c clk: renesas: rcar-gen3: Add ADG clocks 2023-08-15 11:34:43 +02:00
r8a774e1-cpg-mssr.c clk: renesas: rcar-gen3: Add ADG clocks 2023-08-15 11:34:43 +02:00
r8a779a0-cpg-mssr.c clk: renesas: rcar-gen4: Use defines for common CPG registers 2024-07-30 10:44:18 +02:00
r8a779f0-cpg-mssr.c clk: renesas: rcar-gen4: Use defines for common CPG registers 2024-07-30 10:44:18 +02:00
r8a779g0-cpg-mssr.c clk: renesas: rcar-gen4: Use defines for common CPG registers 2024-07-30 10:44:18 +02:00
r8a779h0-cpg-mssr.c clk: renesas: rcar-gen4: Use defines for common CPG registers 2024-07-30 10:44:18 +02:00
r8a7742-cpg-mssr.c clk: renesas: r8a7742: Add clk entry for VSPR 2020-09-04 09:42:01 +02:00
r8a7743-cpg-mssr.c clk: renesas: rcar-gen2: Rename vsp1-(sy|rt) clocks to vsp(s|r) 2020-09-04 09:42:01 +02:00
r8a7745-cpg-mssr.c clk: renesas: rcar-gen2: Rename vsp1-(sy|rt) clocks to vsp(s|r) 2020-09-04 09:42:01 +02:00
r8a7790-cpg-mssr.c clk: renesas: rcar-gen2: Rename vsp1-(sy|rt) clocks to vsp(s|r) 2020-09-04 09:42:01 +02:00
r8a7791-cpg-mssr.c clk: renesas: rcar-gen2: Rename vsp1-(sy|rt) clocks to vsp(s|r) 2020-09-04 09:42:01 +02:00
r8a7792-cpg-mssr.c clk: renesas: rcar-gen2: Rename vsp1-(sy|rt) clocks to vsp(s|r) 2020-09-04 09:42:01 +02:00
r8a7794-cpg-mssr.c clk: renesas: rcar-gen2: Rename vsp1-(sy|rt) clocks to vsp(s|r) 2020-09-04 09:42:01 +02:00
r8a7795-cpg-mssr.c clk: renesas: r8a7795: Constify r8a7795_*_clks 2023-09-26 09:38:00 +02:00
r8a7796-cpg-mssr.c clk: renesas: rcar-gen3: Add ADG clocks 2023-08-15 11:34:43 +02:00
r8a77470-cpg-mssr.c clk: renesas: rcar-gen2: Rename vsp1-(sy|rt) clocks to vsp(s|r) 2020-09-04 09:42:01 +02:00
r8a77965-cpg-mssr.c clk: renesas: rcar-gen3: Add ADG clocks 2023-08-15 11:34:43 +02:00
r8a77970-cpg-mssr.c clk: renesas: r8a77970: Use common cpg_lock 2024-06-07 14:09:34 +02:00
r8a77980-cpg-mssr.c clk: renesas: r8a77980: Add I2C5 clock 2023-03-30 16:44:04 +02:00
r8a77990-cpg-mssr.c clk: renesas: rcar-gen3: Add ADG clocks 2023-08-15 11:34:43 +02:00
r8a77995-cpg-mssr.c clk: renesas: rcar-gen3: Add ADG clocks 2023-08-15 11:34:43 +02:00
r9a06g032-clocks.c clk: renesas: r9a06g032: Name anonymous structs 2023-09-18 10:05:23 +02:00
r9a07g043-cpg.c clk: renesas: r9a07g043: Add LCDC clock and reset entries 2024-07-30 10:28:39 +02:00
r9a07g044-cpg.c clk: renesas: r9a07g044: Mark resets array as const 2024-03-26 09:30:44 +01:00
r9a08g045-cpg.c clk: renesas: r9a08g045: Add DMA clocks and resets 2024-07-30 10:44:14 +02:00
r9a09g011-cpg.c clk: renesas: r9a09g011: Add CSI related clocks 2023-07-10 09:31:53 +02:00
rcar-cpg-lib.c clk: renesas: cpg-lib: Use DEFINE_SPINLOCK() for global spinlock 2024-06-07 14:09:59 +02:00
rcar-cpg-lib.h clk: renesas: rcar-gen3: Switch to new SD clock handling 2021-11-19 11:32:39 +01:00
rcar-gen2-cpg.c clk: renesas: rcar-gen2: Use DEFINE_SPINLOCK() for static spinlock 2024-06-07 14:10:15 +02:00
rcar-gen2-cpg.h clk: renesas: rcar-gen2: Change multipliers and dividers to u8 2019-12-10 10:24:10 +01:00
rcar-gen3-cpg.c clk: renesas: cpg-lib: Use DEFINE_SPINLOCK() for global spinlock 2024-06-07 14:09:59 +02:00
rcar-gen3-cpg.h clk: renesas: rcar-gen3: Add support for ZG clock 2023-07-10 09:31:29 +02:00
rcar-gen4-cpg.c clk: renesas: rcar-gen4: Add support for fractional multiplication 2024-07-30 10:44:18 +02:00
rcar-gen4-cpg.h clk: renesas: rcar-gen4: Use defines for common CPG registers 2024-07-30 10:44:18 +02:00
rcar-usb2-clock-sel.c clk: Explicitly include correct DT includes 2023-07-19 13:13:16 -07:00
renesas-cpg-mssr.c clk: renesas: cpg-mssr: Add support for R-Car V4M 2024-01-31 11:19:21 +01:00
renesas-cpg-mssr.h clk: renesas: cpg-mssr: Add support for R-Car V4M 2024-01-31 11:19:21 +01:00
rzg2l-cpg.c clk: renesas: rzg2l-cpg: Refactor to use priv for clks and base in clock register functions 2024-07-30 10:44:18 +02:00
rzg2l-cpg.h clk: renesas: rzg2l: Extend power domain support 2024-04-25 20:12:15 +02:00