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clk: renesas: r8a77970: Use common cpg_lock

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R-Car Gen3 Socs use the common CPG/MSSR library functions in
rcar-cpg-lib.c, so the R-Car V3M sub-driver can use the common cpg_lock
instead of a driver-private lock.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Link: https://lore.kernel.org/r/0cd9b5ffbe986bd7dc4ffb3f13492123432ee2e1.1716975021.git.geert+renesas@glider.be
This commit is contained in:
Geert Uytterhoeven 2024-05-29 11:35:08 +02:00
parent 7c8730df59
commit c001f9c9bc
1 changed files with 1 additions and 4 deletions
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5
drivers/clk/renesas/r8a77970-cpg-mssr.c
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@ -18,6 +18,7 @@
#include <dt-bindings/clock/r8a77970-cpg-mssr.h>
#include "renesas-cpg-mssr.h"
#include "rcar-cpg-lib.h"
#include "rcar-gen3-cpg.h"
#define CPG_SD0CKCR 0x0074
@ -47,8 +48,6 @@ enum clk_ids {
MOD_CLK_BASE
};
static spinlock_t cpg_lock;
static const struct clk_div_table cpg_sd0h_div_table[] = {
{ 0, 2 }, { 1, 3 }, { 2, 4 }, { 3, 6 },
{ 4, 8 }, { 5, 12 }, { 6, 16 }, { 7, 18 },
@ -213,8 +212,6 @@ static int __init r8a77970_cpg_mssr_init(struct device *dev)
if (error)
return error;
spin_lock_init(&cpg_lock);
cpg_pll_config = &cpg_pll_configs[CPG_PLL_CONFIG_INDEX(cpg_mode)];
return rcar_gen3_cpg_init(cpg_pll_config, CLK_EXTALR, cpg_mode);