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11300027b9
On CCI-500 writing to a counter requires turning the PMU on. So, synchronising the counter state should not be performed for such special cases, while turning the PMU on. This patch adds a helper, __cci_pmu_enable_nosync(), without flushing the counter states. Cc: Punit Agrawal <punit.agrawal@arm.com> Acked-by: Olof Johansson <olof@lixom.net> Acked-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> |
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arm-cci.c | ||
arm-ccn.c | ||
brcmstb_gisb.c | ||
imx-weim.c | ||
Kconfig | ||
Makefile | ||
mips_cdmm.c | ||
mvebu-mbus.c | ||
omap_l3_noc.c | ||
omap_l3_noc.h | ||
omap_l3_smx.c | ||
omap_l3_smx.h | ||
omap-ocp2scp.c | ||
simple-pm-bus.c | ||
sunxi-rsb.c | ||
uniphier-system-bus.c | ||
vexpress-config.c |