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arm-cci: Add helper to enable PMU without synchornising counters

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On CCI-500 writing to a counter requires turning the PMU on. So,
synchronising the counter state should not be performed for such special cases,
while turning the PMU on. This patch adds a helper, __cci_pmu_enable_nosync(),
without flushing the counter states.

Cc: Punit Agrawal <punit.agrawal@arm.com>
Acked-by: Olof Johansson <olof@lixom.net>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
This commit is contained in:
Suzuki K Poulose 2016-02-23 10:49:51 +00:00 committed by Will Deacon
parent cea16f8ba7
commit 11300027b9
1 changed files with 10 additions and 5 deletions
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15
drivers/bus/arm-cci.c
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@ -640,17 +640,22 @@ void cci_pmu_sync_counters(struct cci_pmu *cci_pmu)
}
/* Should be called with cci_pmu->hw_events->pmu_lock held */
static void __cci_pmu_enable(struct cci_pmu *cci_pmu)
static void __cci_pmu_enable_nosync(struct cci_pmu *cci_pmu)
{
u32 val;
cci_pmu_sync_counters(cci_pmu);
/* Enable all the PMU counters. */
val = readl_relaxed(cci_ctrl_base + CCI_PMCR) | CCI_PMCR_CEN;
writel(val, cci_ctrl_base + CCI_PMCR);
}
/* Should be called with cci_pmu->hw_events->pmu_lock held */
static void __cci_pmu_enable_sync(struct cci_pmu *cci_pmu)
{
cci_pmu_sync_counters(cci_pmu);
__cci_pmu_enable_nosync(cci_pmu);
}
/* Should be called with cci_pmu->hw_events->pmu_lock held */
static void __cci_pmu_disable(void)
{
@ -960,7 +965,7 @@ static irqreturn_t pmu_handle_irq(int irq_num, void *dev)
}
/* Enable the PMU and sync possibly overflowed counters */
__cci_pmu_enable(cci_pmu);
__cci_pmu_enable_sync(cci_pmu);
raw_spin_unlock_irqrestore(&events->pmu_lock, flags);
return IRQ_RETVAL(handled);
@ -1004,7 +1009,7 @@ static void cci_pmu_enable(struct pmu *pmu)
return;
raw_spin_lock_irqsave(&hw_events->pmu_lock, flags);
__cci_pmu_enable(cci_pmu);
__cci_pmu_enable_sync(cci_pmu);
raw_spin_unlock_irqrestore(&hw_events->pmu_lock, flags);
}