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The Arm NI-700 Network-on-Chip Interconnect has a relatively straightforward design with a hierarchy of voltage, power, and clock domains, where each clock domain then contains a number of interface units and a PMU which can monitor events thereon. As such, it begets a relatively straightforward driver to interface those PMUs with perf. Even more so than with arm-cmn, users will require detailed knowledge of the wider system topology in order to meaningfully analyse anything, since the interconnect itself cannot know what lies beyond the boundary of each inscrutably-numbered interface. Given that, for now they are also expected to refer to the NI-700 documentation for the relevant event IDs to provide as well. An identifier is implemented so we can come back and add jevents if anyone really wants to. Signed-off-by: Robin Murphy <robin.murphy@arm.com> Link: https://lore.kernel.org/r/9933058d0ab8138c78a61cd6852ea5d5ff48e393.1725470837.git.robin.murphy@arm.com Signed-off-by: Will Deacon <will@kernel.org>
18 lines
987 B
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18 lines
987 B
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Arm Network-on Chip Interconnect PMU
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NI-700 and friends implement a distinct PMU for each clock domain within the
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interconnect. Correspondingly, the driver exposes multiple PMU devices named
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arm_ni_<x>_cd_<y>, where <x> is an (arbitrary) instance identifier and <y> is
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the clock domain ID within that particular instance. If multiple NI instances
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exist within a system, the PMU devices can be correlated with the underlying
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hardware instance via sysfs parentage.
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Each PMU exposes base event aliases for the interface types present in its clock
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domain. These require qualifying with the "eventid" and "nodeid" parameters
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to specify the event code to count and the interface at which to count it
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(per the configured hardware ID as reflected in the xxNI_NODE_INFO register).
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The exception is the "cycles" alias for the PMU cycle counter, which is encoded
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with the PMU node type and needs no further qualification.
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