Here's the big char/misc driver pull request for 4.2-rc1.
Lots of mei, extcon, coresight, uio, mic, and other driver updates in
here. Full details in the shortlog. All of these have been in
linux-next for some time with no reported problems.
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iEYEABECAAYFAlWNn0gACgkQMUfUDdst+ykCCQCgvdF4F2+Hy9+RATdk22ak1uq1
JDMAoJTf4oyaIEdaiOKfEIWg9MasS42B
=H5wD
-----END PGP SIGNATURE-----
Merge tag 'char-misc-4.2-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc
Pull char/misc driver updates from Greg KH:
"Here's the big char/misc driver pull request for 4.2-rc1.
Lots of mei, extcon, coresight, uio, mic, and other driver updates in
here. Full details in the shortlog. All of these have been in
linux-next for some time with no reported problems"
* tag 'char-misc-4.2-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (176 commits)
mei: me: wait for power gating exit confirmation
mei: reset flow control on the last client disconnection
MAINTAINERS: mei: add mei_cl_bus.h to maintained file list
misc: sram: sort and clean up included headers
misc: sram: move reserved block logic out of probe function
misc: sram: add private struct device and virt_base members
misc: sram: report correct SRAM pool size
misc: sram: bump error message level on unclean driver unbinding
misc: sram: fix device node reference leak on error
misc: sram: fix enabled clock leak on error path
misc: mic: Fix reported static checker warning
misc: mic: Fix randconfig build error by including errno.h
uio: pruss: Drop depends on ARCH_DAVINCI_DA850 from config
uio: pruss: Add CONFIG_HAS_IOMEM dependence
uio: pruss: Include <linux/sizes.h>
extcon: Redefine the unique id of supported external connectors without 'enum extcon' type
char:xilinx_hwicap:buffer_icap - change 1/0 to true/false for bool type variable in function buffer_icap_set_configuration().
Drivers: hv: vmbus: Allocate ring buffer memory in NUMA aware fashion
parport: check exclusive access before register
w1: use correct lock on error in w1_seq_show()
...
Pull i2c updates from Wolfram Sang:
"Highlights:
- new drivers for Mediatek I2C, APM X-Gene, Broadcom Settop
- major updates to at91, davinci
- bugfixes to the mux infrastructure when dealing with the new quirk
mechanism
- more users for the bus recovery feature
- further improvements to the slave framework
Plus the usual bunch of smaller driver and core improvements and
fixes.
There is one patch removing old code from an ARM platform. This has
been acked by the sh_mobile maintainer Simon Horman"
* 'i2c/for-4.2' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux: (48 commits)
i2c: busses: i2c-bcm2835: limits cdiv to allowed values
i2c: sh_mobile: use proper type for timeout
i2c: sh_mobile: use adapter default for timeout
i2c: rcar: use proper type for timeout
i2c: rcar: use adapter default for timeout
i2c: designware: Make sure the device is suspended before disabling runtime PM
i2c: tegra: apply size limit quirk
i2c: tegra: don't advertise SMBUS_QUICK
i2c: octeon: remove unused signal handling
i2c: davinci: Optimize SCL generation
i2c: mux: pca954x: Use __i2c_transfer because of quirks
i2c: mux: Use __i2c_transfer() instead of calling parent's master_xfer()
i2c: use parent adapter quirks in mux
i2c: bcm2835: clear reserved bits in S-Register
ARM: shmobile: r8a7740: remove I2C errata handling
i2c: sh_mobile: add errata workaround
i2c: at91: fix code checker warnings
i2c: busses: xgene-slimpro: fix incorrect __init declation for probe
i2c: davinci: Avoid sending to own address
i2c: davinci: Refactor i2c_davinci_wait_bus_not_busy()
...
- Fix an error path in the mmc block layer
- Fix PM domain attachment for the SDIO bus
- Add support for driver strength selection
- Increase a delay to let voltage stabilize
- Add support for disabling write-protect detection
- Add facility to support re-tuning
- Re-tune and retry in the recovery path
- Add reset option for SDIO
- Consolidations and clean-ups
MMC host:
- Add Mediatek MMC driver
- Constify platform_device_id for a couple of hosts
- Fix modalias to make module auto-loading work for a couple of hosts
- sdhci: Add support for sdhci-arasan4.9a
- sdhci: Fix low memory corruption
- sdhci: Restore behavior while creating OCR mask
- sdhci: Add a callback to select drive strength
- sdhci: Fix driver type B and D handling
- sdhci: Add support for drive strength selection for SPT
- sdhci: Enable HS400 for some Intel host controllers
- sdhci: Convert to use the new re-tuning facility
- sdhci: Various minor fixes and clean-ups
- dw_mmc: Add support for hi6220
- dw_mmc: Use core to handle absent write protect line
- dw_mmc: Add support to switch voltage
- tmio: Some fixes and modernizations
- sh_mmcif: Improve clock rate calculation
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJVh+y8AAoJEP4mhCVzWIwp+fYQAIlZVzdLVCAgHHMKHlXeJ/Ib
5Ltf7Vi6kO9WJUQc+/X0kicidNjeOiw8qvItYeZpVvZCuzMnBXLHGt99G0ACvagw
hS/4GsI+keNbBLTlSriZVxMdjEbB4RIkC5TWsHuhcP16L6UmgDVil3Hqf6qasGU2
cAr9lSUpe3uYlgyn7W5voolVWU2PNJq7Cy5E3y1052VbUsnhJZRvpsoCne++nG2O
rJH9BQauVQ08VX3S6PcXYYDk2xe2rk7ExTiNw+tuMhjZkcd3dlKBRajoALpBqYFS
nY3nSfMIVm1PmzpklrgF+7gUTdlihmi0ao1DsrFBHRISZ/ljb7yQ5Vma8Pg36NVK
tdrZSBiOWhIXTgp+AIUSjuyv8S2wwsFozsmkVUNyA6XmfVmq2+lqz6rA7w+OIm7D
iS9SBsAz1Iv6gpt388/Bb/yxULvYOVKECmORydu21yXxHT7eWTVfvQYHC9h40qhw
oL86omRVFbeuouM1T867aFWKzaeA7hLXKbC4sWxdypyE2bPLraiC5izjlh4p3RzH
UkQ4UUsym7b0UlL4lxKTUgRD8FuGK0ML+zeRsA1VgJmcCdzRaa2NFQfrX5aMVSgc
iJ2zkHdxLCxkKTfcNn3k+B0PH3tMMn2cPIE7AhoVaIl79ACg9UB+/wG8f5pIifh5
pPCWXFcaJ7gJkYpFDTnJ
=ofUZ
-----END PGP SIGNATURE-----
Merge tag 'mmc-v4.2' of git://git.linaro.org/people/ulf.hansson/mmc
Pull MMC updates from Ulf Hansson:
"Here are the changes for MMC for v4.2.
MMC core:
- Fix an error path in the mmc block layer
- Fix PM domain attachment for the SDIO bus
- Add support for driver strength selection
- Increase a delay to let voltage stabilize
- Add support for disabling write-protect detection
- Add facility to support re-tuning
- Re-tune and retry in the recovery path
- Add reset option for SDIO
- Consolidations and clean-ups
MMC host:
- Add Mediatek MMC driver
- Constify platform_device_id for a couple of hosts
- Fix modalias to make module auto-loading work for a couple of hosts
- sdhci: Add support for sdhci-arasan4.9a
- sdhci: Fix low memory corruption
- sdhci: Restore behavior while creating OCR mask
- sdhci: Add a callback to select drive strength
- sdhci: Fix driver type B and D handling
- sdhci: Add support for drive strength selection for SPT
- sdhci: Enable HS400 for some Intel host controllers
- sdhci: Convert to use the new re-tuning facility
- sdhci: Various minor fixes and clean-ups
- dw_mmc: Add support for hi6220
- dw_mmc: Use core to handle absent write protect line
- dw_mmc: Add support to switch voltage
- tmio: Some fixes and modernizations
- sh_mmcif: Improve clock rate calculation"
* tag 'mmc-v4.2' of git://git.linaro.org/people/ulf.hansson/mmc: (98 commits)
mmc: queue: prevent soft lockups on PREEMPT=n
mmc: mediatek: Add PM support for MMC driver
mmc: mediatek: Add Mediatek MMC driver
mmc: dt-bindings: add Mediatek MMC bindings
mmc: card: Fixup request missing in mmc_blk_issue_rw_rq
mmc: sdhci: fix low memory corruption
mmc: sdhci-pci: Change AMD SDHCI quirk application scope
i2c-piix4: Use Macro for AMD CZ SMBus device ID
pci_ids: Add AMD KERNCZ device ID support
mmc: queue: use swap() in mmc_queue_thread()
mmc: dw_mmc: insmod followed by rmmod will hung for eMMC
mmc: sdhci: Restore behavior while creating OCR mask
mmc: sdhci-pxav3: fix device wakeup initialization
mmc: core: Attach PM domain prior probing of SDIO func driver
mmc: core: Remove redundant ->power_restore() callback for SD
mmc: core: Remove redundant ->power_restore() callback for MMC
mmc: sdhci-bcm2835: Actually enable the clock
mmc: sdhci-bcm2835: Clean up platform allocations if sdhci init fails.
mmc: sdhci-of-esdhc: enable interrupt mode to detect card
mmc: sdhci-esdhc-imx: add quirk SDHCI_QUIRK2_BROKEN_HS200 for imx6qdl
...
Checks if the cdiv value is in between min (0x2) and max (0xFFFE)
supported values by the bcm2835. If not, it returns -ENODEV.
See page 33/34 of BCM2835-ARM-Peripherals.pdf for the DIV register.
https://www.raspberrypi.org/wp-content/uploads/2012/02/BCM2835-ARM-Peripherals.pdf
Signed-off-by: Silvan Wicki <linux_wi@tinag.ch>
[wsa: resolved a merge conflict]
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
5 seconds is a very large timeout, and it is hardcoded. Use the default
timeout from 'struct adapter' which is 1 second. It can also be modified
from userspace for specific workloads via i2c-dev.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
5 seconds is a very large timeout, and it is hardcoded. Use the default
timeout from 'struct adapter' which is 1 second. It can also be modified
from userspace for specific workloads via i2c-dev.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
The driver calls pm_runtime_put() right before pm_runtime_disable() in its
->remove() hook to make sure clock is gated etc. However, it turns out that
pm_runtime_put() only calls ->idle() hook without actually suspending
anything. The following pm_runtime_disable() will prevent the driver from
suspending thus leaving it "active".
It is better to suspend the device synchronously to make sure it is
actually suspended before disabling runtime PM from it.
While there, undo call to pm_runtime_use_autosuspend().
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
payload_size is a 12 bit field in the HW register, so add a limit for
this size. That way we gracefully reject the message beforehand instead
of generating an OOPS while transferring. Verified using some older
Tegra2 documentation and a more recent Jetson TK1 board.
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Reviewed-by: Alexander Sverdlin <alexander.sverdlin@nokia.com>
This HW cannot send 0-byte-length messages and the driver discards them.
So, we should not advertise SMBUS_QUICK.
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
'commit 2637e5fd23 ("i2c: octeon: Fix i2c fail problem when a process is
terminated by a signal")' removed the wait_event_interruptible_timeout to
prevent half/mixed i2c messages from being sent/recievd but forgot to
drop the signal handling case in the return handling. This just removes
this dead code. While at it the return variable is adjusted to the type
expected.
Signed-off-by: Nicholas Mc Guire <hofrat@osadl.org>
Reviewed-by: Alexander Sverdlin <alexander.sverdlin@nokia.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
There are several cases where current clock configuration algorithm produces
not optimal results:
- truncation in "clk" calculation leads to the fact that actual BUS frequency
will be always higher than spec except two exact module frequences 8MHz and
12MHz in the whole 7-12MHz range of permitted frequences
- driver configures SCL HIGH to LOW ratio always 1 to 1 and this doesn't work
well in 400kHz case, namely minimum time of LOW state (according to I2C Spec
2.1) 1.3us will not be fulfilled. HIGH to LOW ratio 1 to 2 would be more
approriate here.
Signed-off-by: Michael Lawnick <michael.lawnick@nokia.com>
Signed-off-by: Alexander Sverdlin <alexander.sverdlin@nokia.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
The datasheet mentions on page 31 that the bits 10-31 must be read as
don't care and written as 0.
https://www.raspberrypi.org/wp-content/uploads/2012/02/BCM2835-ARM-Peripherals.pdf
We cannot guarantee that we read bits 10-31 as always 0 (because the
datasheet says read as don't care). We clear the bits with a bitmask to
prevent writing back unknown data at the reserved bits.
Signed-off-by: Silvan Wicki <linux_wi@tinag.ch>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
This used to be in platform init code. We want it to do in the driver
now. This is basically a code move and a new compatible added.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Change AMD CZ SMBUS device ID from 0x790b to
use Macro definition
Signed-off-by: Wan ZongShun <Vincent.Wan@amd.com>
Acked-by: Wolfram Sang <wsa@the-dreams.de>
Acked-by: Jean Delvare <jdelvare@suse.de>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
The MFD driver should only have the logic to instantiate its child devices
and setup any shared resources that will be used by the subdevices drivers.
The cros_ec MFD is more complex than expected since it also has helpers to
communicate with the EC. So the driver will only get more bigger as other
protocols are supported in the future. So move the communication protocol
helpers to its own driver as drivers/platform/chrome/cros_ec_proto.c.
Suggested-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Tested-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Lee Jones <lee.jones@linaro.org>
Acked-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Commit 1b84f2a4cd ("mfd: cros_ec: Use fixed size arrays to transfer
data with the EC") modified the struct cros_ec_command fields to not
use pointers for the input and output buffers and use fixed length
arrays instead.
This change was made because the cros_ec ioctl API uses that struct
cros_ec_command to allow user-space to send commands to the EC and
to get data from the EC. So using pointers made the API not 64-bit
safe. Unfortunately this approach was not flexible enough for all
the use-cases since there may be a need to send larger commands
on newer versions of the EC command protocol.
So to avoid to choose a constant length that it may be too big for
most commands and thus wasting memory and CPU cycles on copy from
and to user-space or having a size that is too small for some big
commands, use a zero-length array that is both 64-bit safe and
flexible. The same buffer is used for both output and input data
so the maximum of these values should be used to allocate it.
Suggested-by: Gwendal Grignou <gwendal@chromium.org>
Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Tested-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Lee Jones <lee.jones@linaro.org>
Acked-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
buf_len is a size_t, so unsigned, but was tested with '<= 0'.
Reported-by: Wolfram Sang <wsa@the-dreams.de>
Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com>
Acked-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Fix section mismatch error during kernel build for xgene_slimpro_i2c_probe
function. It was incorrectly defined with __init declaration.
Signed-off-by: Feng Kan <fkan@apm.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Sending a message to own address locks the controller up in very bizarre state,
it behaves as slave even if MDR register clearly states master. The controller
remains in this state until reset. To avoid unnecessary timeouts simply avoid
sending to own address. The controller cannot do this any way. Also, do not
enable AAS IRQ, as the slave mode is not supported by the driver and the only
possibility to trigger this IRQ is to send to own address.
Signed-off-by: Alexander Sverdlin <alexander.sverdlin@nokia.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
There are several problems in the function:
- "to_cnt" variable does nothing
- schedule_timeout() call without setting current state does nothing
- "allow_sleep" parameter is not really used
Refactor the function so that it really tries to wait. In case of timeout try
to recover the bus.
Signed-off-by: Alexander Sverdlin <alexander.sverdlin@nokia.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Adding support for i2c controller driver for Broadcom settop
SoCs.
Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com>
[wsa: removed superfluous owner in platform_driver]
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
When FIFOs are available and enabled, the driver now configures the Atmel
eXtended DMA Controller to perform word accesses instead of byte accesses
when possible.
The actual access width depends on the size of the buffer to transmit.
To enable FIFO support the "atmel,fifo-size" property must be set properly
in the I2C controller node of the device tree.
Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com>
Acked-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
The probe() function now prints the hardware version of the I2C
controller.
Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com>
[wsa: s/version/hw version/] for clarity]
Acked-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
The alternative command mode was introduced to simplify the transmission
of STOP conditions and to solve timing and latency issues around them.
This mode relies on a new register, the Alternative Command Register,
which must be set at the same time as the Master Mode Register. This new
register was designed to allow simple setup of basic combined transactions
built from up to two unitary transactions.
Indeed, the ACR is split into two areas, which describe one unitary
transaction each. Each area is filled with Data Length 8bit counter, a
Direction and a PEC Request bit. The PEC bit is only used in SMBus mode
and is not supported by this driver yet. Also when using alternative
command mode, the MREAD bit from the Master Mode Register is ignored.
Instead the Direction bits from ACR are used to setup the direction, read
or write, of each unitary transaction. Finally the 8bit counters must
filled with the data length of their respective transaction. Then if only
one transaction is to be used, the data length of the second one must be
set to zero. At the moment, this driver uses only the first transaction.
In addition to MMR and ACR, the Control Register also need to be written
to enable the alternative command mode. That's the purpose of its ACMEN
bit, which stands for Alternative Command Mode Enable.
Note that the alternative command mode is compatible with the use of the
Internal Address Register. So combined transactions for eeprom read are
actually implemented with the Internal Address Register. This register is
written with up to 3 bytes, which are the internal address sent to the
slave through the first write transaction. Then the first area of the ACR
describe the write transaction to follow, which carries the data to be
read from the eeprom. The second area of the ACR is not used so its Data
Length 8bit counter is cleared.
For each byte sent or received by the device, the Data Length 8bit counter
is decremented. When it reaches 0, a STOP condition is automatically sent.
Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com>
Acked-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
This patch just fixes typo before applying later patches which will use
register bits with index above 16.
Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com>
Acked-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
For TX transactions, the TXCOMP bit in the Status Register is cleared
when the first data is written into the Transmit Holding Register.
In the lines from at91_do_twi_transfer():
at91_twi_write_data_dma(dev);
at91_twi_write(dev, AT91_TWI_IER, AT91_TWI_TXCOMP);
the TXCOMP interrupt may be enabled before the DMA controller has
actually started to write into the THR. In such a case, the TXCOMP bit
is still set into the Status Register so the interrupt is triggered
immediately. The driver understands that a transaction completion has
occurred but this transaction hasn't started yet. Hence the TXCOMP
interrupt is no longer enabled by at91_do_twi_transfer() but instead
by at91_twi_write_data_dma_callback().
Also, the TXCOMP bit in the Status Register in not a clear on read flag
but a snapshot of the transmission state at the time the Status
Register is read.
When a NACK error is dectected by the I2C controller, the TXCOMP, NACK
and TXRDY bits are set together to 1 in the SR. If enabled, the TXCOMP
interrupt is triggered at the same time. Also setting the TXRDY to 1
triggers the DMA controller to write the next data into the THR. Such
a write resets the TXCOMP bit to 0 in the SR. So depending on when the
interrupt handler reads the SR, it may fail to detect the NACK error
if it relies on the TXCOMP bit. The NACK bit and its interrupt should
be used instead.
For RX transactions, the TXCOMP bit in the Status Register is cleared
when the START bit is set into the Control Register. However to unify
the management of the TXCOMP bit when the DMA controller is used, the
TXCOMP interrupt is now enabled by the DMA callbacks for both TX and
RX transfers.
Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com>
Cc: stable@vger.kernel.org #3.10 and later
Acked-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Add suspend/resume support to the Broadcom iProc I2C driver
Signed-off-by: Ray Jui <rjui@broadcom.com>
Reviewed-by: Scott Branden <sbranden@broadcom.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Commit 1fc2fe204c ("i2c: designware: Add runtime PM hooks") adds
runtime pm support using the same ops for system pm and runtime pm.
When suspend to ram, the i2c host may have been runtime suspended, thus
i2c_dw_disable() hangs.
Previously, I fixed this issue by separating ops for system pm and
runtime pm, then in the system suspend/resume path, runtime pm apis are
used to ensure the device is at correct state.
But as Mika Westerberg pointed out: it sounds a bit silly to resume the
device just because you want to call i2c_dw_disable() for it before
suspending again. He then suggested an elegant solution which keeps the
device runtime suspended during system suspend with the help of
'dev->power.direct_complete'. This patch adopted this solution, and in
fact Mika provided the main code.
Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Tested-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Use recovery framework and implement bus recovery using "Bus Monitor" register.
Tests show that shortening SDA to GND results in "completion" timeout with
"BUSY" bit still set, so initiate recovery in this case.
Signed-off-by: Alexander Sverdlin <alexander.sverdlin@nokia.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
The mediatek SoCs have I2C controller that handle I2C transfer.
This patch include common I2C bus driver.
This driver is compatible with I2C controller on mt65xx/mt81xx.
Signed-off-by: Xudong Chen <xudong.chen@mediatek.com>
Signed-off-by: Liguo Zhang <liguo.zhang@mediatek.com>
Signed-off-by: Eddie Huang <eddie.huang@mediatek.com>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Modify i2c-parport driver to use the new parallel port device model.
Tested-by: Jean Delvare <jdelvare@suse.de>
Acked-by: Wolfram Sang <wsa@the-dreams.de>
Signed-off-by: Sudip Mukherjee <sudip@vectorindia.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
As of now i2c-parport was connecting to all the available parallel
ports. Lets limit that to maximum of 4 instances and at the same time
define which instance connects to which parallel port.
Tested-by: Jean Delvare <jdelvare@suse.de>
Signed-off-by: Sudip Mukherjee <sudip@vectorindia.org>
Acked-by: Wolfram Sang <wsa@the-dreams.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Add SLIMpro I2C device driver on APM X-Gene platform. This I2C
device driver use the SLIMpro Mailbox driver to tunnel message to
the SLIMpro coprocessor to do the work of accessing I2C components.
Signed-off-by: Feng Kan <fkan@apm.com>
Signed-off-by: Hieu Le <hnle@apm.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
implement bus recovery methods for i2c-omap
so we can recover from situations where SCL/SDA
are stuck low.
Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
The platform_device_id is not modified by these drivers and core uses it
as const.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski.k@gmail.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Initialize sysreg by default, otherwise driver will crash in suspend
callback when not using DT.
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Cc: stable@kernel.org
Fixes: a7750c3ef0 ("i2c: s3c2410: Handle i2c sys_cfg register in i2c driver")
Make the modalias match driver name, this is required to make module
auto-loading work.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Zhangfei Gao <zhangfei.gao@linaro.org>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Cc: stable@kernel.org
This adds calls to pinctrl subsystem in order to switch pin states
on suspend/resume if you provide a "sleep" state in DT.
If no "sleep" state is provided in the DT, these calls turn
to NOPs, so we don't need error checking here.
Signed-off-by: Pascal Huerst <pascal.huerst@gmail.com>
Reviewed-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
The GPIO subsystem provides dummy GPIO consumer functions if GPIOLIB is
not enabled. Hence drivers that depend on GPIOLIB, but use GPIO consumer
functionality only, can still be compiled if GPIOLIB is not enabled.
Relax the dependency on GPIOLIB if COMPILE_TEST is enabled, where
appropriate.
Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
info(drivers/i2c/busses/i2c-xiic.c:55): Scanning doc for struct xiic_i2c
Warning(drivers/i2c/busses/i2c-xiic.c:79): No description found for parameter 'endianness'
Signed-off-by: Shubhrajyoti Datta <shubhraj@xilinx.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Although unlikely, it is remotely possible for an i2c command to need
more than 200ms complete. Unlike smbus, i2c devices can clock stretch
for an unspecified amount of time. The longest time I've seen
specified for a device is 144ms (bq27541 battery gas), but one could
imagine a device taking a bit slower. 1 second "ought to be enough for
anyone."
The above is not the only justifcation for going above 200ms for a
timeout, though. It turns out that if you've got a large number of
printks going out to a serial console, interrupts on a CPU can be
disabled for hundreds of milliseconds. That's not a great situation to
be in to start with (maybe we should put a cap in vprintk_emit()) but
it's pretty annoying to start seeing unexplained i2c timeouts.
Note that to understand why we can timeout when printk has interrupts
disabled, you need to understand that on current Linux ARM kernels
interrupts are routed to a single CPU in a multicore system. Thus,
you can get:
1. CPU1 is running rk3x_i2c_xfer()
2. CPU0 calls vprintk_emit(), which disables all IRQs on CPU0.
3. I2C interrupt is ready but is set to only run on CPU0, where IRQs
are disabled.
4. CPU1 timeout expires. I2C interrupt is still ready, but CPU0 is
still sitting in the same vprintk_emit()
5. CPU1 sees that no interrupt happened in 200ms, so timeout.
A normal system shouldn't see i2c timeouts anyway, so increasing the
timeout should help people debugging without hurting other people
excessively.
Signed-off-by: Doug Anderson <dianders@chromium.org>
Tested-by: Caesar Wang <wxt@rock-chips.com>
Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Pull i2c fixes from Wolfram Sang:
"This has a mixture of merge window cleanups and bugfixes"
* 'i2c/for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux:
i2c: st: add include for pinctrl
i2c: mux: use proper dev when removing "channel-X" symlinks
i2c: digicolor: remove duplicate include
i2c: Mark adapter devices with pm_runtime_no_callbacks
i2c: pca-platform: fix broken email address
i2c: mxs: fix broken email address
i2c: rk3x: report number of messages transmitted
Here's a set of updates to the Chrome OS platform drivers for this merge window.
Main new things this cycle is:
- Driver changes to expose the lightbar to users. With this, you can make your
own blinkenlights on Chromebook Pixels.
- Changes in the way that the atmel_mxt trackpads are probed. The laptop driver
is trying to be smart and not instantiate the devices that don't answer to
probe. For the trackpad that can come up in two modes (bootloader or regular),
this gets complicated since the driver already knows how to handle the two
modes including the actual addresses used. So now the laptop driver needs to
know more too, instantiating the regular address even if the bootloader one
is the probe that passed.
- mfd driver improvements by Javier Martines Canillas, and a few bugfixes
from him, kbuild and myself.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJVOyVhAAoJEIwa5zzehBx3U/gP/jEqIMKEB6r0qApnYLU/0v2V
6AiAtQBDZ6PSNDOqy5Mo5HoMQ0WI09n4xvml3Ntmx0/584RGECn8nlFvwlowIxNo
FLGYcKWuy8w8wKgN19hhEYySnTEex4+kBuDTITvya61SpvxUUfu7fpGV+DXwM2CS
aJQdMOwl24BJ4gjev9JS5QasyZrAzZVuDwo8vSKG6PKZNGgC1uyjOrm+NjiTEW15
FzCk77rRHfiN6Zr9C79ZfqV/nWKm4rPvaJJOiNr2vZUQ/0bhbvSHp3/BekjtnlOv
W6GbUCoDT6/DU/p1SP2Yegqk5pOEcqKQFe7Uc3YDSfiNLNCp03nF1RuIoi/NzfDy
1GcLYWAvHCrtmpQwqM/gIgc9uAsFN9Stin2G79xt3U/dUitdAmwMsCfqDE1FO63e
pGjPx0H7e1Ot3en3O5agaAlYlsokptKl3bIVOMfK6s6bH3RK4Y83LxwsVQKYkayA
TyulczOPnx6i4+acQroIwpFTj8QhhNjjhBU5gXTebVj4B/CwfieZBadaYF23O765
shX71oUJ1gQ6LCZtu8brl/82uk3sSkpVDi8e5WWaSnLfnAmqtU/ITy5yg77uuD0b
RAdHxVFUO6Y0FspWmWzBckrPec7ub+SKglCACq8HNciGx/9BWx6NUWI9FK93CDIu
O36D/l9hoUvA0gds5Iom
=NVa4
-----END PGP SIGNATURE-----
Merge tag 'chrome-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/olof/chrome-platform
Pull chrome platform updates from Olof Johansson:
"Here's a set of updates to the Chrome OS platform drivers for this
merge window.
Main new things this cycle is:
- Driver changes to expose the lightbar to users. With this, you can
make your own blinkenlights on Chromebook Pixels.
- Changes in the way that the atmel_mxt trackpads are probed. The
laptop driver is trying to be smart and not instantiate the devices
that don't answer to probe. For the trackpad that can come up in
two modes (bootloader or regular), this gets complicated since the
driver already knows how to handle the two modes including the
actual addresses used. So now the laptop driver needs to know more
too, instantiating the regular address even if the bootloader one
is the probe that passed.
- mfd driver improvements by Javier Martines Canillas, and a few
bugfixes from him, kbuild and myself"
* tag 'chrome-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/olof/chrome-platform:
platform/chrome: chromeos_laptop - instantiate Atmel at primary address
platform/chrome: cros_ec_lpc - Depend on X86 || COMPILE_TEST
platform/chrome: cros_ec_lpc - Include linux/io.h header file
platform/chrome: fix platform_no_drv_owner.cocci warnings
platform/chrome: cros_ec_lightbar - fix duplicate const warning
platform/chrome: cros_ec_dev - fix Unknown escape '%' warning
platform/chrome: Expose Chrome OS Lightbar to users
platform/chrome: Create sysfs attributes for the ChromeOS EC
mfd: cros_ec: Instantiate ChromeOS EC character device
platform/chrome: Add Chrome OS EC userspace device interface
platform/chrome: Add cros_ec_lpc driver for x86 devices
mfd: cros_ec: Add char dev and virtual dev pointers
mfd: cros_ec: Use fixed size arrays to transfer data with the EC
The driver uses pinctrl directly and thus should include the appropriate
header. Sort the headers while we are here to have a better view what is
included and what is not.
Reported-by: Pascal Huerst <pascal.huerst@gmail.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
And sort them to prevent this from happening again.
Reported-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
