... to eliminate unnecessary padding. We have rather a lot of these
structures, so eliminating unnecessary padding results in a saving of
1488 bytes.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
clk->owner is always NULL, so its existence doesn't serve any useful
function other than bloating the kernel by 992 bytes. Remove it.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The original code in omap2_clk_wait_ready() used to check the low 8
bits to determine whether they were within the FCLKEN or ICLKEN
registers. Specifically, the test is satisfied when these offsets
are used:
CM_FCLKEN, CM_FCLKEN1, CM_CLKEN, OMAP24XX_CM_FCLKEN2, CM_ICLKEN,
CM_ICLKEN1, CM_ICLKEN2, CM_ICLKEN3, OMAP24XX_CM_ICLKEN4
OMAP3430_CM_CLKEN_PLL, OMAP3430ES2_CM_CLKEN2
If one of these offsets isn't used, omap2_clk_wait_ready() merely
returns without doing anything. So we should use the non-wait clkops
version instead and eliminate that conditional.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Rather than employing run-time tests in omap2_clk_wait_ready() to
decide whether we need to wait for the clock to become ready, we
can set the .ops appropriately.
This change deals with the OMAP24xx and OMAP34xx conditionals only.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
PARENT_CONTROLS_CLOCK just makes enable/disable no-op, and is
functionally an alias for ALWAYS_ENABLED. This can be handled
in the same way, using clkops_null.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
... and use it for clocks which are ALWAYS_ENABLED. These clocks
use a non-NULL enable_reg pointer for other purposes (such as
selecting clock rates.)
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Collect up all the common enable/disable clock operation functions
into a separate operations structure.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
drivers/char/nvram.c uses rtc_lock, that (on ARM) is only defined if
RTC_DRV_CMOS is enabled.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
"flash" is a very generic name for a platform_driver that is only
available on SA11x0.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Cc: Nicolas Pitre <nico@marvell.com>
SPIN_LOCK_UNLOCKED is deprecated as lockdep cannot properly work with
locks initialized with it.
This fix is necessary to compile the linux-rt tree for ARM.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Cc: Steven Rostedt <srostedt@redhat.com>
In omap24xx_cpu_suspend assembly routine, the r2 register which holds
the address of the SDRC_POWER reg is set to zero before the value is
written back triggering a fault due to writing to address zero.
It's hard to tell where this change was introduced since this file
has been moved and merged.
While this fix prevents a crash, suspend on my n810 is broken with
current kernels. I never come out of suspend.
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
By Ingo Molnar, interrupts are not masked by default.
(refer to 76d2160147)
But if interrupts are not masked, the processor can wake up while in
Suspend-to-RAM state by an external interrupt. For example, if an
OMAP3 board is connected to Host PC by USB and entered to Suspend-to-RAM
state, it wake up automatically by M_IRQ_92. The disable_irq() function
can't disable the interrupt in H/W level, So I modified
arch/arm/mach-omap2/irq.c
Signed-off-by: Kim Kyuwon <chammoru@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
When 32 kHz timer is used the min_delta_ns should be initialized so
that it reflects the timer programming cost. A write to the timer
device will be usually posted, but it takes roughly 3 cycles before
it is effective. If the timer is reprogrammed before that, the CPU
will stall until the previous write completes. This was pointed out by
Richard Woodruff.
Since the lower bound for min_delta_ns is 1000, the change is visible
only with tick rates less than 3 MHz.
Also note that the old value is incorrect for 32 kHz also due to
a rounding error, and it can cause the timer queue to hang (due to
clockevent code trying to program the timer with zero ticks).
Signed-off-by: Aaro Koskinen <Aaro.Koskinen@nokia.com>
Reviewed-by: Richard Woodruff <r-woodruff2@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The naming accidentally broke while changing the name for the
driver to not to conflict with the other mmc driver.
Signed-off-by: Tony Lindgren <tony@atomide.com>
This has similar symptoms than 66c23551b1
where just omap_request_dma, omap_dma_link_lch and omap_dma_unlink_lch
can cause incorrect dump_stack(). Here it can happen if channel has been
used before and the channel flags variable holds old status.
Signed-off-by: Jarkko Nikula <jarkko.nikula@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
CSR must be cleared before invoking the callback.
If the callback function starts a new, fast DMA transfer on the same
channel, the completion status might lost if CSR is cleared after
the callback invocation.
Signed-off-by: Juha Yrjola <juha.yrjola@solidboot.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
A spin_lock deadlock will occur when omap_mcbsp_request() is invoked.
omap_mcbsp_request()
\- clk_enable(mcbsp->clk) [takes and holds clockfw_lock]
\- omap2_clk_enable()
\- _omap2_clk_enable()
\- omap_mcbsp_clk_enable()
\- clk_enable(child clock) [tries for clockfw_lock again]
mcbsp_clk is a virtual clock and it comprises several child clocks. when
enable mcbsp_clk in omap_mcbsp_request(), the enable function of mcbsp_clk
will enable its child clocks, then the deadlock occurs.
The solution is to remove the virtual clock and enable these child clocks in
omap_mcbsp_request() directly.
Signed-off-by: Stanley.Miao <stanley.miao@windriver.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
* 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc:
powerpc/mm: Fix handling of _PAGE_COHERENT in BAT setup code
powerpc/pseries: Correct VIO bus accounting problem in CMO env.
powerpc: More printing warning fixes for the l64 to ll64 conversion
powerpc: Remove arch/ppc cruft from Kconfig
powerpc: Printing fix for l64 to ll64 conversion: phyp_dump.c
powerpc/embedded6xx: Update defconfigs
powerpc/8xx: Update defconfigs
powerpc/86xx: Update defconfigs
powerpc/83xx: Update defconfigs
powerpc/85xx: Update defconfigs
powerpc/mpc8313erdb: fix kernel panic because mdio device is not probed
powerpc/4xx: Update multi-board PowerPC 4xx defconfigs
powerpc/44x: Update PowerPC 44x defconfigs
powerpc/40x: Update PowerPC 40x defconfigs
powerpc/85xx: Fix typo in mpc8572ds dts
powerpc/44x: Warp patches for the new NDFC driver
powerpc/4xx: DTS: Add Add'l SDRAM0 Compatible and Interrupt Info
When there are multiple L1-aliasing userland mappings of the same physical
page, we currently remap each of them uncached, to prevent VIVT cache
aliasing issues. (E.g. writes to one of the mappings not being immediately
visible via another mapping.) However, when we do this remapping, there
could still be stale data in the L2 cache, and an uncached mapping might
bypass L2 and go straight to RAM. This would cause reads from such
mappings to see old data (until the dirty L2 line is eventually evicted.)
This issue is solved by forcing a L2 cache flush whenever the shared page
is made L1 uncacheable.
Ideally, we would make L1 uncacheable and L2 cacheable as L2 is PIPT. But
Feroceon does not support that combination, and the TEX=5 C=0 B=0 encoding
for XSc3 doesn't appear to work in practice.
Signed-off-by: Nicolas Pitre <nico@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/gerg/m68knommu:
m68knommu: fix 5329 ColdFire periphal addressing
uclinux: add process name to allocation error message
m68knommu: correct the mii calculations for 532x ColdFire FEC
m68knommu: add ColdFire M532x to the FEC configuration options
m68knommu: fix syscall restarting
m68knommu: remove the obsolete and long unused comempci chip support
m68knommu: remove the no longer used PCI support option
m68knommu: remove obsolete and unused eLIA board
m68knommu: set NO_DMA
m68knommu: fix cache flushing for the 527x ColdFire processors
m68knommu: fix ColdFire 5272 serial baud rates in mcf.c
m68knommu: use one exist from execption
Commit d7b1956fed ("DMI: Introduce
dmi_first_match to make the interface more flexible") introduced compile
errors like the following when !CONFIG_DMI
drivers/ata/sata_sil.c: In function 'sil_broken_system_poweroff':
drivers/ata/sata_sil.c:713: error: implicit declaration of function 'dmi_first_match'
drivers/ata/sata_sil.c:713: warning: initialization makes pointer from integer without a cast
We just need a dummy version of dmi_first_match() to fix this all up.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Schedule a vblank signal, kill the process, and we'll go walking over freed
memory. Given that no open-source userland exists using this, nor have I
ever heard of a consumer, just let this code die.
Signed-off-by: Eric Anholt <eric@anholt.net>
Requested-by: Linus Torvalds <torvalds@linux-foundation.org>
Acked-by: Dave Airlie <airlied@linux.ie>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Aaro says:
> With spinlock debugs enabled I get might_sleep() warnings when using
> ptrace.
tracked down to a missing enable_irq before calling do_undefinstr().
Reported-by: Aaro Koskinen <aaro.koskinen@nokia.com>
Tested-by: Aaro Koskinen <aaro.koskinen@nokia.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
arch/arm/mach-msm/board-halibut.c:45: error: implicit declaration of function 'MSM_GPIO_TO_INT'
arch/arm/mach-msm/board-halibut.c:45: error: initializer element is not constant
arch/arm/mach-msm/board-halibut.c:45: error: (near initialization for 'smc91x_resources[1].start')
arch/arm/mach-msm/board-halibut.c:46: error: initializer element is not constant
arch/arm/mach-msm/board-halibut.c:46: error: (near initialization for 'smc91x_resources[1].end')
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Further to 483a2b3a31, also fix:
drivers/net/arm/etherh.c:649: error: 'eth_set_mac_addr' undeclared here (not in a function)
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
_PAGE_COHERENT is now always set in _PAGE_RAM resp. PAGE_KERNEL.
Thus it has to be masked out, if the BAT mapping should be non
cacheable or CPU_FTR_NEED_COHERENT is not set.
This will work on normal SMP setups because we force-set
CPU_FTR_NEED_COHERENT as part of CPU_FTR_COMMON on SMP.
Signed-off-by: Gerhard Pircher <gerhard_pircher@gmx.net>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
In the VIO bus code the wrappers for dma alloc_coherent and free_coherent
calls are rounding to IOMMU_PAGE_SIZE. Taking a look at the underlying
calls, the actual mapping is promoted to PAGE_SIZE. Changing the
rounding in these two functions fixes under-reporting the entitlement
used by the system. Without this change, the system could run out of
entitlement before it believes it has and incur mapping failures at the
firmware level.
Also in the VIO bus code, the wrapper for dma map_sg is not exiting in
an error path where it should. Rather than fall through to code for the
success case, this patch adds the return that is needed in the error path.
Signed-off-by: Robert Jennings <rcj@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
These are all powerpc specific drivers.
res.start in fsl_elbc_nand.c needs to be cast since it may be either 32
or 64 bit. Thanks to Scott Wood for noticing.
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
Acked-by: Arnd Bergmann <arnd@arndb.de> call_edac bits in particular
Acked-by: Olof Johansson <olof@lixom.net> pasemi_nand peices
Acked-by: Scott Wood <scottwood@freescale.com> fsl_elbc fixes
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Remove some leftover cruft from the arch/ppc days
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Given just how hard it is to find the code that uses MAY_APPEND
it's probably not a big surprise that this went unnoticed for so
long. The Smack rules loading code is incorrectly setting the
MAY_READ bit when MAY_APPEND is requested.
Signed-off-by: Casey Schaufler <casey@schaufler-ca.com>
Reviewed-by: James Morris <jmorris@namei.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb-2.6: (36 commits)
USB: Driver for Freescale QUICC Engine USB Host Controller
USB: option: add QUANTA HSDPA Data Card device ids
USB: storage: Add another unusual_dev for off-by-one bug
USB: unusual_dev: usb-storage needs to ignore a device
USB: GADGET: fix !x & y
USB: new id for ti_usb_3410_5052 driver
USB: cdc-acm: Add another conexant modem to the quirks
USB: 'option' driver - onda device MT503HS has wrong id
USB: Remove ZTE modem from unusual_devices
USB: storage: support of Dane-Elec MediaTouch USB device
USB: usbmon: Implement compat_ioctl
USB: add kernel-doc for wusb_dev in struct usb_device
USB: ftdi_sio driver support of bar code scanner from Diebold
USB: ftdi_sio: added Alti-2 VID and Neptune 3 PID
USB: cp2101 device
USB: usblp.c: add USBLP_QUIRK_BIDIR to Brother HL-1440
USB: remove vernier labpro from ldusb
USB: CDC-ACM quirk for MTK GPS
USB: cdc-acm: support some gps data loggers
USB: composite: Fix bug: low byte of w_index is the usb interface number not the whole 2 bytes of w_index
...
This patch adds support for the FHCI USB controller, as found
in the Freescale MPC836x and MPC832x processors. It can support
Full or Low speed modes.
Quite a lot the hardware is doing by itself (SOF generation, CRC
generation and checking), though scheduling and retransmission is on
software's shoulders.
This controller does not integrate the root hub, so this driver also
fakes one-port hub. External hub is required to support more than
one device.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This patch adds the support for the QUANTA Q101 series HSDPA Data Card.
With the vendor and product IDs are set properly,
the data card can be detected and works fine.
Signed-off-by: Alex Cheng <alex.cheng@quantatw.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Argosy has released another device with the off-by-one sector. This is a
harddrive with an internal cardreader which is affected.
Based on a patch written by Martijn Hijdra <martijn.hijdra@gmail.com>
Signed-off-by: Phil Dibowitz <phil@ipom.com>
Cc: Martijn Hijdra <martijn.hijdra@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This patch adds an unusual_devs entry for a Sony Ericsson modem. Like many
other modems, we have to ignore the storage device in order to access the
modem.
At this time usb_modeswitch does not work with this device.
Reported-by: The Solutor <thesolutor@gmail.com>.
Signed-off-by: Phil Dibowitz <phil@ipom.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
! has a higher precedence than &
Signed-off-by: Roel Kluin <roel.kluin@gmail.com>
Acked-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Another Conexant, another device with the same quirk
Signed-off-by: Alan Cox <alan@redhat.com>
Acked-by: Oliver Neukum <oliver@neukum.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
While trying to make GSM modem Onda MT503HS working, I found a mismatch
between device id in the driver code (0x0200) and id in the lsusb
output (0x2000).
This patch fixed it for me, but I don't know if the original device id was
also correct and the new ID should be added instead of replacing the
old one.
Signed-off-by: Marcel Sebek <sebek64@post.cz>
Acked-by: Domenico Riccio <domenico.riccio@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
The ZTE modem entry causes usb-storage to ignore the device, but for some
versions of the device, usb-storage mode is required to get to modem ode. For
both kinds the tool: http://www.draisberghof.de/usb_modeswitch/ should work.
Note that the various versions of the device have the same ProductId,
VendorId, and bcdDevice number, so we cannot have the entry for some and not
others.
Signed-off-by: Phil Dibowitz <phil@ipom.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
