Genmai base board support making use of 128 MiB of memory,
the r7s7211 SoC with the SCIF2 serial port and CA9 core.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Pass HPB-DMA slave IDs in the SDHI0 platform data to enable DMA in the SDHI
driver.
Signed-off-by: Max Filippov <max.filippov@cogentembedded.com>
[Sergei: removed #include <mach/dma.h>]
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Pass HPB-DMA slave IDs in the SDHI0 platform data to enable DMA in the SDHI
driver.
Signed-off-by: Max Filippov <max.filippov@cogentembedded.com>
[Sergei: removed #include <mach/dma.h>]
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add DMA support for MMCIF on APE6EVM, using the shdma dmaengine driver.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Tie in the APMU SMP code on r8a7791. When used together
with the secondary CPU device node and smp_ops in the
board specific code then this will allow use of the
two Cortex-A15 cores in the r8a7791 SoC.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
r8a7779 INTC needs IRL pin mode settings to determine
behavior of IRQ0 - IRQ3, and r8a7779_init_irq_extpin()
is controlling it via irlm parameter.
But this function registers renesas_intc_irqpin driver
if irlm was set, and this value depends on platform.
This is not good for DT.
This patch splits r8a7779_init_irq_extpin() function
into "mode settings" and "funtion register" parts
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
r8a7778 INTC needs IRL pin mode settings to determine
behavior of IRQ0 - IRQ3, and r8a7778_init_irq_extpin()
is controlling it via irlm parameter.
But this function registers renesas_intc_irqpin driver
if irlm was set, and this value depends on platform.
This is not good for DT.
This patch splits r8a7778_init_irq_extpin() function
into "mode settings" and "funtion register" parts.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add SCIF serial port support to the r7s72100 SoC by
adding platform devices for SCIF0 -> SCIF7 together with
clock bindings. DT device description is excluded at
this point since such bindings are still under
development.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add initial support for the r7272100 SoC including:
- Single Cortex-A9 CPU Core
- GIC
No static virtual mappings are used, all the components
make use of ioremap(). DT_MACHINE_START is still wrapped
in CONFIG_USE_OF to match other mach-shmobile code.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Make use of the R-Car Gen2 arch timer workaround on r8a7791.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add a platform device for the r8a7791 IRQC hardware
driving IRQ pins IRQ0 to IRQ9. The Linux interrupt
number is statically assigned to allow board code
written in C to make use of static interrupt numbers.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Introduce the function r8a7791_add_standard_devices() that
follows the same style as other mach-shmobile SoC code and
allows C version of board code to add on-chip devices.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Move arch timer workaround code and boot mode pin
handling from setup-r8a7790.c to setup-rcar-gen2.c.
With this in place the same code can be used on
other R-Car Generation 2 devices such as r8a7791.
Signed-off-by: Magnus Damm <damm@opensource.se>
[horms+renesas@verge.net.au trivial rebase of board-lager.c
for introduction of lager_add_standard_devices()]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Devices, initialised from the Device Tree and from platform code usually
have different names. This patch adds a clock alias for DMAC on r8a73a4
in DT mode.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This patch adds clock definitions for the 4 I2C interfaces on r8a7790 and
clock aliases, suitable for the DT mode.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add HPB-DMAC platform device on R8A7779 SoC along with its slave and channel
configurations (only for SDHI0 so far).
Signed-off-by: Max Filippov <max.filippov@cogentembedded.com>
[Sergei: moved *enum* declaring HPB-DMAC slave IDs from now removed <mach/dma.h>
to <mach/r8a7779.h>, removed #include <mach/dma.h> from setup-r8a7779.c, removed
SSI-related *enum* values and SSI-related data from hpb_dmae_slaves[] and
hpb_dmae_channels[], added ASYNCMDR.ASBTMD{20|24|43} and ASYNCMDR.ASMD{20|24|43}
fields/values, fixed comments to ASYNCMDR.ASBTMD2[123] and ASYNCMDR.ASMD2[123]
fields/values, renamed all the bit/field/value #define's to include 'HBP_DMAE_'
prefix to match the driver, moved comments after the element initializers of
hpb_dmae_channels[].]
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add HPB-DMAC platform device on R8A7778 SoC along with its slave and channel
configurations (only for SDHI0 so far).
Signed-off-by: Max Filippov <max.filippov@cogentembedded.com>
[Sergei: moved *enum* declaring HPB-DMAC slave IDs from now removed <mach/dma.h>
to <mach/r8a7778.h>, removed #include <mach/dma.h> from setup-r8a7778.c, removed
SSI-related *enum* values and SSI-related data from hpb_dmae_slaves[] and
hpb_dmae_channels[], moved the comments after the element initializers of
hpb_dmae_channels[].]
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add a DMAC platform device and clock definitions for it on r8a73a4.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* Remove unused #gpio-ranges-cells DT property
* Remove usage of deprecated #gpio-range-cells DT property
from GPIO R-Car
Property was deprecated in v3.11-rc2
* Correct ether pinctl naming for armadillo800eva board
Regression introduced in v3.10-rc5
* Add Micrel KSZ8041 PHY fixup to lager board
This resolves a problem that has been present since 3.11-rc2
* Update SDHI DT compatibility string to the <unit>-<soc> format
This makes compatibility strings consistent across all renesas
hardware which currently supports DT.
The bindings which are being updated where intorodiced on
a per-SoC basis starting in v3.8-rc7. They may have
been internally consistent when originally added.
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Merge tag 'renesas-fixes4-for-v3.12' into soc2-base
Fourth Round of Renesas ARM based SoC fixes for v3.12
* Remove unused #gpio-ranges-cells DT property
* Remove usage of deprecated #gpio-range-cells DT property
from GPIO R-Car
Property was deprecated in v3.11-rc2
* Correct ether pinctl naming for armadillo800eva board
Regression introduced in v3.10-rc5
* Add Micrel KSZ8041 PHY fixup to lager board
This resolves a problem that has been present since 3.11-rc2
* Update SDHI DT compatibility string to the <unit>-<soc> format
This makes compatibility strings consistent across all renesas
hardware which currently supports DT.
The bindings which are being updated where intorodiced on
a per-SoC basis starting in v3.8-rc7. They may have
been internally consistent when originally added.
Tie in the APMU SMP code on r8a7791. When used together
with the secondary CPU device node and smp_ops in the
board specific code then this will allow use of the
two Cortex-A15 cores in the r8a7791 SoC.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
r8a7779 INTC needs IRL pin mode settings to determine
behavior of IRQ0 - IRQ3, and r8a7779_init_irq_extpin()
is controlling it via irlm parameter.
But this function registers renesas_intc_irqpin driver
if irlm was set, and this value depends on platform.
This is not good for DT.
This patch splits r8a7779_init_irq_extpin() function
into "mode settings" and "funtion register" parts
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
r8a7778 INTC needs IRL pin mode settings to determine
behavior of IRQ0 - IRQ3, and r8a7778_init_irq_extpin()
is controlling it via irlm parameter.
But this function registers renesas_intc_irqpin driver
if irlm was set, and this value depends on platform.
This is not good for DT.
This patch splits r8a7778_init_irq_extpin() function
into "mode settings" and "funtion register" parts.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add SCIF serial port support to the r7s72100 SoC by
adding platform devices for SCIF0 -> SCIF7 together with
clock bindings. DT device description is excluded at
this point since such bindings are still under
development.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add initial support for the r7272100 SoC including:
- Single Cortex-A9 CPU Core
- GIC
No static virtual mappings are used, all the components
make use of ioremap(). DT_MACHINE_START is still wrapped
in CONFIG_USE_OF to match other mach-shmobile code.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Make use of the R-Car Gen2 arch timer workaround on r8a7791.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add a platform device for the r8a7791 IRQC hardware
driving IRQ pins IRQ0 to IRQ9. The Linux interrupt
number is statically assigned to allow board code
written in C to make use of static interrupt numbers.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Introduce the function r8a7791_add_standard_devices() that
follows the same style as other mach-shmobile SoC code and
allows C version of board code to add on-chip devices.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Move arch timer workaround code and boot mode pin
handling from setup-r8a7790.c to setup-rcar-gen2.c.
With this in place the same code can be used on
other R-Car Generation 2 devices such as r8a7791.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Devices, initialised from the Device Tree and from platform code usually
have different names. This patch adds a clock alias for DMAC on r8a73a4
in DT mode.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This patch adds clock definitions for the 4 I2C interfaces on r8a7790 and
clock aliases, suitable for the DT mode.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add HPB-DMAC platform device on R8A7779 SoC along with its slave and channel
configurations (only for SDHI0 so far).
Signed-off-by: Max Filippov <max.filippov@cogentembedded.com>
[Sergei: moved *enum* declaring HPB-DMAC slave IDs from now removed <mach/dma.h>
to <mach/r8a7779.h>, removed #include <mach/dma.h> from setup-r8a7779.c, removed
SSI-related *enum* values and SSI-related data from hpb_dmae_slaves[] and
hpb_dmae_channels[], added ASYNCMDR.ASBTMD{20|24|43} and ASYNCMDR.ASMD{20|24|43}
fields/values, fixed comments to ASYNCMDR.ASBTMD2[123] and ASYNCMDR.ASMD2[123]
fields/values, renamed all the bit/field/value #define's to include 'HBP_DMAE_'
prefix to match the driver, moved comments after the element initializers of
hpb_dmae_channels[].]
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add HPB-DMAC platform device on R8A7778 SoC along with its slave and channel
configurations (only for SDHI0 so far).
Signed-off-by: Max Filippov <max.filippov@cogentembedded.com>
[Sergei: moved *enum* declaring HPB-DMAC slave IDs from now removed <mach/dma.h>
to <mach/r8a7778.h>, removed #include <mach/dma.h> from setup-r8a7778.c, removed
SSI-related *enum* values and SSI-related data from hpb_dmae_slaves[] and
hpb_dmae_channels[], moved the comments after the element initializers of
hpb_dmae_channels[].]
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add a DMAC platform device and clock definitions for it on r8a73a4.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* Add CPU notifier based SCU boot vector code
- Use on emev2, r8a7779 and sh73a0 SoCs
- Remove now unused shmobile_smp_scu_boot_secondary()
* Add shared APMU SMP support code
- Use to add SMP support for r8a7790 SoC
* Introduce shmobile_boot_size
* Expose shmobile_invalidate_start()
* Introduce shmobile_smp_cpu_disable()
- Use on sh73a0 SoC
- Remove now unused shmobile_smp_init_cpus()
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Merge tag 'renesas-smp-for-v3.13' into soc2-base
Renesas ARM based SoC SMP updates for v3.13
* Add CPU notifier based SCU boot vector code
- Use on emev2, r8a7779 and sh73a0 SoCs
- Remove now unused shmobile_smp_scu_boot_secondary()
* Add shared APMU SMP support code
- Use to add SMP support for r8a7790 SoC
* Introduce shmobile_boot_size
* Expose shmobile_invalidate_start()
* Introduce shmobile_smp_cpu_disable()
- Use on sh73a0 SoC
- Remove now unused shmobile_smp_init_cpus()
Add information to the shared APMU code regarding
the APMU instance used to control the CA7 cores.
This can be used on r8a7790 and r8a73a4, but should
most likely be converted to DT in the future.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Extend the APMU code with a check to only allow boot
of CPU cores that sit in the same cluster as CPU0.
This makes it possible for people to use the r8a790
CA7 boot mode with CA7-cores only. The default CA15
boot mode will enable CA15 cores only. This is an
intentional software limitation to cope with lacking
scheduler support.
By removing this patch it is possible to run all 8 cores
in parallel, but this is not recommended without out of tree
scheduler modfications or custom user space code to control
the CPU affinitiy.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Remove shmobile_smp_scu_boot_secondary() since
it is no longer used. CPU boot vector setup is
instead handled by CPU notifiers.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Now when CPU notifiers are used for SCU boot vector
setup shmobile_smp_scu_boot_secondary() is no longer
needed.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Now when CPU notifiers are used for SCU boot vector
setup shmobile_smp_scu_boot_secondary() is no longer
needed.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Now when CPU notifiers are used for SCU boot vector
setup shmobile_smp_scu_boot_secondary() is no longer
needed.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add CPU notifiers for the shared mach-shmobile SCU code
to allow removal of the shared SCU boot_secondary code.
Regarding notifiers, at CPU_UP_PREPARE time the SMP boot
vector is initialized so secondary CPU cores can boot.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add r8a7790 SMP support using the shared APMU code. To enable
SMP the r8a7790 specific DTS needs to be updated to include
CPU cores, and this is happening in a separate patch.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Introduce shared APMU SMP code for mach-shmobile. Both SMP boot up
and CPU Hotplug is supported. This version does not use DT but
if needed this will be added as an incremental feature patch.
The code is designed around CONFIG_NR_CPUS and should in theory support
any number of APMUs, however due to the current DT-less static design
only a single APMU is supported.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
MMCIF on r8a7790 doesn't support Command Completion Signal, but it does
implement a CE_CLK_CTRL2 register. Platform parameters have to be added to
account for these features on lager.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
MMCIF on sh73a0 doesn't support Command Completion Signal, a platform
parameter has to be added to disable it on kzm9g.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
MMCIF on r8a7740 doesn't support Command Completion Signal, a platform
parameter has to be added to disable it on armadillo800eva.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
MMCIF on r8a73a4 doesn't support Command Completion Signal, a platform
parameter has to be added to disable it on ape6evm.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Bock-W USB1 (CN29) can be USB Host/Func by SW98/SW99 settings.
USB Func will be enabled if CONFIG_USB_RENESAS_USBHS_UDC[_MODULE]
was selected on this patch
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
