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Commit Graph

1221 Commits

Author SHA1 Message Date
Alexandre Belloni
faf6dc64c4 ARM: at91: pm: remove unnecessary at91sam9x60_idle
cpu_do_idle() is already the default action for arm_pm_idle, there is no
need to open code it.

Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20200804115622.63232-1-alexandre.belloni@bootlin.com
2020-08-17 11:18:59 +02:00
Claudiu Beznea
e222f94351 ARM: at91: pm: of_node_put() after its usage
Put node after it has been used.

Fixes: 13f16017d3 ("ARM: at91: pm: Tie the USB clock mask to the pmc")
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Link: https://lore.kernel.org/r/1596616610-15460-4-git-send-email-claudiu.beznea@microchip.com
2020-08-17 11:18:17 +02:00
Claudiu Beznea
39add36049 ARM: at91: pm: add per soc validation of pm modes
Not all SoCs supports all the PM mode. User may end up settings,
e.g. backup mode, on a non SAMA5D2 device, but the mode to not be valid.
If backup mode is used on a devices not supporting it there will be no
way of resuming other than rebooting.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Link: https://lore.kernel.org/r/1596616610-15460-3-git-send-email-claudiu.beznea@microchip.com
2020-08-17 11:18:17 +02:00
Claudiu Beznea
e70bfc2fa8 ARM: at91: pm: add support for ULP0 fast wakeup
ULP0 fast improves suspend/resume time with few milliseconds the drawback
being the power consumption. The mean values measured for suspend/resume
time are as follows (measured on SAMA5D2 Xplained board), ULP0 compared
with fast ULP0:
- ulp0 fast: suspend time: 169 ms, resume time: 216 ms
- ulp0     : suspend time: 197 ms, resume time: 258 ms

Current consumption while suspended (measured on SAMA5D2 Xplained board):
- ulp0 fast: 730uA
- ulp0     : 270uA

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Link: https://lore.kernel.org/r/1596616610-15460-2-git-send-email-claudiu.beznea@microchip.com
2020-08-17 11:18:17 +02:00
Alexander A. Klimov
f3a49f1784 ARM: at91: Replace HTTP links with HTTPS ones
Rationale:
Reduces attack surface on kernel devs opening the links for MITM
as HTTPS traffic is much harder to manipulate.

Deterministic algorithm:
For each file:
  If not .svg:
    For each line:
      If doesn't contain `\bxmlns\b`:
        For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`:
	  If neither `\bgnu\.org/license`, nor `\bmozilla\.org/MPL\b`:
            If both the HTTP and HTTPS versions
            return 200 OK and serve the same content:
              Replace HTTP with HTTPS.

Signed-off-by: Alexander A. Klimov <grandmaster@al2klimov.de>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Link: https://lore.kernel.org/r/20200713065859.31770-1-grandmaster@al2klimov.de
2020-07-18 00:59:26 +02:00
yu kuai
f87a4f022c ARM: at91: pm: add missing put_device() call in at91_pm_sram_init()
if of_find_device_by_node() succeed, at91_pm_sram_init() doesn't have
a corresponding put_device(). Thus add a jump target to fix the exception
handling for this function implementation.

Fixes: d2e4679055 ("ARM: at91: pm: use the mmio-sram pool to access SRAM")
Signed-off-by: yu kuai <yukuai3@huawei.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Link: https://lore.kernel.org/r/20200604123301.3905837-1-yukuai3@huawei.com
2020-07-18 00:58:07 +02:00
Linus Torvalds
0e8fb69f28 ARM: SoC updates
The code changes are mostly for 32-bit platforms and include:
 
 - Lots of updates for the Nvidia Tegra platform, including
   cpuidle, pmc, and dt-binding changes
 
 - Microchip at91 power management updates for the recently added
   sam9x60 SoC
 
 - Treewide setup_irq deprecation by afzal mohammed
 
 - STMicroelectronics stm32 gains earlycon support
 
 - Renesas platforms with Cortex-A9 can now use the global timer
 
 - Some TI OMAP2+ platforms gain cpuidle support
 
 - Various cleanups for the i.MX6 and Orion platforms, as well as
   Kconfig files across all platforms
 
 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAl6EaLsACgkQmmx57+YA
 GNkg/Q/9EmLGT/bznqi6P/8V75qPY6j4swife5HlI43EdCEyN+iME1w1rFfrNilf
 A/QyXzxhYgUZoyIt7K4qjWc8fPNlJZ8X10UqeEftQFxi82cmX2+OaT2fy6OdHVRJ
 SAGb1pw7463TQ6LKA7LC7rztFjahsjnE/9szlgXQT4v5OzayGyxd3OKy2Q1zASEi
 rwN+85Lh+xJvWhhenPKVvs2Dei+up8Y9uyPfJkj2QudCB+zx5k5stkk4EiQLBd1W
 SHzhijbSU3MrAUz2Cnp9Qa+86DdGPvFPfpzQy3pSYU9nNrC0aKpS8YmHT99SIWVN
 6R1YJF7Htmui5I9+O0baejJMEqvzGUysqe+rQdCofD7ooVKWU7WKYj5HxZxyBCEN
 dvlN3KRmS6l5KLsZARSxuBUw2MPTgjsxczZ84NKMLj8czw6yXyrePZ1RWiEZ4HIu
 4GiFNLYSMmAynD/dLuC9USDsjlPsQKnQ3e8hDf3a6oK5OHUIkr3uvguhqWa5WJsi
 cy2DUeWJkXgJDhlxcfr8MiPpPJRo3N/8O8PYci8dkdDFRs32j/5Qf22vywDdUHaZ
 I9Pl+VOGOSGiqRc9gmay6DNXpJusfuv72omrz4rL4kGMahpk0LeV5w+a9TdrkreY
 sLM67wtshOjOVMc/ebQ5Q8RR17Go+MFK+Co9Yc1ybbQ6lkSzeuY=
 =UTk1
 -----END PGP SIGNATURE-----

Merge tag 'arm-soc-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC updates from Arnd Bergmann:
 "The code changes are mostly for 32-bit platforms and include:

   - Lots of updates for the Nvidia Tegra platform, including cpuidle,
     pmc, and dt-binding changes

   - Microchip at91 power management updates for the recently added
     sam9x60 SoC

   - Treewide setup_irq deprecation by afzal mohammed

   - STMicroelectronics stm32 gains earlycon support

   - Renesas platforms with Cortex-A9 can now use the global timer

   - Some TI OMAP2+ platforms gain cpuidle support

   - Various cleanups for the i.MX6 and Orion platforms, as well as
     Kconfig files across all platforms"

* tag 'arm-soc-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (75 commits)
  ARM: qcom: Add support for IPQ40xx
  ARM: mmp: replace setup_irq() by request_irq()
  ARM: cns3xxx: replace setup_irq() by request_irq()
  ARM: spear: replace setup_irq() by request_irq()
  ARM: ep93xx: Replace setup_irq() by request_irq()
  ARM: iop32x: replace setup_irq() by request_irq()
  arm: mach-dove: Mark dove_io_desc as __maybe_unused
  ARM: orion: replace setup_irq() by request_irq()
  ARM: debug: stm32: add UART early console support for STM32MP1
  ARM: debug: stm32: add UART early console support for STM32H7
  ARM: debug: stm32: add UART early console configuration for STM32F7
  ARM: debug: stm32: add UART early console configuration for STM32F4
  cpuidle: tegra: Disable CC6 state if LP2 unavailable
  cpuidle: tegra: Squash Tegra114 driver into the common driver
  cpuidle: tegra: Squash Tegra30 driver into the common driver
  cpuidle: Refactor and move out NVIDIA Tegra20 driver into drivers/cpuidle
  ARM: tegra: cpuidle: Remove unnecessary memory barrier
  ARM: tegra: cpuidle: Make abort_flag atomic
  ARM: tegra: cpuidle: Handle case where secondary CPU hangs on entering LP2
  ARM: tegra: Make outer_disable() open-coded
  ...
2020-04-03 15:02:35 -07:00
Masahiro Yamada
d198b34f38 .gitignore: add SPDX License Identifier
Add SPDX License Identifier to all .gitignore files.

Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-03-25 11:50:48 +01:00
Claudiu Beznea
bb1a0e87e1 ARM: at91: pm: add quirk for sam9x60's ulp1
On SAM9X60 2 nop operations has to be introduced after setting
WAITMODE bit in CKGR_MOR.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Link: https://lore.kernel.org/r/1579522208-19523-9-git-send-email-claudiu.beznea@microchip.com
2020-02-18 21:47:54 +01:00
Claudiu Beznea
4fd36e4583 ARM: at91: pm: add plla disable/enable support for sam9x60
Add PLLA enable/disable support for SAM9X60.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Link: https://lore.kernel.org/r/1579522208-19523-8-git-send-email-claudiu.beznea@microchip.com
2020-02-18 21:47:54 +01:00
Claudiu Beznea
4a877560fe ARM: at91: pm: s/sfr/sfrbu in pm_suspend.S
s/sfr/sfrbu in pm_suspend.S.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Link: https://lore.kernel.org/r/1579522208-19523-6-git-send-email-claudiu.beznea@microchip.com
2020-02-18 21:47:54 +01:00
Claudiu Beznea
0be298a939 ARM: at91: pm: add pmc_version member to at91_pm_data
This will be used to differentiate b/w different PLLs settings to be
applied in the final/first steps of the suspend/resume process by doing
PLL specific configurations.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Link: https://lore.kernel.org/r/1579522208-19523-5-git-send-email-claudiu.beznea@microchip.com
2020-02-18 21:47:54 +01:00
Claudiu Beznea
63d1a6b107 ARM: at91: pm: add macros for plla disable/enable
Add macros for PLLA disable and enable (in disable macro the PLLA
state will also be saved). This prepares the field for PLLA disable/enable
for suspend/resume on SAM9X60.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Link: https://lore.kernel.org/r/1579522208-19523-4-git-send-email-claudiu.beznea@microchip.com
2020-02-18 21:47:53 +01:00
Claudiu Beznea
c4cae59d80 ARM: at91: pm: revert do not disable/enable PLLA for ULP modes
This reverts commit 2725d70aa5
("ARM: at91: pm: do not disable/enable PLLA for ULP modes").
This is because PLLA is the clock source for CPU, PLLA should
be disabled/enabled in the final/first phase of suspend/resume
so that the power consumption in suspend/resume to be minimal
and suspend/resume time to be minimized.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Link: https://lore.kernel.org/r/1579522208-19523-3-git-send-email-claudiu.beznea@microchip.com
2020-02-18 21:47:53 +01:00
Claudiu Beznea
6ec1587b5c ARM: at91: pm: use proper master clock register offset
SAM9X60's PMC has different master clock register offset than the other
SoCs' PMC. Due to this, specify master clock register offset based
on PMC compatible and pass it to pm_suspend.S since it is also needed
in there. When PM part for SAM9X60 was published the SAM9X60's PMC
(commit f6deae46039c ("clk: at91: add sam9x60 pmc driver")) wasn't
integrated.

Fixes: 01c7031cfa ("ARM: at91: pm: initial PM support for SAM9X60")
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Link: https://lore.kernel.org/r/1579522208-19523-2-git-send-email-claudiu.beznea@microchip.com
2020-02-18 21:47:31 +01:00
Geert Uytterhoeven
e77a63a742 ARM: at91: Drop unneeded select of COMMON_CLK
Support for AT91/Microchip SoCs depends on ARCH_MULTIPLATFORM or
ARM_SINGLE_ARMV7M, which both select COMMON_CLK.
Hence there is no need for COMMON_CLK_AT91 to select COMMON_CLK.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Cc: Nicolas Ferre <nicolas.ferre@microchip.com>
Cc: Alexandre Belloni <alexandre.belloni@bootlin.com>
Cc: Ludovic Desroches <ludovic.desroches@microchip.com>
Link: https://lore.kernel.org/r/20200121103722.1781-5-geert+renesas@glider.be
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2020-02-10 17:55:32 +01:00
Claudiu Beznea
ec6e618c8c ARM: at91: pm: use of_device_id array to find the proper shdwc node
Use of_device_id array to find the proper shdwc compatibile node.
SAM9X60's shdwc changes were not integrated when
commit eaedc0d379 ("ARM: at91: pm: add ULP1 support for SAM9X60")
was integrated.

Fixes: eaedc0d379 ("ARM: at91: pm: add ULP1 support for SAM9X60")
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/1576062248-18514-3-git-send-email-claudiu.beznea@microchip.com
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2020-01-10 23:40:31 +01:00
Claudiu Beznea
6b9dfd986a ARM: at91: pm: use SAM9X60 PMC's compatible
SAM9X60 PMC's has a different PMC. It was not integrated at the moment
commit 01c7031cfa ("ARM: at91: pm: initial PM support for SAM9X60")
was published.

Fixes: 01c7031cfa ("ARM: at91: pm: initial PM support for SAM9X60")
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/1576062248-18514-2-git-send-email-claudiu.beznea@microchip.com
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2020-01-10 23:40:31 +01:00
Claudiu Beznea
eb0df9b7fb ARM: at91: pm: move SAM9X60's PM under its own SoC config flag
Move SAM9X60's PM part under SoC config flag. This allows the building
of SAM9X60 platform withouth depending on CONFIG_SOC_AT91SAM9 flag,
allowing us to select only necessary config flags for SAM9X60.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/1575035505-6310-4-git-send-email-claudiu.beznea@microchip.com
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2019-12-10 00:44:53 +01:00
Claudiu Beznea
fe7ff55d79 ARM: at91: Kconfig: add config flag for SAM9X60 SoC
Add config flag for SAM9X60 SoC.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/1575035505-6310-3-git-send-email-claudiu.beznea@microchip.com
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2019-12-10 00:44:53 +01:00
Claudiu Beznea
fc8c4c059c ARM: at91: Kconfig: add sam9x60 pll config flag
Add SAM9X60's pll config flag. It was first used in
commit a436c2a447 ("clk: at91: add sam9x60 PLL driver").

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/1575035505-6310-2-git-send-email-claudiu.beznea@microchip.com
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2019-12-10 00:44:53 +01:00
Masahiro Yamada
9fac85a6db ARM: at91: move platform-specific asm-offset.h to arch/arm/mach-at91
<generated/at91_pm_data-offsets.h> is only generated and included by
arch/arm/mach-at91/, so it does not need to reside in the globally
visible include/generated/.

I renamed it to arch/arm/mach-at91/pm_data-offsets.h since the prefix
'at91_' is just redundant in mach-at91/.

My main motivation of this change is to avoid the race condition for
the parallel build (-j) when CONFIG_IKHEADERS is enabled.

When it is enabled, all the headers under include/ are archived into
kernel/kheaders_data.tar.xz and exposed in the sysfs.

In the parallel build, we have no idea in which order files are built.

 - If at91_pm_data-offsets.h is built before kheaders_data.tar.xz,
   the header will be included in the archive. Probably nobody will
   use it, but it is harmless except that it will increase the archive
   size needlessly.

 - If kheaders_data.tar.xz is built before at91_pm_data-offsets.h,
   the header will not be included in the archive. However, in the next
   build, the archive will be re-generated to include the newly-found
   at91_pm_data-offsets.h. This is not nice from the build system point
   of view.

 - If at91_pm_data-offsets.h and kheaders_data.tar.xz are built at the
   same time, the corrupted header might be included in the archive,
   which does not look nice either.

This commit fixes the race.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Link: https://lore.kernel.org/r/20190823024346.591-1-yamada.masahiro@socionext.com
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2019-08-23 21:50:10 +02:00
Linus Torvalds
24e44913aa ARM: SoC platform updates
SoC platform changes. Main theme this merge window:
 
  - The Netx platform (Netx 100/500) platform is removed by Linus Walleij--
    the SoC doesn't have active maintainers with hardware, and in
    discussions with the vendor the agreement was that it's OK to remove.
 
  - Russell King has a series of patches that cleans up and refactors
    SA1101 and RiscPC support.
 -----BEGIN PGP SIGNATURE-----
 
 iQJDBAABCAAtFiEElf+HevZ4QCAJmMQ+jBrnPN6EHHcFAl0yKOgPHG9sb2ZAbGl4
 b20ubmV0AAoJEIwa5zzehBx3SNEP/iJsMeeunX0P7Ym3zNFjykhspkkUmo7sEKuz
 NBcexnQpkm+OLgjfwT7j3kXvOs4mzMzH56J6h7dEDSHbQP1MDIgpMw6OEzMMsQTV
 XL1AWz1IO7Sq/mG17daPs9c75o6NYQ7pSEd/ncbjKuJQOpGsi4DyrVrhk9WdzYl2
 hcs4XOzOMZgDTsXHVdWkfpHazpWxEXPCD7v5bt6ueU0YnT3csUbzOTTvw+55JxRV
 fYz0lg4wTMRYMQMOejpx1HXwdmbVOHLUYkCxcLUaVqMnm88q/IddJVklBbPGWAU5
 Z4gFpL+FxcFhEZtu28CoubPYzf/mHDk8Ry2UWwBiRwiGoKfblomI1fpnbyrX53aE
 lpO5p7MfOVVV2WNxpbUND+ilbgKOREfRHd314GLPUjwudp2sTuDRZ1GAbt3JwsIM
 L1HesyjCtb6itCSwGsmmGsX2Wvu+WT7slpsYwHs2qklE/X1zQq0R4Jf2xUNpwqPb
 FqGZAtc6CCQtyF/Mcpp6OQd+cV0tgQVIw7teKol/xR1dSzN/+1zO1J9UHk9/dWUU
 sb5lGa/AtBrIbWxS1qLuA5bgyDqxXYDZi0y/Bu1qMHYebRW37z9kvomtzBiMNX2o
 SAxvr9iGPlTxTjGjRCyBVFmsbCMYLabNoL9tuuXvo+DnjFoOilTef+qePOv7ZYZX
 kwUyS2eu
 =FX6e
 -----END PGP SIGNATURE-----

Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC platform updates from Olof Johansson:
 "SoC platform changes. Main theme this merge window:

   - The Netx platform (Netx 100/500) platform is removed by Linus
     Walleij-- the SoC doesn't have active maintainers with hardware,
     and in discussions with the vendor the agreement was that it's OK
     to remove.

   - Russell King has a series of patches that cleans up and refactors
     SA1101 and RiscPC support"

* tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (47 commits)
  ARM: stm32: use "depends on" instead of "if" after prompt
  ARM: sa1100: convert to common clock framework
  ARM: exynos: Cleanup cppcheck shifting warning
  ARM: pxa/lubbock: remove lubbock_set_misc_wr() from global view
  ARM: exynos: Only build MCPM support if used
  arm: add missing include platform-data/atmel.h
  ARM: davinci: Use GPIO lookup table for DA850 LEDs
  ARM: OMAP2: drop explicit assembler architecture
  ARM: use arch_extension directive instead of arch argument
  ARM: imx: Switch imx7d to imx-cpufreq-dt for speed-grading
  ARM: bcm: Enable PINCTRL for ARCH_BRCMSTB
  ARM: bcm: Enable ARCH_HAS_RESET_CONTROLLER for ARCH_BRCMSTB
  ARM: riscpc: enable chained scatterlist support
  ARM: riscpc: reduce IRQ handling code
  ARM: riscpc: move RiscPC assembly files from arch/arm/lib to mach-rpc
  ARM: riscpc: parse video information from tagged list
  ARM: riscpc: add ecard quirk for Atomwide 3port serial card
  MAINTAINERS: mvebu: Add git entry
  soc: ti: pm33xx: Add a print while entering RTC only mode with DDR in self-refresh
  ARM: OMAP2+: Make some variables static
  ...
2019-07-19 17:05:08 -07:00
Olof Johansson
abd6aa55d7 AT91 SoC for 5.3
- fix a pm.c warning with W=1
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEycoQi/giopmpPgB12wIijOdRNOUFAl0NPwAACgkQ2wIijOdR
 NOUJUg//e+xO7VtGwAtjouRj7O0HF0PMCu33jOmjxutsCzz8fg2NYHNzJ/XjxoxC
 N4Sf4NRr+qvfABUqM97E/RNiDABtvxD5ncbJH4UDlnlaF1JE49he8i0wukKI+FrA
 fFrpQC9EUalqlbLBfZCft8S6/ES27CAO1xnBcKG7Leqd7Rd+Uizm+2AP7PekriyG
 p9mQYOx5eUk+yo4AIbg7W/4WZbYQE/BPRcP0E9OtzCPHFg8q9ftfJhB/5AapZRzf
 FNJse4wsnSwDwM/I1fneHyF60aOd0oLAcZJFa4drl5XFA7ubhaz+8192Z7BJs6zC
 wj/zezkzoyK7lGLx1VZiydhsI6Ugw0gnqSgROrHsS2U01NbsHEyP/PYXHA61KlRm
 qUSZztefeDoBtZLeWvXFt2NJi6y0ioA+FFj3B3W7qeCZ+87tlGZ6QqEJRjo4OpSI
 xF5X0DxQm73t5LCqZXt9XS9Wxsh24caokUhJyGGq5qZ4BVPaSSsupg2gcubyL3ae
 bAGzXwD+RMzrbXr8AfuGowG0LaCp4ZS6HB/gdzevzN2J8LhPUHyJmtFFKJtvgqXd
 o5TvOwjoO5lHoTPkQtRnemmftelnQ2PHoOq3xox5L7eScSztZVN/xNKSfulw3hCd
 p1j6LXGIScAa2p5YUA7j/WCO0T94UjTgMl00Rh88GiidTekhsec=
 =XBOT
 -----END PGP SIGNATURE-----

Merge tag 'at91-5.3-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/soc

AT91 SoC for 5.3

 - fix a pm.c warning with W=1

* tag 'at91-5.3-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
  arm: add missing include platform-data/atmel.h

Signed-off-by: Olof Johansson <olof@lixom.net>
2019-06-25 05:50:31 -07:00
Philippe Mazenauer
95701b1c3c arm: add missing include platform-data/atmel.h
Include corresponding headerfile <linux/platform-data/atmel.h> for
function at91_suspend_entering_slow_clock().

../arch/arm/mach-at91/pm.c:279:5: warning: no previous prototype for ‘at91_suspend_entering_slow_clock’ [-Wmissing-prototypes]
 int at91_suspend_entering_slow_clock(void)
     ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

Signed-off-by: Philippe Mazenauer <philippe.mazenauer@outlook.de>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2019-06-20 12:15:47 +02:00
Thomas Gleixner
d2912cb15b treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500
Based on 2 normalized pattern(s):

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license version 2 as
  published by the free software foundation

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license version 2 as
  published by the free software foundation #

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-only

has been chosen to replace the boilerplate/reference in 4122 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Enrico Weigelt <info@metux.net>
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Allison Randal <allison@lohutok.net>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190604081206.933168790@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-06-19 17:09:55 +02:00
Thomas Gleixner
2874c5fd28 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152
Based on 1 normalized pattern(s):

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license as published by
  the free software foundation either version 2 of the license or at
  your option any later version

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-or-later

has been chosen to replace the boilerplate/reference in 3029 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Allison Randal <allison@lohutok.net>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190527070032.746973796@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-05-30 11:26:32 -07:00
Thomas Gleixner
a636cd6c42 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 4
Based on 1 normalized pattern(s):

  licensed under gplv2 or later

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-or-later

has been chosen to replace the boilerplate/reference in 118 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Jilayne Lovejoy <opensource@jilayne.com>
Reviewed-by: Steve Winslow <swinslow@gmail.com>
Reviewed-by: Allison Randal <allison@lohutok.net>
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190519154040.961286471@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-05-21 11:28:40 +02:00
Thomas Gleixner
ec8f24b7fa treewide: Add SPDX license identifier - Makefile/Kconfig
Add SPDX license identifiers to all Make/Kconfig files which:

 - Have no license information of any form

These files fall under the project license, GPL v2 only. The resulting SPDX
license identifier is:

  GPL-2.0-only

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-05-21 10:50:46 +02:00
Linus Torvalds
a13f950ef1 Merge branch 'timers-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull clocksource updates from Ingo Molnar:
 "Misc clocksource/clockevent driver updates that came in a bit late but
  are ready for v5.2"

* 'timers-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  misc: atmel_tclib: Do not probe already used TCBs
  clocksource/drivers/timer-atmel-tcb: Convert tc_clksrc_suspend|resume() to static
  clocksource/drivers/tcb_clksrc: Rename the file for consistency
  clocksource/drivers/timer-atmel-pit: Rework Kconfig option
  clocksource/drivers/tcb_clksrc: Move Kconfig option
  ARM: at91: Implement clocksource selection
  clocksource/drivers/tcb_clksrc: Use tcb as sched_clock
  clocksource/drivers/tcb_clksrc: Stop depending on atmel_tclib
  ARM: at91: move SoC specific definitions to SoC folder
  clocksource/drivers/timer-milbeaut: Cleanup common register accesses
  clocksource/drivers/timer-milbeaut: Add shutdown function
  clocksource/drivers/timer-milbeaut: Fix to enable one-shot timer
  clocksource/drivers/tegra: Rework for compensation of suspend time
  clocksource/drivers/sp804: Add COMPILE_TEST to CONFIG_ARM_TIMER_SP804
  clocksource/drivers/sun4i: Add a compatible for suniv
  dt-bindings: timer: Add Allwinner suniv timer
2019-05-19 11:11:20 -07:00
Olof Johansson
faff3fcf01 AT91 SoC for 5.2
- PM changes for SAM9X60
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEADBLyYlprFuNbTVNPjnmE/d7ZC0FAly+oWgACgkQPjnmE/d7
 ZC1aZQ/+OXJh+v+38Gp+9aDkfDM8OHVR6h76gMzb38UWPqVxbR5bgclKT3mEg1j2
 blng9+3Jhy49zoOzgBmlF6NUgSGbUN5w7F7+gxvh3dt3NE0wLVUNmobUUkhk3mWO
 pSKX21TZS5AG/PmsACn2NYQ4+p2EnMOIocqlCInNvozzfoF6N/e8ImWnGGC6+rr/
 wrauPh69zFg4Djz06s1JGCcRI2kW3irtDlhxF8gEH7bovelmXRhgeRptHXQA7set
 kAmzm8xmCrlet3CCxx7xnnQ6gp//AXoTG6SAGJcDFbuDJinvtmo36o+8gGNt5fUN
 RHEbSFGthVaFFfvR9c8/XGcA9q1PvYylv+b21UklYVqRB01YMWyjUGJcb+38tbj2
 8j5tjpqzJqg8p/nIxTPlRoS+xZF7cG5TORjolzF4y0eEyouibOYn+8tqXmO0F36Q
 6rgdcHfajgks2j7AUtH8IV2d37ZF1i879qCQ5V45IVkAFKBUG8Iaa2v0DNAGWtpe
 y8pcfXpI5xIurDBKlctBxf/c6egPFKRTe4SxLJzimQaQblO4RF+cMfpmGmOe138j
 /u6h3yTaoF/2VkrR4DYCq5mZHBOON6BuBJqXWao8SK2eNZIt8LNKlN15w62qcj69
 rtDXT7FiOM4nqOlTpFqisFYCPnQS4yBga+IMMyAuMvT5FTtMi7E=
 =/W4W
 -----END PGP SIGNATURE-----

Merge tag 'at91-5.2-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/late

AT91 SoC for 5.2

 - PM changes for SAM9X60

* tag 'at91-5.2-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
  ARM: at91: pm: do not disable/enable PLLA for ULP modes
  ARM: at91: pm: disable RC oscillator in ULP0
  ARM: at91: pm: add ULP1 support for SAM9X60
  ARM: at91: pm: add support for per SoC wakeup source configuration
  ARM: at91: pm: keep at91_pm_backup_init() only for SAMA5D2 SoCs
  ARM: at91: pm: initial PM support for SAM9X60
  dt-bindings: arm: atmel: add binding for SAM9X60 SoC
  ARM: at91: pm: introduce at91_soc_pm structure

Signed-off-by: Olof Johansson <olof@lixom.net>
2019-05-16 11:05:11 -07:00
Olof Johansson
e40b0695d5 AT91 defconfig for 5.2
- ov2640 driver as module
  - selecting HAVE_FB_ATMEL for SAMA5 SoCs is useless
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEADBLyYlprFuNbTVNPjnmE/d7ZC0FAly5nWYACgkQPjnmE/d7
 ZC01xQ//bcSDdobjETp7yS45JhDvezHii7Xm7/7pWgobAMek16ljToYqB7BA4XQb
 ZgoKSUu3Zmetkf3cTHaqzgLn1ApfXaXnQ8xhwzGHDVyjmAPIfi5/867kQNGJe+ao
 urBBcXB69u0XjnZ30Lue3EYSCP5BKu/ZNJJuhBZR1OBZk9iIG2tQXrrefalLVCUg
 rnZD18HStfNVWjFm1kgT/q6HFrOY79z5lNrzhHKsu9s5f/NrOKOJNI3KXMAFxU23
 KrRmvz6ubn9FDGobPkMGzht6sADccmKzwfa3bpYVI/i/8zAe4f9gYF68dyfbS+fs
 johQwpvM3wJ3Lp79TDYqYaVQZgm+N0TV2DcA3kuJuoCOSahomwIX19U4Xjrw1MIl
 +NgXPw0314HXbefn0PfD6bVQk63HITGo1xn9XhaPDABHvoO4NT9PMTyzpv96sh0z
 /xrWk7IbJ0hsN9+fQigD/K9HB9k3flk4aXGBVOum1Nl6hT0RMY90HMKYbFjAyU23
 VdmdIEH1lbbeJ7zWOMYJff5nCa+B65KgVn7PaIPoPgZEms1YaTwWzal/z55mcgjn
 r49Kkor+QUhcYp31UM+KX/6wup8GfLHo48eQnO3yg+nFa+J1sUMlArRsvN/Um+21
 DStMXnkVJUTMZkbsDipOujglD2vVd6NPiNXpC5t2Vb2G7jFDrUA=
 =ioJR
 -----END PGP SIGNATURE-----

Merge tag 'at91-5.2-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/late

AT91 defconfig for 5.2

 - ov2640 driver as module
 - selecting HAVE_FB_ATMEL for SAMA5 SoCs is useless

* tag 'at91-5.2-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
  ARM: at91: sama5: make ov2640 as a module
  ARM: at91: remove HAVE_FB_ATMEL for sama5 SoC as they use DRM

Signed-off-by: Olof Johansson <olof@lixom.net>
2019-05-16 10:59:33 -07:00
Alexandre Belloni
7803dc865b ARM: at91: Implement clocksource selection
Allow selecting and unselecting the PIT clocksource driver so it doesn't
have to be compiled when unused.

Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2019-05-02 21:55:58 +02:00
Peng Hao
ba5e60c9b7 arm/mach-at91/pm : fix possible object reference leak
of_find_device_by_node() takes a reference to the struct device
when it finds a match via get_device. When returning error we should
call put_device.

Reviewed-by: Mukesh Ojha <mojha@codeaurora.org>
Signed-off-by: Peng Hao <peng.hao2@zte.com.cn>
Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
2019-04-04 12:00:24 +02:00
Nicolas Ferre
3037271388 ARM: at91: remove HAVE_FB_ATMEL for sama5 SoC as they use DRM
SAMA5 devices use the newer DRM driver for LCD. They don't need
the older FB driver: remove the Kconfig option for them.

Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
2019-04-04 11:24:18 +02:00
Claudiu Beznea
2725d70aa5 ARM: at91: pm: do not disable/enable PLLA for ULP modes
There is no need to disable/enable PLLA when switching to one of the
ULP modes. The PLLA consumers should take care of this.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
2019-03-28 11:05:53 +01:00
Claudiu Beznea
bc0779bd8f ARM: at91: pm: disable RC oscillator in ULP0
Disable RC oscillator in ULP0 as datasheet specifies.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
2019-03-28 11:05:53 +01:00
Claudiu Beznea
eaedc0d379 ARM: at91: pm: add ULP1 support for SAM9X60
Add ULP1 support for SAM9X60. In pm_suspend.S enable RC oscillator in
PMC if it is not enabled. At resume the state before suspend is
restored.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
2019-03-28 11:05:53 +01:00
Claudiu Beznea
a958156dac ARM: at91: pm: add support for per SoC wakeup source configuration
Add support for per SoC wakeup source configuration. In this way
we could have per SoC wakeup sources, shutdown controller and power
management controller configurations for ULP1 power management mode.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
2019-03-28 11:05:53 +01:00
Claudiu Beznea
2fa86e5200 ARM: at91: pm: keep at91_pm_backup_init() only for SAMA5D2 SoCs
In at91_pm_backup_init() return if it is not about SAMA5D2 SoCs.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
2019-03-28 11:05:53 +01:00
Claudiu Beznea
01c7031cfa ARM: at91: pm: initial PM support for SAM9X60
Add initial PM support for SAM9X60. This include idle, WFI and ULP0.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
2019-03-28 11:05:53 +01:00
Claudiu Beznea
c3f5b8fde7 ARM: at91: pm: introduce at91_soc_pm structure
To have per SoC PM information add a new structure which embed
a member of type struct at91_pm_data. This will allow easy addition
of new information without contaminate struct at91_pm_data that is
passed to the last phase suspend function (at91_suspend_sram_fn).

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
2019-03-28 11:05:52 +01:00
Masahiro Yamada
2c667d77fc treewide: add intermediate .s files to targets
Avoid unneeded recreation of these in the incremental build.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-12-23 10:12:08 +09:00
Masahiro Yamada
4d4b5c2e3b treewide: remove explicit rules for *offsets.s
These explicit rules are unneeded because scripts/Makefile.build
provides a pattern rule to create %.s from %.c

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-12-23 10:12:03 +09:00
Linus Torvalds
4b42745211 ARM: SoC platform updates for 4.20
A couple of platforms change hands in the MAINTAINERS file:
 
 - Linus Walleij lists himself for the ARM Reference platforms:
   versatile, vexpress, integrator and realview. He has been the main
   contributor for these for a while, and makes it official now.
 
 - Vladimir Zapolskiy takes over the LPC18xx platform from Joachim Eastwood
 
 - Manivannan Sadhasivam becomes a secondary maintainer for the
   Actions Semi machines
 
 - Nicolas Ferre lists updates the MAINTAINER listing for the AT91
   platform: Ludovic Desroches is now a co-maintainer for the platform, and
   several other people (Claudiu Beznea, Cristian Birsan, Eugen Hristev,
   Codrin Ciubotariu) take over individual device drivers.
 
 Thanks everyone for working on this, and welcome to the new maintainers!
 
 The "virt" platform on qemy or kvm can now be used in big-endian mode
 without additional tricks, thanks to Jason Donenfeld.
 
 Once again, we gain support for another NXP i.MX6 variant, this time
 it's the i.MX 6ULZ 32-bit single-core version.
 
 On arm64, we add support for two SoCs from Renesas: RZ/G2E (r8a774c0)
 and RZ/G2M (r8a774a1). These are described as microcontrollers on the
 manufacturer website, but appear to be rather powerful. The RZ/G2M is
 used on the reference board for the CIP Super Long Term Support (SLTS)
 Linux Kernels.
 
 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJb1zkcAAoJEGCrR//JCVInEmgP/0hvJ+UqG2LrNpveuQNcEBPn
 Dp+B+xMlgzL/Z+jzNEjH05SSHvc4pkvu6OP/XvZJYK6jSAH2MGgmSowmRzVyOhE3
 qGFk67+5UJBdwfkFzKDrN0GlEhUOgX8pjFIWHDyo3IXVZfaPJP1BjHy9SdoSYF7a
 AqvxTPbIw8nJScjqJQ67MusMbGoPnUQH4229sGu3Gix3auBPe0NHl0kCGtWAYkr/
 F81Vooz/WCo0Hj7cztWI7NjJHlnIuEe6LwbbN5NdP5koMSjI4AAvh427xsbvPk0a
 N38QFgCI0d/pjRJA2MJVl3UAog/r37Bs7PIRwUXWGv0CboZYQiLKHuuRTcaCzrSt
 zdiysLo36nEL+8kQe7VRpfD8hOzB9+jNkpvdvp5I3qk+qJscjsheQryXiNt+SeQ/
 lHIBAldNNr++qVkLJwqMEW1+948zmNg0cU8NP6t+KEIYJG7bM5fUpUHmfeRXqmpc
 RVXC4YBBzcnkTn3TUCvWEn5xxedd6TX+2D6hJCL7mfbdoqeWQPnfBEvYASx/PHVo
 mMczvF/XCrJJOQFXiFqIh0JCR/LC/eBpfr8JNDQ7tmkSzjp1pRxVTny7tI2BgwiA
 GXmuQ7rZUpKLnm6U6qN0Yb2ZRYKtXuGulucDUPFyp3pcqjRi9fqRT8al1a/wNPIO
 cTQgeFL1xfZb11I3U6NG
 =7+46
 -----END PGP SIGNATURE-----

Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC platform updates from Arnd Bergmann:
 "A couple of platforms change hands in the MAINTAINERS file:

   - Linus Walleij lists himself for the ARM Reference platforms:
     versatile, vexpress, integrator and realview. He has been the main
     contributor for these for a while, and makes it official now.

   - Vladimir Zapolskiy takes over the LPC18xx platform from Joachim
     Eastwood

   - Manivannan Sadhasivam becomes a secondary maintainer for the
     Actions Semi machines

   - Nicolas Ferre lists updates the MAINTAINER listing for the AT91
     platform: Ludovic Desroches is now a co-maintainer for the
     platform, and several other people (Claudiu Beznea, Cristian
     Birsan, Eugen Hristev, Codrin Ciubotariu) take over individual
     device drivers.

  Thanks everyone for working on this, and welcome to the new
  maintainers!

  The "virt" platform on qemy or kvm can now be used in big-endian mode
  without additional tricks, thanks to Jason Donenfeld.

  Once again, we gain support for another NXP i.MX6 variant, this time
  it's the i.MX 6ULZ 32-bit single-core version.

  On arm64, we add support for two SoCs from Renesas: RZ/G2E (r8a774c0)
  and RZ/G2M (r8a774a1). These are described as microcontrollers on the
  manufacturer website, but appear to be rather powerful. The RZ/G2M is
  used on the reference board for the CIP Super Long Term Support (SLTS)
  Linux Kernels"

* tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (54 commits)
  MAINTAINERS: Assign myself as a maintainer of ARM/LPC18XX architecture
  arm64: exynos: Enable generic power domain support
  MAINTAINERS: remove non-exsiting email address of Baoyou
  MAINTAINERS: fix pattern in ARM/Synaptics berlin SoC section
  MAINTAINERS: Drop dt-bindings/genpd/k2g.h
  ARM: samsung: Limit SAMSUNG_PM_CHECK config option to non-Exynos platforms
  arm64: actions: Enable PINCTRL in platforms Kconfig
  MAINTAINERS: Add entry for Actions Semi Owl SoCs DMA driver
  MAINTAINERS: Add entry for Actions Semiconductor Owl I2C driver
  MAINTAINERS: Update clock binding entry for Actions Semi Owl SoCs
  ARM: imx: add i.mx6ulz msl support
  ARM: Assume maintainership of ARM reference designs
  ARM: support big-endian for the virt architecture
  MAINTAINERS: sdhci: move the Microchip entry to proper location
  MAINTAINERS: move former ATMEL entries to proper MICROCHIP location
  MAINTAINERS: remove the / ATMEL string from MICROCHIP entries
  MAINTAINERS: iio: add co-maintainer to SAMA5D2-compatible ADC driver
  MAINTAINERS: pwm: add entry for Microchip pwm driver
  MAINTAINERS: dmaengine: add files to Microchip dma entry
  MAINTAINERS: USB: change maintainer for Microchip USBA gadget driver
  ...
2018-10-29 15:37:33 -07:00
zhong jiang
95590a6286 ARM: at91: pm: call put_device instead of of_node_put in at91_pm_config_ws
of_find_device_by_node takes a reference to the struct device when it
finds a match via get_device. but it fails to put_device in
at91_pm_config_ws, for_each_matching_node_and_match will get and put
the node properly, there is no need to call the of_put_node. Therefore,
just call put_device instead of of_node_put in at91_pm_config_ws.

Fixes: d7484f5c6b ("ARM: at91: pm: configure wakeup sources for ULP1 mode")
Suggested-by: Claudiu Beznea <Claudiu.Beznea@microchip.com>
Signed-off-by: zhong jiang <zhongjiang@huawei.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2018-09-25 12:26:17 +02:00
Claudiu Beznea
9f7195da31 power: reset: at91-poweroff: switch to slow clock before shutdown
The SAMA5D2 NRST input signal is resynchronized with the SLCK clock and it
can take up to 2 SLCK cycles (about 90us) for the internal reset to be
effective. During this delay, the VDDCORE current consumption may still be
high (application-dependent) with the VDDCORE regulator already OFF. Under
such conditions, VDDCORE may operate below its operating range leading to
potential register corruption.

To prevent such situation, it is recommended to decrease significantly the
power consumption of the device once the voltage regulator is  turned-off.
This can be achieved by operating the device at a much lower low frequency.

To solve this switch the master clock to slock clock just before writing
shutdown command to shutdown controller.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Suggested-by: Patrice Vilchez <patrice.vilchez@microchip.com>
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2018-09-16 12:31:48 +02:00
Claudiu Beznea
1e1f808f9d ARM: at91: pm: remove pm_bu initialization in at91_pm_backup_init()
There is no need to initialize pm_bu since it is used only if backup
mode is selected. In case backup mode initialization fails (which means
pm_bu is invalid) the ULP0 mode will be selected.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2018-08-27 17:10:13 +02:00
Linus Torvalds
2f34a64aea ARM: Device-tree updates
Business as usual -- the bulk of our changes are to devicetree files
 with new hardware support, new SoCs and platforms, and new board types.
 
 New SoCs/platforms:
  - Raspberry Pi Compute Module (CM1) and IO board
  - i.MX6SSL from NXP
  - Renesas RZ/N1D SoC (R9A06G032), Dual Cortex-A7 with Ethernet, CAN and
    PLC interfaces
  - TI AM654 SoC, Quad Cortex-A53, safety subsystem with Cortex-R5
    controllers, communication and PRU subsystem and lots of other
    interfaces (PCIe, USB3, etc).
 
 New boards and systems:
  - Several Atmel at91-based boards from Laird
  - Marvell Armada388-based Helios4 board from SolidRun
  - Samsung Aires-based phones (s5pv210)
  - Allwinner A64-based Pinebook laptop
 
 In addition to the above, there's the usual amount of new devices
 described on existing platforms, fixes and tweaks and new minor variants
 of boards/platforms.
 -----BEGIN PGP SIGNATURE-----
 
 iQJDBAABCAAtFiEElf+HevZ4QCAJmMQ+jBrnPN6EHHcFAlt+NecPHG9sb2ZAbGl4
 b20ubmV0AAoJEIwa5zzehBx3ScQQAIic6NPWiqGEwTRN1I+WoyoCt8oTGgiiu1kf
 h23RaLWI+TaEpR1yg5ko6wGlxlvBG1C/u2sOc0lD9nSt9JQ3evXXwMQ0bUNhKdSE
 8z3jhpnJYu5iNDsB15XfznhivpjOQUQNQXPR1/PG9j6SCKgdWi6wYR+A+q98Pe9d
 otzMizQOY0QUMYAec20Zvzgfs+AvEtOAo/w5K4tRb+Fv/EVixV8bVeT4uykxunFt
 6xOM0Ssvnwo3AnEh+V+FjAL8khMC7A3JC+/emXqqcw1Ogdg/GSnxriL7v6LchcwH
 fvYb8hujQCcZ0+mlN0W214RkWd1xAc0CwJ0JdKw/RMnskty5u5B7gXcDyZFw1oJ7
 b7Uof7N8l12lsXTqWW8CKOHupI1gxYshi0QJzkgkfY6P3h8ntE8HJhhcgjcHE0AN
 3mMjhzbDGjfUykVgS2rFpR6tm3JHT13jDl88jhAT+xtuYYxy60nqPBM9MD6jIzjF
 BnIVJBNX3sYa7aheEnZFBuA/Af/05fKbpUVQTNwnfq2f6NYDAbF9iBkCHepudZBa
 0U+tNHuDlVXwLXoocE1Nac5IJgPiuX2bsuJ9xHKLXb6hMr9L4YtPOaKwDaJb1hTZ
 XIHhlrF9w0ig9gu3IxaE+rC3hfu965CeFws0kwSZ9l52xmSP0Yi22ebSTfP6+h+u
 XLyOhpp8
 =J0qC
 -----END PGP SIGNATURE-----

Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM device-tree updates from Olof Johansson:
 "Business as usual -- the bulk of our changes are to devicetree files
  with new hardware support, new SoCs and platforms, and new board
  types.

  New SoCs/platforms:
   - Raspberry Pi Compute Module (CM1) and IO board
   - i.MX6SSL from NXP
   - Renesas RZ/N1D SoC (R9A06G032), Dual Cortex-A7 with Ethernet, CAN
     and PLC interfaces
   - TI AM654 SoC, Quad Cortex-A53, safety subsystem with Cortex-R5
     controllers, communication and PRU subsystem and lots of other
     interfaces (PCIe, USB3, etc).

  New boards and systems:
   - Several Atmel at91-based boards from Laird
   - Marvell Armada388-based Helios4 board from SolidRun
   - Samsung Aires-based phones (s5pv210)
   - Allwinner A64-based Pinebook laptop

  In addition to the above, there's the usual amount of new devices
  described on existing platforms, fixes and tweaks and new minor
  variants of boards/platforms"

* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (478 commits)
  arm64: dts: sdm845: Add tsens nodes
  arm64: dts: msm8996: thermal: Initialise via DT and add second controller
  arm64: dts: sprd: Add one suspend timer
  arm64: dts: sprd: Add SC27XX ADC device
  arm64: dts: sprd: Add SC27XX eFuse device
  arm64: dts: sprd: Add SC27XX vibrator device
  arm64: dts: sprd: Add SC27XX breathing light controller device
  arm64: dts: meson-axg: add spdif-dit codec
  arm64: dts: meson-axg: add lineout codec
  arm64: dts: meson-axg: add linein codec
  arm64: dts: meson-axg: add tdm interfaces
  arm64: dts: meson-axg: add tdmout formatters
  arm64: dts: meson-axg: add tdmin formatters
  arm64: dts: meson-axg: add spdifout
  arm64: dts: rockchip: add led support for Firefly-RK3399
  arm64: dts: rockchip: remove deprecated Type-C PHY properties on rk3399
  arm64: dts: rockchip: add power button support for Firefly-RK3399
  ARM: dts: aspeed: Add coprocessor interrupt controller
  arm64: dts: meson-axg: add audio arb reset controller
  arm64: dts: meson-axg: add usb power regulator
  ...
2018-08-23 14:02:22 -07:00
Linus Torvalds
9e259f9352 ARM: 32-bit SoC platform updates
Most of the SoC updates in this cycle are cleanups and moves to more
 modern infrastructure:
  - Davinci was moved to common clock framework
  - OMAP1-based Amstrad E3 "Superphone" saw a bunch of cleanups to the
    keyboard interface (bitbanged AT keyboard via GPIO).
  - Removal of some stale code for Renesas platforms
  - Power management improvements for i.MX6LL
 -----BEGIN PGP SIGNATURE-----
 
 iQJDBAABCAAtFiEElf+HevZ4QCAJmMQ+jBrnPN6EHHcFAlt+Lh0PHG9sb2ZAbGl4
 b20ubmV0AAoJEIwa5zzehBx3Y+YP/2QVT1T1/Fz3WsuLg7BYa6r51BDxvr/pSQKh
 eqLhZCcI5RpOlW4noWgJXWqnX2AlR1vX6xe0W0ebj177ttUHmidUQUJCpwP39AGE
 LrVC2+mlFb3uPx0HlpHsx3zFZdNFfrhl5mN3JbZfnLv0fUibVEhR+K8ii7MV1/Fk
 Lbo9sVPT8GIJuU6uyTTUnsCufwCkARMhrYbO6cbtS0FCO77a5aHp7btvHZ2ykxwh
 hG9CI3FhfAP3Tkpm+IbHkC5jYQNRewQoqthzJ4WJbRrcdA/vaArBTOUoZG4NFMOM
 M3B4jd1x26llmQhUqH4kGeOZiQ714GPrKcGS+8w7Twj5sIRGDxpif2Ac0kKL2B8X
 Ps6UTM0cb63W9I+TphjLysKSarNjR2lVVhNVoJ8P47MSyDGIRpSR7+IWvlJ7U8vz
 1yMWCguwrwZH3DnQb8UINTfI1Y1RstmtO5v8paSqfJyFX5r64x6VfYso1fRzxyFE
 4r2TS0HRv117aKkHwY8smjielZ0CpGnyEDQgq9Z72V4FueIqsJQrA3oGYXgTArFl
 mLL+fJUdwPv00nWuAZ8q0wIj1NvJvksJy+cObZXL6HK9m3cSdYwOHipdG86k20S5
 6/KMPmgrMbV9YO3lVtfJZjdu2QTBiYVBPGfsiSo5lVL5Q5rDYV9QBijnE+9W9/yT
 tJ038MhK
 =ACVk
 -----END PGP SIGNATURE-----

Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM 32-bit SoC platform updates from Olof Johansson:
 "Most of the SoC updates in this cycle are cleanups and moves to more
  modern infrastructure:

   - Davinci was moved to common clock framework

   - OMAP1-based Amstrad E3 "Superphone" saw a bunch of cleanups to the
     keyboard interface (bitbanged AT keyboard via GPIO).

   - Removal of some stale code for Renesas platforms

   - Power management improvements for i.MX6LL"

* tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (112 commits)
  ARM: uniphier: select RESET_CONTROLLER
  arm64: uniphier: select RESET_CONTROLLER
  ARM: uniphier: remove empty Makefile
  ARM: exynos: Clear global variable on init error path
  ARM: exynos: Remove outdated maintainer information
  ARM: shmobile: Always enable ARCH_TIMER on SoCs with A7 and/or A15
  ARM: shmobile: r8a7779: hide unused r8a7779_platform_cpu_kill
  soc: r9a06g032: don't build SMP files for non-SMP config
  ARM: shmobile: Add the R9A06G032 SMP enabler driver
  ARM: at91: pm: configure wakeup sources for ULP1 mode
  ARM: at91: pm: add PMC fast startup registers defines
  ARM: at91: pm: Add ULP1 mode support
  ARM: at91: pm: Use ULP0 naming instead of slow clock
  ARM: hisi: handle of_iomap and fix missing of_node_put
  ARM: hisi: check of_iomap and fix missing of_node_put
  ARM: hisi: fix error handling and missing of_node_put
  ARM: mx5: Set the DBGEN bit in ARM_GPC register
  ARM: imx51: Configure M4IF to avoid visual artifacts
  ARM: imx: call imx6sx_cpuidle_init() conditionally for 6sll
  ARM: imx: fix i.MX6SLL build
  ...
2018-08-23 13:44:43 -07:00