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ARM: at91: pm: add support for per SoC wakeup source configuration
Add support for per SoC wakeup source configuration. In this way we could have per SoC wakeup sources, shutdown controller and power management controller configurations for ULP1 power management mode. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
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@ -40,6 +40,9 @@ extern void at91_pinctrl_gpio_resume(void);
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#endif
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struct at91_soc_pm {
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int (*config_shdwc_ws)(void __iomem *shdwc, u32 *mode, u32 *polarity);
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int (*config_pmc_ws)(void __iomem *pmc, u32 mode, u32 polarity);
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const struct of_device_id *ws_ids;
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struct at91_pm_data data;
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};
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@ -122,7 +125,7 @@ static int at91_pm_config_ws(unsigned int pm_mode, bool set)
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if (pm_mode != AT91_PM_ULP1)
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return 0;
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if (!soc_pm.data.pmc || !soc_pm.data.shdwc)
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if (!soc_pm.data.pmc || !soc_pm.data.shdwc || !soc_pm.ws_ids)
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return -EPERM;
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if (!set) {
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@ -130,16 +133,14 @@ static int at91_pm_config_ws(unsigned int pm_mode, bool set)
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return 0;
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}
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/* SHDWC.WUIR */
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val = readl(soc_pm.data.shdwc + 0x0c);
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mode |= (val & 0x3ff);
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polarity |= ((val >> 16) & 0x3ff);
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if (soc_pm.config_shdwc_ws)
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soc_pm.config_shdwc_ws(soc_pm.data.shdwc, &mode, &polarity);
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/* SHDWC.MR */
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val = readl(soc_pm.data.shdwc + 0x04);
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/* Loop through defined wakeup sources. */
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for_each_matching_node_and_match(np, sama5d2_ws_ids, &match) {
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for_each_matching_node_and_match(np, soc_pm.ws_ids, &match) {
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pdev = of_find_device_by_node(np);
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if (!pdev)
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continue;
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@ -161,8 +162,8 @@ put_device:
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}
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if (mode) {
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writel(mode, soc_pm.data.pmc + AT91_PMC_FSMR);
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writel(polarity, soc_pm.data.pmc + AT91_PMC_FSPR);
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if (soc_pm.config_pmc_ws)
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soc_pm.config_pmc_ws(soc_pm.data.pmc, mode, polarity);
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} else {
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pr_err("AT91: PM: no ULP1 wakeup sources found!");
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}
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@ -170,6 +171,27 @@ put_device:
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return mode ? 0 : -EPERM;
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}
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static int at91_sama5d2_config_shdwc_ws(void __iomem *shdwc, u32 *mode,
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u32 *polarity)
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{
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u32 val;
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/* SHDWC.WUIR */
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val = readl(shdwc + 0x0c);
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*mode |= (val & 0x3ff);
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*polarity |= ((val >> 16) & 0x3ff);
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return 0;
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}
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static int at91_sama5d2_config_pmc_ws(void __iomem *pmc, u32 mode, u32 polarity)
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{
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writel(mode, pmc + AT91_PMC_FSMR);
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writel(polarity, pmc + AT91_PMC_FSPR);
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return 0;
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}
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/*
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* Called after processes are frozen, but before we shutdown devices.
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*/
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@ -796,6 +818,10 @@ void __init sama5d2_pm_init(void)
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at91_pm_modes_init();
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sama5_pm_init();
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soc_pm.ws_ids = sama5d2_ws_ids;
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soc_pm.config_shdwc_ws = at91_sama5d2_config_shdwc_ws;
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soc_pm.config_pmc_ws = at91_sama5d2_config_pmc_ws;
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}
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static int __init at91_pm_modes_select(char *str)
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