Commit Graph

70 Commits

Author SHA1 Message Date
Archit Taneja
b923d40dd4 ARM: OMAP2PLUS: DSS: Ensure DSS works correctly if display is enabled in bootloader
Resetting DISPC when a DISPC output is enabled causes the DSS to go into an
inconsistent state. Thus if the bootloader has enabled a display, the hwmod code
cannot reset the DISPC module just like that, but the outputs need to be
disabled first.

Add function dispc_disable_outputs() which disables all active overlay manager
and ensure all frame transfers are completed.

Modify omap_dss_reset() to call this function and clear DSS_CONTROL,
DSS_SDI_CONTROL and DSS_PLL_CONTROL so that DSS is in a clean state when the
DSS2 driver starts.

This resolves the hang issue(caused by a L3 error during boot) seen on the
beagle board C3, which has a factory bootloader that enables display. The issue
is resolved with this patch.

Thanks to Tomi and Sricharan for some additional testing.

Acked-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Tested-by: R, Sricharan <r.sricharan@ti.com>
Signed-off-by: Archit Taneja <archit@ti.com>
[paul@pwsan.com: restructured code, removed omap_{read,write}l(), removed
 cpu_is_omap*() calls and converted to dev_attr]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2011-11-08 03:16:46 -07:00
Tomi Valkeinen
13662dc5b1 ARM: OMAP: HWMOD: Unify DSS resets for OMAPs
This patch adds a custom DSS reset function used on OMAPs from OMAP2
forward.

The function doesn't actually do a reset, it only waits for the reset to
complete. The reason for this is that on OMAP4 there is no possibility
to do a SW reset, and on OMAP2/3 doing a SW reset for dss_core resets
all the other DSS modules also, thus breaking the HWMOD model where
every DSS module is handled independently.

This fixes the problem with DSS reset on OMAP4, caused by the fact that
because there's no SW reset for dss_core on OMAP4, the HWMOD framework
doesn't try to reset dss_core and thus the DSS clocks were never enabled
at the same time. This causes causes the HWMOD reset to fail for
dss_dispc and dss_rfbi.

The common reset function will also allow us to fix another problem in
the future: before doing a reset we need to disable DSS outputs, which
are in some cases enabled by the bootloader, as otherwise DSS HW seems
to get more or less stuck, requiring a power reset to recover.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
[paul@pwsan.com: modified to build arch/arm/mach-omap2/display.o
 unconditionally to avoid an error when !CONFIG_OMAP2_DSS]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2011-11-08 03:16:13 -07:00
Tomi Valkeinen
4d0698d98f ARM: OMAP4: HWMOD: fix DSS clock data
The OMAP4 HWMOD data currently contains errors with DSS clocks:

dss_hdmi and dss_venc have their main_clks wrong. The clocks should be
dss_48mhz_clk and dss_tv_clk, respectively.

These problems were temporarily fixed with the DSS patches
9ede365aa6 ("HACK: OMAP: DSS2: clk hack
for OMAP2/3"), and df5d3ed23c ("OMAP:
DSS2: HDMI: fix hdmi clock name"), which can be reverted after this
patch.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2011-11-08 03:16:12 -07:00
Tomi Valkeinen
37ad085527 ARM: OMAP4: HWMOD: Add HWMOD_CONTROL_OPT_CLKS_IN_RESET for dss_core
DSS needs all DSS clocks to be enabled to be able to finish reset
properly. Before v3.1-rc1 the omapdss driver was managing clocks and
resets correctly. However, when omapdss started using runtime PM at
v3.1-rc1, the responsibility for the reset moved to HWMOD framework.

HWMOD framework does not currently enable all the DSS clocks when
resetting the DSS hardware. This causes the HWMOD frameworks boot-time
reset to fail, possibly leaving the DSS hardware in undefined state.

This patch sets HWMOD_CONTROL_OPT_CLKS_IN_RESET for dss_core. The flag
is actually not used on OMAP4, because dss_core hardware does not have
soft-reset functionality and thus the HWMOD framework never resets nor
waits for the reset to finish.

However, while the flag is not strictly needed currently, I think it
represents the HW correctly: all the DSS clocks should be enabled after
power-on to allow DSS hardware to finish its reset.

A custom reset function will be added in the following patches which
manages this correctly for OMAP4.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2011-11-08 03:16:11 -07:00
Tomi Valkeinen
4247878efc ARM: OMAP4: HWMOD: remove extra clocks
Remove the dss_dss_clk from dss_core's opt-clocks. dss_dss_clk already
defined as the dss main_clk, and thus is not needed as an opt-clock.

Remove opt-clocks for dss_dispc, as dispc only uses the main_clk.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2011-11-08 03:16:11 -07:00
Linus Torvalds
ac5761a650 Merge branch 'next/timer' of git://git.linaro.org/people/arnd/arm-soc
* 'next/timer' of git://git.linaro.org/people/arnd/arm-soc:
  clocksource: fixup ux500 build problems
  ARM: omap: use __devexit_p in dmtimer driver
  ARM: ux500: Reprogram timers upon resume
  ARM: plat-nomadik: timer: Export reset functions
  ARM: plat-nomadik: timer: Add support for periodic timers
  ARM: ux500: Move timer code to separate file
  ARM: ux500: add support for clocksource DBX500 PRCMU
  clocksource: add DBX500 PRCMU Timer support
  ARM: plat-nomadik: MTU sched_clock as an option
  ARM: OMAP: dmtimer: add error handling to export APIs
  ARM: OMAP: dmtimer: low-power mode support
  ARM: OMAP: dmtimer: skip reserved timers
  ARM: OMAP: dmtimer: pm_runtime support
  ARM: OMAP: dmtimer: switch-over to platform device driver
  ARM: OMAP: dmtimer: platform driver
  ARM: OMAP2+: dmtimer: convert to platform devices
  ARM: OMAP1: dmtimer: conversion to platform devices
  ARM: OMAP2+: dmtimer: add device names to flck nodes
  ARM: OMAP: Add support for dmtimer v2 ip
2011-11-01 20:18:05 -07:00
Linus Torvalds
952414505f Merge branch 'next/cleanup' of git://git.linaro.org/people/arnd/arm-soc
* 'next/cleanup' of git://git.linaro.org/people/arnd/arm-soc: (125 commits)
  ARM: mach-mxs: fix machines' initializers order
  mmc: mxcmmc: explicitly includes mach/hardware.h
  arm/imx: explicitly includes mach/hardware.h in pm-imx27.c
  arm/imx: remove mx27_setup_weimcs() from mx27.h
  arm/imx: explicitly includes mach/hardware.h in mach-kzm_arm11_01.c
  arm/imx: remove mx31_setup_weimcs() from mx31.h
  ARM: tegra: devices.c should include devices.h
  ARM: tegra: cpu-tegra: unexport two functions
  ARM: tegra: cpu-tegra: sparse type fix
  ARM: tegra: dma: staticify some tables and functions
  ARM: tegra: tegra2_clocks: don't export some tables
  ARM: tegra: tegra_powergate_is_powered should be static
  ARM: tegra: tegra_rtc_read_ms should be static
  ARM: tegra: tegra_init_cache should be static
  ARM: tegra: pcie: 0 -> NULL changes
  ARM: tegra: pcie: include board.h
  ARM: tegra: pcie: don't cast __iomem pointers
  ARM: tegra: tegra2_clocks: 0 -> NULL changes
  ARM: tegra: tegra2_clocks: don't cast __iomem pointers
  ARM: tegra: timer: don't cast __iomem pointers
  ...

Fix up trivial conflicts in
  arch/arm/mach-omap2/Makefile,
  arch/arm/mach-u300/{Makefile.boot,core.c}
  arch/arm/plat-{mxc,omap}/devices.c
2011-11-01 20:11:00 -07:00
Peter Ujfalusi
d05e2ea8dc OMAP4: hwmod: enable mcpdm hwmod device.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Jorge Eduardo Candelaria
Signed-off-by: Margarita Olaya Cabrera
Signed-off-by: Liam Girdwood <lrg@ti.com>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Benoit Cousson <b-cousson@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
2011-09-22 09:19:15 +03:00
Tarun Kanti DebBarma
c345c8b09d ARM: OMAP2+: dmtimer: convert to platform devices
Add routines to converts dmtimers to platform devices. The device data
is obtained from hwmod database of respective platform and is registered
to device model after successful binding to driver.
In addition, capability attribute of each of the timers is added in
hwmod database.

Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Signed-off-by: Thara Gopinath <thara@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Cousson, Benoit <b-cousson@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2011-09-21 15:50:31 -07:00
Paul Walmsley
d6504acd21 OMAP2+: hwmod: remove OMAP_CHIP*
At Tony's request, remove the OMAP_CHIP* flags from the hwmod data, and
replace it instead with chip family, variant, and ES level-specific lists
of hwmods to register.

Thanks to Gražvydas Ignotas <notasas@gmail.com> for finding a bug in the
AM3517/3505 support, and for other review comments.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Gražvydas Ignotas <notasas@gmail.com>
2011-09-14 17:23:19 -06:00
Benoit Cousson
03fdefe53a OMAP4: hwmod data: Add modulemode entry in omap_hwmod structure
Add a new field to provide the mode supported by the module.
The mode will control the way mandatory clocks are managed by the PRCM.

  0 : Module is temporarily disabled by SW. OCP access to module are stalled.
      Can be used to change timing parameter of GPMC module.
  1 : Module is managed automatically by HW according to clock domain
      transition. A clock domain sleep transition put module into idle.
      A wakeup domain transition put it back into function.
      If CLKTRCTRL=3, any OCP access to module is always granted.
      Module clocks may be gated according to the clock domain state.
  2 : Module is explicitly enabled. Interface clock (if not used for
      functions) may be gated according to the clock domain state.
      Functional clocks are guarantied to stay present. As long as
      in this configuration, power domain sleep transition cannot happen.

Some modules will have a modulemode initialized at 1 (HWCTRL) by default.
This is the case for interconnect and simple module like GPIO, WDT, MAILBOX.

Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2011-07-10 05:56:32 -06:00
Benoit Cousson
27bb00b58e OMAP4: hwmod data: Add PRM context register offset
Add a 'context_offs' entry in the prcm.omap4 structure to all
IPs when applicable.
The offset will be used to retrieve the per module context lost
information now available on OMAP4.

Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2011-07-10 05:56:32 -06:00
Benoit Cousson
eaac329dfa OMAP4: hwmod: Replace RSTCTRL absolute address with offset macros
The RSTCTRL register was accessed using an absolute address.
The usage of hardcoded macros to calculate virtual address from physical
one should be avoided as much as possible.
The usage of an offset will allow future improvement like migration from
the current architecture code toward a module driver.

Update prm_xxx accessors, move definition to the proper header file and
update copyrights.
Change the s16 register offset parameter to u16.

Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Rajendra Nayak <rnayak@ti.com>
[paul@pwsan.com: use '_prminst_' in function names that are part of the
 prminst44xx.c file]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2011-07-10 05:56:31 -06:00
Benoit Cousson
d0f0631ddc OMAP4: hwmod: Replace CLKCTRL absolute address with offset macros
The CLKCTRL register was accessed using an absolute address.
The usage of hardcoded macros to calculate virtual address from physical
one should be avoided as much as possible.
The usage of a offset will allow future improvement like migration from
the current architecture code toward a module driver.

Update cm_xxx accessor, move definition to the proper header file and
update copyrights.

Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Rajendra Nayak <rnayak@ti.com>
Cc: Todd Poynor <toddpoynor@google.com>
[paul@pwsan.com: renamed 'omap4_cm_' fns to 'omap4_cminst_'; removed empty
 fn prototype section from cm44xx.h; incorporated comments from Todd;
 documented some functions]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2011-07-10 05:56:30 -06:00
Benoit Cousson
a5322c6f3a OMAP4: hwmod data: Add clock domain attribute
In OMAP PRCM terminology, the clock domain is defined as a group of IPs
that share some clocks and most of the time an interface clock.
Every IP does belong to a clockdomain.
For the moment the clock domain attribute is affected to a clock node.
The issue with that approach, is that a clock might or not belong to a
clock domain. Moreover during module transition, it is up to a module
to handle properly the clock domain state and not to a clock node.

Create a clkdm_name attribute to provide this information per hwmod.

Populate this attribute for every OMAP4 hwmod entries.

Future cleanup series with remove that information from the OMAP4 clock
when it is relevant.

Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Rajendra Nayak <rnayak@ti.com>
[paul@pwsan.com: fix the mpuss_clkdm name]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2011-07-10 05:56:29 -06:00
Avinash.H.M
6d3c55fd4f OMAP: hwmod: fix the i2c-reset timeout during bootup
The sequence of _ocp_softreset doesn't work for i2c. The i2c module has a
special sequence to reset the module. The sequence is
 - Disable the I2C.
 - Write to SOFTRESET bit.
 - Enable the I2C.
 - Poll on the RESETDONE bit.
The sequence is implemented as a function and the i2c_class is updated with
the correct 'reset' pointer.  omap_hwmod_softreset function is implemented
which triggers the softreset by writing into sysconfig register. On following
this sequence, i2c module resets properly and timeouts are not seen.

Cc: Rajendra Nayak <rnayak@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Kevin Hilman <khilman@ti.com>
Signed-off-by: Avinash.H.M <avinashhm@ti.com>
[paul@pwsan.com: combined this patch with a patch to remove
 HWMOD_INIT_NO_RESET from the 44xx hwmod flags; change register
 offset conditional code to use the IP block revision; minor code
 cleanup]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2011-07-10 05:27:16 -06:00
Andy Green
4d4441a622 I2C: OMAP2+: add correct functionality flags to all omap2plus i2c dev_attr
This adds the new functionality flags for omap i2c unit to all OMAP2
hwmod definitions

Cc: patches@linaro.org
Cc: Ben Dooks <ben-linux@fluff.org>
Reported-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Andy Green <andy.green@linaro.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2011-07-10 05:27:16 -06:00
Andy Green
db791a7529 I2C: OMAP2+: Tag all OMAP2+ hwmod defintions with I2C IP revision
Since we cannot trust (or even reliably find) the OMAP I2C
peripheral unit's own revision register, we must inform the
OMAP i2c driver of which IP version it is running on.  We
do this by tagging the omap_hwmod_class for i2c on all the
OMAP2+ platform / cpu specific hwmod init and passing it up
to the driver (next patches).

Cc: patches@linaro.org
Cc: Ben Dooks <ben-linux@fluff.org>
Reported-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Andy Green <andy.green@linaro.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2011-07-10 05:27:15 -06:00
Andy Green
3e60052211 I2C: OMAP2+: Set hwmod flags to only allow 16-bit accesses to i2c
Peter Maydell noticed when running under QEMU he was getting
errors reporting 32-bit access to I2C peripheral unit registers
that are documented to be 8 or 16-bit only[1][2]

The I2C driver is blameless as it wraps its accesses in a
function using __raw_writew and __raw_readw, it turned out it
is the hwmod stuff.

However the hwmod code already has a flag to force a
perhipheral unit to only be accessed using 16-bit operations.

This patch applies the 16-bit only flag to the 2430,
OMAP3xxx and OMAP44xx hwmod structs.  2420 was already
correctly marked up as 16-bit.

The 2430 change will need testing by TI as arranged
in the comments to the previous patch version.

When the 16-bit flag is or-ed with other flags, it is placed
first as requested in comments.

[1] OMAP4430 Technical reference manual section 23.1.6.2
[2] OMAP3530 Techincal reference manual section 18.6

Cc: patches@linaro.org
Cc: Ben Dooks <ben-linux@fluff.org>
Reported-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Andy Green <andy.green@linaro.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2011-07-10 05:27:14 -06:00
Tomi Valkeinen
da7cdfac1b OMAP4: hwmod data: Change DSS main_clk scheme
Currently using pm_runtime with DSS requires the DSS driver to enable
the DSS functional clock before calling pm_runtime_get(). That makes it
impossible to use pm_runtime in DSS as it is meant to be used, with
pm_runtime callbacks.

This patch changes the hwmod database for OMAP4 so that enabling the
hwmod via pm_runtime will also enable the DSS functional clock, allowing
us to use pm_runtime properly in DSS driver.

The DSS HWMOD side is not really correct, not before nor after this
patch, and getting DSS to retention will probably not work currently.
However, it is not supported in the mainline kernel anyway, so this
won't break anything.

So this patch allows us to write the pm_runtime adaptation for the DSS
driver the way it should be done, and the HWMOD/PM side can be fixed
later.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2011-07-10 05:26:30 -06:00
Tomi Valkeinen
3a23aafcde OMAP4: hwmod data: Modify DSS opt clocks
Add missing DSS optional clocks to HWMOD data for OMAP4xxx.

Add HWMOD_CONTROL_OPT_CLKS_IN_RESET flag for dispc to fix dispc reset.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
[b-cousson@ti.com: Remove a comment and update the subject]
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
[paul@pwsan.com: removed DSS "fck" role and some clkdev aliases at Tomi's
 request]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2011-07-09 20:39:44 -06:00
Paul Walmsley
c402c0d9df Merge branches 'dmtimer_precleanup_3.1', 'hwmod_core_cleanup_a_3.1', 'combine_common_hwmod_3.1', 'omap4_hwmod_data_cleanup_a_3.1', 'clock_cleanup_a_3.1', 'prcm_cleanup_a_3.1', 'omap_pm_cleanup_3.1' and 'omap_device_cleanup_3.1' into prcm-cleanup-3.1 2011-07-09 20:24:07 -06:00
Benoit Cousson
7e69ed9742 OMAP4: hwmod data: Align interconnect format with regular modules
The interconnect modules were using a slightly different layout than
the regular modules.
Align the layout for better consitency.

Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2011-07-09 19:14:28 -06:00
Benoit Cousson
00fe610b7a OMAP4: hwmod data: Fix bad alignement
Fix .prcm alignement and usb_otg_hs class and hwmod structures.

Add a couple of more potential hwmods in the comment.
Remove hsi, since it is already included in the data.

Remove one blank line.

Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2011-07-09 19:14:28 -06:00
Benoit Cousson
7ecc5373fe OMAP4: hwmod data: Remove un-needed parens
A couple of parens were added around some flags.

Remove them, since they are not needed and not used
for any other hwmods.

Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2011-07-09 19:14:28 -06:00
Benoit Cousson
9b4021befe OMAP4: hwmod data: Fix L3 interconnect data order and alignement
Change the position of the ocp_if structure to match the template.

Remove unneeded comma at the end of address space flag field.

Remove USER_SDMA since this ocp link is only from the l3_main_1
path that is accessible only from the MPU in that case and not
the SDMA.

Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2011-07-09 19:14:27 -06:00
Paul Walmsley
bc6149587b omap_hwmod: use a terminator record with omap_hwmod_dma_info arrays
Previously, struct omap_hwmod_dma_info arrays were unterminated; and
users of these arrays used the ARRAY_SIZE() macro to determine the
length of the array.  However, ARRAY_SIZE() only works when the array
is in the same scope as the macro user.

So far this hasn't been a problem.  However, to reduce duplicated
data, a subsequent patch will move common data to a separate, shared
file.  When this is done, ARRAY_SIZE() will no longer be usable.

This patch removes ARRAY_SIZE() usage for struct omap_hwmod_dma_info
arrays and uses a sentinel value (irq == -1) as the array terminator
instead.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
2011-07-09 19:14:07 -06:00
Paul Walmsley
212738a449 omap_hwmod: use a terminator record with omap_hwmod_mpu_irqs arrays
Previously, struct omap_hwmod_mpu_irqs arrays were unterminated; and
users of these arrays used the ARRAY_SIZE() macro to determine the
length of the array.  However, ARRAY_SIZE() only works when the array
is in the same scope as the macro user.

So far this hasn't been a problem.  However, to reduce duplicated
data, a subsequent patch will move common data to a separate, shared
file.  When this is done, ARRAY_SIZE() will no longer be usable.

This patch removes ARRAY_SIZE() usage for struct omap_hwmod_mpu_irqs
arrays and uses a sentinel value (irq == -1) as the array terminator
instead.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
2011-07-09 19:14:06 -06:00
Paul Walmsley
78183f3fdf omap_hwmod: use a null structure record to terminate omap_hwmod_addr_space arrays
Previously, struct omap_hwmod_addr_space arrays were unterminated; and
users of these arrays used the ARRAY_SIZE() macro to determine the
length of the array.  However, ARRAY_SIZE() only works when the array
is in the same scope as the macro user.

So far this hasn't been a problem.  However, to reduce duplicated
data, a subsequent patch will move common data to a separate, shared
file.  When this is done, ARRAY_SIZE() will no longer be usable.

This patch removes ARRAY_SIZE() usage for struct omap_hwmod_addr_space
arrays and uses a null structure member as the array terminator
instead.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
2011-07-09 19:14:05 -06:00
Benoit Cousson
c614ebf6f7 OMAP4: hwmod data: Add MSTANDBY_SMART_WKUP flag
Add the flag to every IPs that support it to allow the
framework to enable it instead of the SMART_STANDBY default
mode.
Without that, an IP with busmaster capability will not
be able to wakeup the interconnect at all.

Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2011-07-09 19:13:35 -06:00
Shubhrajyoti D
4998b24573 omap4: hwmod: Enable the keypad
Commit 407a6888f7 (OMAP4: hwmod data:
Add AESS, McPDM, bandgap, counter_32k, MMC, KBD, ISS & IPU) added the
entry for keypad, but did not enable it.

Enable the keypad in the hwmod database so it works.

Signed-off-by: Shubhrajyoti D<shubhrajyoti@ti.com>
Acked-by: Benoit Cousson<b-cousson@ti.com>
[tony@atomide.com: updated comments]
Signed-off-by: Tony Lindgren <tony@atomide.com>
2011-06-01 02:25:05 -07:00
Benoit Cousson
1286eeb2fd OMAP2+: hwmod data: Fix wrong dma_system end address
OMAP2420, 2430 and 3xxx were using the OMAP4 end address
that unfortunately is not located at the same base address.
Moreover the OMAP4 size was set to 256 instead of 4096.

Change all .pa_end to set them to .pa_start + 0xfff

Cc: "G, Manjunath Kondaiah" <manjugk@ti.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Reported-by: Michael Fillinger <m-fillinger@ti.com>
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2011-04-19 10:15:36 -06:00
sricharan
c464523488 OMAP4: hwmod_data: Add address space and irq in L3 hwmod.
Add the address spaces, irqs of the l3 interconnect to the
hwmod data. The hwmod change is aligned with Benoit Cousson.

Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: sricharan <r.sricharan@ti.com>
Acked-by: Benoit Cousson <b-cousson@ti.com>
2011-03-09 17:23:57 +05:30
Benoit Cousson
cd97bb0032 Revert "OMAP4: hwmod data: Prevent timer1 to be reset and idle during init"
The following commit: 38698be:
OMAP2+: clockevent: set up GPTIMER clockevent hwmod right before timer init

Fixed properly the issue with early init for the timer1

So reverts commit 3b03b58dab that is now
generated a warning at boot time.

Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Reviewed-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2011-03-04 10:12:54 -08:00
Tony Lindgren
b2833a0578 Merge branches 'devel-iommu-mailbox', 'devel-mcbsp', 'devel-board' and 'devel-hsmmc' into omap-for-linus
Conflicts:
	arch/arm/mach-omap2/omap_hwmod_44xx_data.c
2011-03-02 17:11:18 -08:00
Kishore Kadiyala
6ab8946f67 OMAP: hwmod data: Add dev_attr and use in the host driver
Add a device attribute to hwmod data of omap2430, omap3, omap4.
Currently the device attribute holds information regarding dual volt MMC card
support by the controller which will be later passed to the host driver via
platform data.

Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Kishore Kadiyala <kishore.kadiyala@ti.com>
Acked-by: Benoit Cousson<b-cousson@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2011-03-01 13:12:56 -08:00
Anand Gadiyar
17203bdaf2 OMAP4: hwmod data: enable HSMMC
Enabling hsmmc hwmod for OMAP4

Signed-off-by: Anand Gadiyar <gadiyar@ti.com>
Signed-off-by: Kishore Kadiyala <kishore.kadiyala@ti.com>
Acked-by: Benoit Cousson<b-cousson@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2011-03-01 13:12:56 -08:00
Paul Walmsley
550c8092c5 OMAP2+: hwmod: rename some init functions
Rename omap_hwmod_init() to omap_hwmod_register().  Rename
omap_hwmod_late_init() to omap_hwmod_setup_all().  Also change all of
the callers to reflect the new names.  While here, update some
copyrights.

Suggested by Tony Lindgren <tony@atomide.com>.

N.B. The comment in mach-omap2/serial.c may no longer be correct, given
     recent changes in init order.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>
Cc: Kevin Hilman <khilman@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
2011-02-28 12:04:35 -07:00
Kishon Vijay Abraham I
cb7e9ded32 OMAP4: hwmod: Naming of address space
Added a name to address space belonging to SDMA and MPU facilitating
the driver to get the address space info by name. Added a revision
member inorder to facilitate the driver to differentiate between
mcbsp in different omap.
Also added a platform_get_irq in probe to get irq number by index since
from OMAP4, there will be a single irq line.

Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2011-02-24 13:02:13 -08:00
Benoit Cousson
3b03b58dab OMAP4: hwmod data: Prevent timer1 to be reset and idle during init
Since the timer1 is now started before the hwmod_init, we cannot
reset it and idle it anymore.

Add the appropriate flags to prevent the hwmod framework to do that.

Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Acked-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2011-02-22 10:34:41 -08:00
Benoit Cousson
905a74d9a0 OMAP4: hwmod data: Add rev and dev_attr fields in McSPI
- Add a rev attribute to identify various McSPI IP version.
- Add a dev_attr structure to provide the number of chipselect
  supported by the instance.

Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Govindraj.R <govindraj.raja@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2011-02-21 14:20:41 -08:00
Benoit Cousson
5844c4ead2 OMAP4: hwmod data: Add USBOTG
OMAP4 hwmod data structures are populated with base address, L3 and L4
interface clocks, IRQs and sysconfig register details.

As per OMAP USBOTG specification, need to configure the USBOTG
to smart idle/standby or no idle/standby during data transfer and
force idle/standby when not in use to support retention and offmode.
By setting HWMOD_SWSUP_SIDLE and HWMOD_SWSUP_MSTANDBY flags,framework
will take care of configuring to no idle/standby when module is enabled
and force idle/standby when idled.

Signed-off-by: Cousson, Benoit <b-cousson@ti.com>
Signed-off-by: Hema HK <hemahk@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
[b-cousson@ti.com: Fix position, opt_clk, and author]
2011-02-17 18:43:30 +01:00
Benoit Cousson
407a6888f7 OMAP4: hwmod data: Add AESS, McPDM, bandgap, counter_32k, MMC, KBD, ISS & IPU
Add more hwmod structures but keep them commented out for the moment
until the driver adaptation to hwmod / omap_device is done.

Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@ti.com>
2011-02-17 18:25:37 +01:00
Benoit Cousson
4ddff4932b OMAP4: hwmod data: Add McBSP
Add mcbsp data including a revision member in hwmod_class in
order to provide mcbsp revision information in different omap.

Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Charulatha V <charu@ti.com>
[b-cousson@ti.com: Remove the mcbsp4 memory name, re-order
properly the structures]
2011-02-17 18:25:36 +01:00
Benoit Cousson
8ca476da04 OMAP4: hwmod data: Add DMIC
Add HWMOD entries for the OMAP DMIC. The HWMOD entires define the system
resource requirements for the driver such as DMA addresses, channels,
and IRQ's. Placing this information in the HWMOD database allows for
more generic drivers to be written and having the specific implementation
details defined in HWMOD.

Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: David Lambert <dlambert@ti.com>
[b-cousson@ti.com: Change the wrong hwmod name,
add missing flag and re-order structures]
2011-02-17 18:25:34 +01:00
Benoit Cousson
ec5df927a8 OMAP4: hwmod data: Add mailbox
Mailbox hwmod data for omap4.

Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: Omar Ramirez Luna <omar.ramirez@ti.com>
[b-cousson@ti.com: Re-order the structures
and remove the irq line name]
2011-02-17 18:25:33 +01:00
Benoit Cousson
d63bd74fbb OMAP4: hwmod data: Add DSS, DISPC, DSI1&2, RFBI, HDMI and VENC
Add dss, dispc, dsi1, dsi2, hdmi, rfbi and venc hwmods.
In OMAP4 there are severals IPs that can be reached by differents
interconnect paths depending of the access initiator (MPU vs. SDMA).
In the case of the DSS, both L3 direct path and L4 CFG path can be
used to access all the DSS IPs. The two ocp_ip already exists to support
the two address spaces.

      +------------+-- L3_MAIN --+ MPU
  IP  |            |
      +-- L4_CFG --+

L3 main address range is specified first, since it is used by default.
dss is also considered as an IP as dispc, rfbi, and named as dss_core.

Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: Mayuresh Janorkar <mayur@ti.com>
Signed-off-by: Senthilvadivu Guruswamy <svadivu@ti.com>
Signed-off-by: Sumit Semwal <sumit.semwal@ti.com>
[b-cousson@ti.com: Re-organize structures to match file
convention and remove irq entry from dss_hwmod]
2011-02-17 18:25:31 +01:00
Benoit Cousson
35d1a66a9c OMAP4: hwmod data: Add timer
Add the data for the 11 timers IPs.
OMAP4 contains two differents IP variants for the timers:
- 8 x regular timer (3, 4, 5, 6, 7, 8, 9 & 11)
- 3 x 1ms timer (1, 2 & 10)

The regular timers registers programming model was changed due to the
adaptation to the new IP interface. Unfortunately the 1ms version
still use the previous programming model. The driver will have
to take care of theses differences.

Please note that the capability and the partitioning is also
different depending of the instance.
- timer 1 is inside the wakeup domain
- timers 5, 6, 7 & 8 are inside in the ABE (audio backend)
- timers 2, 3, 4, 9, 10 & 11 are inside the PER power domain

The timer was previously named gptimerX or dmtimerX, it is
now simply named timerX.

Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
[b-cousson@ti.com: Fix alignement in class attribute,
re-order flags and update the changelog]
2011-02-17 18:25:29 +01:00
Benoit Cousson
9bcbd7f0d5 OMAP4: hwmod data: Add McSPI
Update omap4 hwmod file with McSPI info.

Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: Charulatha V <charu@ti.com>
Signed-off-by: Govindraj.R <govindraj.raja@ti.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Reviewed-by: Kevin Hilman <khilman@ti.com>
2011-02-17 18:18:21 +01:00
Benoit Cousson
d11c217f1a OMAP4: hwmod data: Add hwspinlock
Add hwspinlock hwmod data for OMAP4 chip

Signed-off-by: Cousson, Benoit <b-cousson@ti.com>
Signed-off-by: Hari Kanigeri <h-kanigeri2@ti.com>
Signed-off-by: Ohad Ben-Cohen <ohad@wizery.com>
Cc: Paul Walmsley <paul@pwsan.com>
[b-cousson@ti.com: Move the data to keep the original
order and add missing SIDLE_SMART_WKUP flag]
2011-02-17 10:57:58 +01:00