Commit Graph

263816 Commits

Author SHA1 Message Date
Ben Skeggs
438d99e3b1 drm/nvd0/disp: initial crtc object implementation
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20 16:06:30 +10:00
Ben Skeggs
270a574780 drm/nvd0/disp: skeletal handling of modeset interrupts
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20 16:06:24 +10:00
Ben Skeggs
83fc083cbb drm/nvd0/disp: start on SOR encoder functions
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20 16:06:21 +10:00
Ben Skeggs
efd272a7a0 drm/nvd0/disp: setup a couple of dma objects we'll need
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20 16:06:07 +10:00
Ben Skeggs
4600522a8f drm/nvd0/disp: start on interrupt handling
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20 16:06:01 +10:00
Ben Skeggs
51beb428e4 drm/nvd0/disp: whip up some basic dma handling for the evo channels
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20 16:05:57 +10:00
Ben Skeggs
26f6d88b32 drm/nvd0/disp: very initial evo setup
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20 16:05:54 +10:00
Ben Skeggs
02e4f5877d drm/nouveau/bios: allow passing in crtc to the init table parser
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20 16:05:48 +10:00
Ben Skeggs
4784e4aa47 drm/nvd0/pm: enable clock/voltage hooks
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20 16:05:44 +10:00
Ben Skeggs
75139063b7 drm/nouveau/bios: fix INIT_GPIO for new chipsets
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20 16:05:40 +10:00
Ben Skeggs
d7f8172ca9 drm/nvd0/gpio: initial implementation
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20 16:05:36 +10:00
Ben Skeggs
eeb3ca12b4 drm/nvd0/i2c: initial implementation
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20 16:05:24 +10:00
Ben Skeggs
d9f61c2d28 drm/nouveau: initial chipset description for nvdX chipsets
All the non-stubbed functions should be okay for this chipset, the rest
will be added back as they're figured out.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20 16:05:20 +10:00
Ben Skeggs
03bc9675d3 drm/nouveau: allow modeset module option to select 'headless mode'
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20 16:05:16 +10:00
Ben Skeggs
1575b3646c drm/nouveau: fixup init/fini sequence to deal with no CRTCs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20 16:05:09 +10:00
Ben Skeggs
048a88595a drm/nouveau: make general drm modesetting init common
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20 16:05:04 +10:00
Ben Skeggs
2e9733ff7d drm/nvd0: add a card_type for 0xdX chipsets
These are different enough from 0xcX to justify it, half fermi, half
kepler(??)..

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20 16:04:45 +10:00
Martin Peres
f3f2f54e11 drm/nv04/pm: recalibrate timer on nvclk changes
Signed-off-by: Martin Peres <martin.peres@ensi-bourges.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20 16:04:42 +10:00
Ben Skeggs
591b06d73b drm/nouveau/tmr: calibrate for ns timestamps on init
We previously assumed (incorrectly a lot of the time) that PTIMER would
be programmed at a frequency which'd give its 64-bit timestamps in
nanoseconds.

By programming PTIMER ourselves, we avoid this problem.

Reviewed-by: Martin Peres <martin.peres@ensi-bourges.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20 16:04:36 +10:00
Ben Skeggs
16cd399c65 drm/nvc0/gr: unblacklist nvcf acceleration
Reported to be working.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20 16:04:32 +10:00
Ben Skeggs
0b3b5579e1 drm/nouveau: don't complain for disabled timingset entries
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20 16:04:29 +10:00
Ben Skeggs
e425e0b339 drm/nvc0/gr: copy GPC mpart config from PFFB
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20 16:04:15 +10:00
Ben Skeggs
aa6500964c drm/nvc0/vram: support non-uniform memory size per controller
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20 16:04:11 +10:00
Ben Skeggs
3c23a7b8bc drm/nvc0/gr: add support for nvcf chipset
untested, written from a trace, accel disabled by default until it is

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20 16:04:06 +10:00
Ben Skeggs
a12036ba2c drm/nouveau: allow a nouveau_mm to be created with holes
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20 16:04:00 +10:00
Ben Skeggs
987eec10dd drm/nouveau: embed nouveau_mm
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20 16:03:56 +10:00
Ben Skeggs
52d073318a drm/nv31/mpeg: support for a single class3174 user
Uncertain if/how the hw does multiple PMPEG channels, supporting one is
better than none however.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20 16:03:44 +10:00
Ben Skeggs
323dcac552 drm/nouveau: rename nv40_mpeg to nv31_mpeg
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20 16:03:38 +10:00
Ben Skeggs
9698b9a680 drm/nvc0/pm: more complete parsing of clock domains
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20 16:03:34 +10:00
Ben Skeggs
354d0781e5 drm/nvc0/pm: initial implementation of clocks_get()
Not too certain on memory clock yet, but it gets the right numbers for
each perflvl on my NVC0.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20 16:03:16 +10:00
Ben Skeggs
d0f67a48f4 drm/nva3/pm: idle graphics engine before changing clocks
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20 16:02:53 +10:00
Ben Skeggs
78e2933d07 drm/nouveau: add function to wait until a callback returns true
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20 16:02:50 +10:00
Ben Skeggs
95f0de3a0a drm/nv50/gr: insert set/clr of a ctxprog flag at start/end of ctxprog
The set will be replaced with a wait on the same flag by a subsequent
commit in order to halt a ctxprog's execution temporarily.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20 16:02:46 +10:00
Ben Skeggs
cec2a270db drm/nva3/pm: tidy and add some comments here and there
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20 16:02:40 +10:00
Ben Skeggs
4fd2847e9b drm/nva3/pm: parse/reclock vdec/41a0 clocks
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20 16:02:36 +10:00
Ben Skeggs
ca94a71fc4 drm/nva3/pm: rewrite clock_set, and switch to new interfaces
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20 16:01:51 +10:00
Ben Skeggs
77e7da6814 drm/nouveau/pm: add hooks to get/set *all* clocks at once
This is probably better than having to tell the common code about all the
clocks that exist on every chipset.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20 16:01:45 +10:00
Ben Skeggs
3b0582d31d drm/nva3/pm: rewrite clock readback functions, far more correct now
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20 16:01:41 +10:00
Ben Skeggs
03ce8d9e63 drm/nouveau/pm: some fermi chipsets still use volt 0x30
Fun, fun.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20 16:01:37 +10:00
Ben Skeggs
da1dc4cfec drm/nouveau/pm: allow voltage-only perflvl set, enable nvc0
Okay, my card didn't blow up.  Lets turn it on!

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20 16:01:30 +10:00
Ben Skeggs
3c71c2330b drm/nvc0/pm: enable voltage_get
I don't have a terribly good reason for not enabling voltage_set too, but,
lets wait and see.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20 16:01:25 +10:00
Ben Skeggs
93dccbedeb drm/nouveau/pm: show any info we can manage to glean on current perflvl
Previously wouldn't show detected voltage if we couldn't figure out the
clock frequencies..

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20 16:01:21 +10:00
Ben Skeggs
3b5565ddfd drm/nouveau/pm: add support for parsing perflvl voltage on fermi chips
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20 16:01:14 +10:00
Ben Skeggs
a31214ef3e drm/nouveau/pm: add yet another vid gpio tag
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20 16:01:11 +10:00
Ben Skeggs
f60dfb996c drm/nouveau/pm: initial attempt at parsing volt 0x40
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20 16:01:06 +10:00
Ben Skeggs
c3450239c7 drm/nouveau/pm: store voltage in microvolts
Instead of 10s of millivolts, to match fermi vbios.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20 16:01:02 +10:00
Linus Torvalds
b6fd41e29d Linux 3.1-rc6 2011-09-12 14:02:02 -07:00
Linus Torvalds
8cb3ed17cb Merge branch 'drm-fixes' of git://people.freedesktop.org/~airlied/linux
* 'drm-fixes' of git://people.freedesktop.org/~airlied/linux:
  drm: Remove duplicate "return" statement
  drm/nv04/crtc: Bail out if FB is not bound to crtc
  drm/nouveau: fix nv04_sgdma_bind on non-"4kB pages" archs
  drm/nouveau: properly handle allocation failure in nouveau_sgdma_populate
  drm/nouveau: fix oops on pre-semaphore hardware
  drm/nv50/crtc: Bail out if FB is not bound to crtc
  drm/radeon/kms: fix DP detect and EDID fetch for DP bridges
2011-09-12 13:49:07 -07:00
Linus Torvalds
4c7527821c Merge branch 'fixes' of git://git.linaro.org/people/arnd/arm-soc
* 'fixes' of git://git.linaro.org/people/arnd/arm-soc:
  ARM: CSR: add missing sentinels to of_device_id tables
  ARM: cns3xxx: Fix newly introduced warnings in the PCIe code
  ARM: cns3xxx: Fix compile error caused by hardware.h removed
  ARM: davinci: fix cache flush build error
  ARM: davinci: correct MDSTAT_STATE_MASK
  ARM: davinci: da850 EVM: read mac address from SPI flash
  OMAP: omap_device: fix !CONFIG_SUSPEND case in _noirq handlers
  OMAP2430: hwmod: musb: add missing terminator to omap2430_usbhsotg_addrs[]
  OMAP3: clock: indicate that gpt12_fck and wdt1_fck are in the WKUP clockdomain
  OMAP4: clock: fix compile warning
  OMAP4: clock: re-enable previous clockdomain enable/disable sequence
  OMAP: clockdomain: Wait for powerdomain to be ON when using clockdomain force wakeup
  OMAP: powerdomains: Make all powerdomain target states as ON at init
2011-09-12 11:51:35 -07:00
Mathieu Desnoyers
14d01ff534 ioctl: register LTTng ioctl
The LTTng 2.0 kernel tracer (stand-alone module package, available at
http://lttng.org) uses the 0xF6 ioctl range for tracer control and
transport operations.

Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2011-09-12 11:50:56 -07:00