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Author SHA1 Message Date
Vladimir Oltean
36dd1141be net: mscc: ocelot: treat 802.1ad tagged traffic as 802.1Q-untagged 
I was revisiting the topic of 802.1ad treatment in the Ocelot switch [0]
and realized that not only is its basic VLAN classification pipeline
improper for offloading vlan_protocol 802.1ad bridges, but also improper
for offloading regular 802.1Q bridges already.

Namely, 802.1ad-tagged traffic should be treated as VLAN-untagged by
bridged ports, but this switch treats it as if it was 802.1Q-tagged with
the same VID as in the 802.1ad header. This is markedly different to
what the Linux bridge expects; see the "other_tpid()" function in
tools/testing/selftests/net/forwarding/bridge_vlan_aware.sh.

An idea came to me that the VCAP IS1 TCAM is more powerful than I'm
giving it credit for, and that it actually overwrites the classified VID
before the VLAN Table lookup takes place. In other words, it can be
used even to save a packet from being dropped on ingress due to VLAN
membership.

Add a sophisticated TCAM rule hardcoded into the driver to force the
switch to behave like a Linux bridge with vlan_filtering 1 vlan_protocol
802.1Q.

Regarding the lifetime of the filter: eventually the bridge will
disappear, and vlan_filtering on the port will be restored to 0 for
standalone mode. Then the filter will be deleted.

[0]: https://lore.kernel.org/netdev/20201009122947.nvhye4hvcha3tljh@skbuf/

Fixes: 7142529f16 ("net: mscc: ocelot: add VLAN filtering")
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
 2024-08-16 09:59:32 +01:00
Vladimir Oltean
c5e12ac3be net: mscc: ocelot: serialize access to the injection/extraction groups 
As explained by Horatiu Vultur in commit 603ead9658 ("net: sparx5: Add
spinlock for frame transmission from CPU") which is for a similar
hardware design, multiple CPUs can simultaneously perform injection
or extraction. There are only 2 register groups for injection and 2
for extraction, and the driver only uses one of each. So we'd better
serialize access using spin locks, otherwise frame corruption is
possible.

Note that unlike in sparx5, FDMA in ocelot does not have this issue
because struct ocelot_fdma_tx_ring already contains an xmit_lock.

I guess this is mostly a problem for NXP LS1028A, as that is dual core.
I don't think VSC7514 is. So I'm blaming the commit where LS1028A (aka
the felix DSA driver) started using register-based packet injection and
extraction.

Fixes: 0a6f17c6ae ("net: dsa: tag_ocelot_8021q: add support for PTP timestamping")
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
 2024-08-16 09:59:32 +01:00
Vladimir Oltean
67c3ca2c5c net: mscc: ocelot: use ocelot_xmit_get_vlan_info() also for FDMA and register injection 
Problem description
-------------------

On an NXP LS1028A (felix DSA driver) with the following configuration:

- ocelot-8021q tagging protocol
- VLAN-aware bridge (with STP) spanning at least swp0 and swp1
- 8021q VLAN upper interfaces on swp0 and swp1: swp0.700, swp1.700
- ptp4l on swp0.700 and swp1.700

we see that the ptp4l instances do not see each other's traffic,
and they all go to the grand master state due to the
ANNOUNCE_RECEIPT_TIMEOUT_EXPIRES condition.

Jumping to the conclusion for the impatient
-------------------------------------------

There is a zero-day bug in the ocelot switchdev driver in the way it
handles VLAN-tagged packet injection. The correct logic already exists in
the source code, in function ocelot_xmit_get_vlan_info() added by commit
5ca721c54d ("net: dsa: tag_ocelot: set the classified VLAN during xmit").
But it is used only for normal NPI-based injection with the DSA "ocelot"
tagging protocol. The other injection code paths (register-based and
FDMA-based) roll their own wrong logic. This affects and was noticed on
the DSA "ocelot-8021q" protocol because it uses register-based injection.

By moving ocelot_xmit_get_vlan_info() to a place that's common for both
the DSA tagger and the ocelot switch library, it can also be called from
ocelot_port_inject_frame() in ocelot.c.

We need to touch the lines with ocelot_ifh_port_set()'s prototype
anyway, so let's rename it to something clearer regarding what it does,
and add a kernel-doc. ocelot_ifh_set_basic() should do.

Investigation notes
-------------------

Debugging reveals that PTP event (aka those carrying timestamps, like
Sync) frames injected into swp0.700 (but also swp1.700) hit the wire
with two VLAN tags:

00000000: 01 1b 19 00 00 00 00 01 02 03 04 05 81 00 02 bc
                                              ~~~~~~~~~~~
00000010: 81 00 02 bc 88 f7 00 12 00 2c 00 00 02 00 00 00
          ~~~~~~~~~~~
00000020: 00 00 00 00 00 00 00 00 00 00 00 01 02 ff fe 03
00000030: 04 05 00 01 00 04 00 00 00 00 00 00 00 00 00 00
00000040: 00 00

The second (unexpected) VLAN tag makes felix_check_xtr_pkt() ->
ptp_classify_raw() fail to see these as PTP packets at the link
partner's receiving end, and return PTP_CLASS_NONE (because the BPF
classifier is not written to expect 2 VLAN tags).

The reason why packets have 2 VLAN tags is because the transmission
code treats VLAN incorrectly.

Neither ocelot switchdev, nor felix DSA, declare the NETIF_F_HW_VLAN_CTAG_TX
feature. Therefore, at xmit time, all VLANs should be in the skb head,
and none should be in the hwaccel area. This is done by:

static struct sk_buff *validate_xmit_vlan(struct sk_buff *skb,
					  netdev_features_t features)
{
	if (skb_vlan_tag_present(skb) &&
	    !vlan_hw_offload_capable(features, skb->vlan_proto))
		skb = __vlan_hwaccel_push_inside(skb);
	return skb;
}

But ocelot_port_inject_frame() handles things incorrectly:

	ocelot_ifh_port_set(ifh, port, rew_op, skb_vlan_tag_get(skb));

void ocelot_ifh_port_set(struct sk_buff *skb, void *ifh, int port, u32 rew_op)
{
	(...)
	if (vlan_tag)
		ocelot_ifh_set_vlan_tci(ifh, vlan_tag);
	(...)
}

The way __vlan_hwaccel_push_inside() pushes the tag inside the skb head
is by calling:

static inline void __vlan_hwaccel_clear_tag(struct sk_buff *skb)
{
	skb->vlan_present = 0;
}

which does _not_ zero out skb->vlan_tci as seen by skb_vlan_tag_get().
This means that ocelot, when it calls skb_vlan_tag_get(), sees
(and uses) a residual skb->vlan_tci, while the same VLAN tag is
_already_ in the skb head.

The trivial fix for double VLAN headers is to replace the content of
ocelot_ifh_port_set() with:

	if (skb_vlan_tag_present(skb))
		ocelot_ifh_set_vlan_tci(ifh, skb_vlan_tag_get(skb));

but this would not be correct either, because, as mentioned,
vlan_hw_offload_capable() is false for us, so we'd be inserting dead
code and we'd always transmit packets with VID=0 in the injection frame
header.

I can't actually test the ocelot switchdev driver and rely exclusively
on code inspection, but I don't think traffic from 8021q uppers has ever
been injected properly, and not double-tagged. Thus I'm blaming the
introduction of VLAN fields in the injection header - early driver code.

As hinted at in the early conclusion, what we _want_ to happen for
VLAN transmission was already described once in commit 5ca721c54d
("net: dsa: tag_ocelot: set the classified VLAN during xmit").

ocelot_xmit_get_vlan_info() intends to ensure that if the port through
which we're transmitting is under a VLAN-aware bridge, the outer VLAN
tag from the skb head is stripped from there and inserted into the
injection frame header (so that the packet is processed in hardware
through that actual VLAN). And in all other cases, the packet is sent
with VID=0 in the injection frame header, since the port is VLAN-unaware
and has logic to strip this VID on egress (making it invisible to the
wire).

Fixes: 08d02364b1 ("net: mscc: fix the injection header")
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
 2024-08-16 09:59:32 +01:00
Linus Torvalds
12cc3d5389 sound updates for 6.11-rc1 
Lots of changes in this cycle, but mostly for cleanups and
 refactoring.  Significant amount of changes are about DT schema
 conversions for ASoC at this time while we see other usual
 suspects, too.  Some highlights below:
 
 Core:
 - Re-introduction of PCM sync ID support API
 - MIDI2 time-base extension in ALSA sequencer API
 
 ASoC:
 - Syncing of features between simple-audio-card and the two
   audio-graph cards
 - Support for specifying the order of operations for components
   within cards to allow quirking for unusual systems
 - Lots of DT schema conversions
 - Continued SOF/Intel updates for topology, SoundWire, IPC3/4
 - New support for Asahi Kasei AK4619, Cirrus Logic CS530x, Everest
   Semiconductors ES8311, NXP i.MX95 and LPC32xx, Qualcomm LPASS
   v2.5 and WCD937x, Realtek RT1318 and RT1320 and Texas
   Instruments PCM5242
 
 HD-audio:
 - More quirks, Intel PantherLake support, senarytech codec support
 - Refactoring of Cirrus codec component-binding
 
 Others:
 - ALSA control kselftest improvements, and fixes for input value
   checks in various drivers
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Merge tag 'sound-6.11-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound

Pull sound updates from Takashi Iwai:
 "Lots of changes in this cycle, but mostly for cleanups and
  refactoring.

  Significant amount of changes are about DT schema conversions for ASoC
  at this time while we see other usual suspects, too.

  Some highlights below:

  Core:
   - Re-introduction of PCM sync ID support API
   - MIDI2 time-base extension in ALSA sequencer API

  ASoC:
   - Syncing of features between simple-audio-card and the two
     audio-graph cards
   - Support for specifying the order of operations for components
     within cards to allow quirking for unusual systems
   - Lots of DT schema conversions
   - Continued SOF/Intel updates for topology, SoundWire, IPC3/4
   - New support for Asahi Kasei AK4619, Cirrus Logic CS530x, Everest
     Semiconductors ES8311, NXP i.MX95 and LPC32xx, Qualcomm LPASS v2.5
     and WCD937x, Realtek RT1318 and RT1320 and Texas Instruments
     PCM5242

  HD-audio:
   - More quirks, Intel PantherLake support, senarytech codec support
   - Refactoring of Cirrus codec component-binding

  Others:
   - ALSA control kselftest improvements, and fixes for input value
     checks in various drivers"

* tag 'sound-6.11-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound: (349 commits)
  kselftest/alsa: Log the PCM ID in pcm-test
  kselftest/alsa: Use card name rather than number in test names
  ALSA: hda/realtek: Fix the speaker output on Samsung Galaxy Book Pro 360
  ALSA: hda/tas2781: Add new quirk for Lenovo Hera2 Laptop
  ALSA: seq: ump: Skip useless ports for static blocks
  ALSA: pcm_dmaengine: Don't synchronize DMA channel when DMA is paused
  ALSA: usb: Use BIT() for bit values
  ALSA: usb: Fix UBSAN warning in parse_audio_unit()
  ALSA: hda/realtek: Enable headset mic on Positivo SU C1400
  ASoC: tas2781: Add new Kontrol to set tas2563 digital Volume
  ASoC: codecs: wcd937x: Remove separate handling for vdd-buck supply
  ASoC: codecs: wcd937x: Remove the string compare in MIC BIAS widget settings
  ASoC: codecs: wcd937x-sdw: Fix Unbalanced pm_runtime_enable
  ASoC: dt-bindings: cirrus,cs42xx8: Convert to dtschema
  ASoC: cs530x: Remove bclk from private structure
  ASoC: cs530x: Calculate proper bclk rate using TDM
  ASoC: dt-bindings: cirrus,cs4270: Convert to dtschema
  firmware: cs_dsp: Rename fw_ver to wmfw_ver
  firmware: cs_dsp: Clarify wmfw format version log message
  firmware: cs_dsp: Make wmfw and bin filename arguments const char *
  ...
 2024-07-19 12:39:34 -07:00
Kory Maincent
2111375b85 net: Add struct kernel_ethtool_ts_info 
In prevision to add new UAPI for hwtstamp we will be limited to the struct
ethtool_ts_info that is currently passed in fixed binary format through the
ETHTOOL_GET_TS_INFO ethtool ioctl. It would be good if new kernel code
already started operating on an extensible kernel variant of that
structure, similar in concept to struct kernel_hwtstamp_config vs struct
hwtstamp_config.

Since struct ethtool_ts_info is in include/uapi/linux/ethtool.h, here
we introduce the kernel-only structure in include/linux/ethtool.h.
The manual copy is then made in the function called by ETHTOOL_GET_TS_INFO.

Acked-by: Shannon Nelson <shannon.nelson@amd.com>
Acked-by: Alexandra Winter <wintera@linux.ibm.com>
Signed-off-by: Kory Maincent <kory.maincent@bootlin.com>
Link: https://patch.msgid.link/20240709-feature_ptp_netnext-v17-6-b5317f50df2a@bootlin.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
 2024-07-15 08:02:26 -07:00
Herve Codina
af8432b2e4
soc: fsl: cpm1: qmc: Introduce qmc_chan_count_phandles() 
No function in the QMC API is available to get the number of phandles
present in a phandle list.

Fill this lack introducing qmc_chan_count_phandles().

Signed-off-by: Herve Codina <herve.codina@bootlin.com>
Link: https://patch.msgid.link/20240701113038.55144-9-herve.codina@bootlin.com
Signed-off-by: Mark Brown <broonie@kernel.org>
 2024-07-04 12:24:59 +01:00
Herve Codina
37797c605d
soc: fsl: cpm1: qmc: Introduce functions to get a channel from a phandle list 
qmc_chan_get_byphandle() and the resource managed version retrieve a
channel from a simple phandle.

Extend the API and introduce qmc_chan_get_byphandles_index() and the
resource managed version in order to retrieve a channel from a phandle
list using the provided index to identify the phandle in the list.

Also update qmc_chan_get_byphandle() and the resource managed version to
use qmc_chan_get_byphandles_index() and so avoid code duplication.

Signed-off-by: Herve Codina <herve.codina@bootlin.com>
Link: https://patch.msgid.link/20240701113038.55144-8-herve.codina@bootlin.com
Signed-off-by: Mark Brown <broonie@kernel.org>
 2024-07-04 12:24:58 +01:00
Linus Torvalds
619b92b9c8 I'm actually surprised this time. There aren't any new Qualcomm SoC clk 
drivers. And there's zero diff in the core clk framework. Instead we have new
 clk drivers for STM and Sophgo, with Samsung^WGoogle in third for the diffstat
 because they introduced HSI0 and HSI2 clk drivers for Google's GS101 SoC (high
 speed interface things like PCIe, UFS, and MMC). Beyond those big diffs there's
 the usual updates to various clk drivers for incorrect parent descriptions or
 mising MODULE_DEVICE_TABLE()s, etc. Nothing in particular stands out as super
 interesting here.
 
 New Drivers:
  - STM32MP257 SoC clk driver
  - Airoha EN7581 SoC clk driver
  - Sophgo CV1800B, CV1812H and SG2000 SoC clk driver
  - Loongson-2k0500 and Loongson-2k2000 SoC clk driver
  - Add HSI0 and HSI2 clock controllers for Google GS101
  - Add i.MX95 BLK CTL clock driver
 
 Updates:
  - Allocate clk_ops dynamically for SCMI clk driver
  - Add support in qcom RCG and RCG2 for multiple configurations for the same frequency
  - Use above support for IPQ8074 NSS port 5 and 6 clocks to resolve issues
  - Fix the Qualcomm APSS IPQ5018 PLL to fix boot failures of some boards
  - Cleanups and fixes for Qualcomm Stromer PLLs
  - Reduce max CPU frequency on Qualcomm APSS IPQ5018
  - Fix Kconfig dependencies of Qualcomm SM8650 GPU and SC8280XP camera
    clk drivers
  - Make Qualcomm MSM8998 Venus clocks functional
  - Cleanup downstream remnants related to DisplayPort across Qualcomm
    SM8450, SM6350, SM8550, and SM8650
  - Reuse the Huayra APSS register map on Qualcomm MSM8996 CBF PLL
  - Use a specific Qualcomm QCS404 compatible for the otherwise generic
    HFPLL
  - Remove Qualcomm SM8150 CPUSS AHB clk as it is unused
  - Remove an unused field in the Qualcomm RPM clk driver
  - Add missing MODULE_DEVICE_TABLE to Qualcomm MSM8917 and MSM8953
    global clock controller drivers
  - Allow choice of manual or firmware-driven control over PLLs, needed
    to fully implement CPU clock controllers on Exynos850
  - Correct PLL clock IDs on ExynosAutov9
  - Propagate certain clock rates to allow setting proper SPI clock
    rates on Google GS101
  - Mark certain Google GS101 clocks critical
  - Convert old S3C64xx clock controller bindings to DT schema
  - Add new PLL rate and missing mux on Rockchip rk3568
  - Add missing reset line on Rockchip rk3588
  - Removal of an unused field in struct rockchip_mmc_clock
  - Amlogic s4/a1: add regmap maximum register for proper debugfs dump
  - Amlogic s4: add MODULE_DEVICE_TABLE() on pll and periph controllers
  - Amlogic pll driver: print clock name on lock error to help debug
  - Amlogic vclk: finish dsi clock path support
  - Amlogic license: fix occurence "GPL v2" as reported by checkpatch
  - Add PM runtime support to i.MX8MP Audiomix
  - Add DT schema for i.MX95 Display Master Block Control
  - Convert to platform remove callback returning void for i.MX8MP
    Audiomix
  - Add SPI (MSIOF) and external interrupt (INTC-EX) clocks on Renesas R-Car V4M
  - Add interrupt controller (PLIC) clock and reset on Renesas RZ/Five
  - Prepare power domain support for Renesas RZ/G2L family members, and add
    actual support on Renesas RZ/G3S SoC
  - Add thermal, serial (SCIF), and timer (CMT/TMU) clocks on Renesas R-Car V4M
  - Add additional constraints to Allwinner A64 PLL MIPI clock
  - Fix autoloading sunxi-ng clocks when build as a module
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Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
 "I'm actually surprised this time. There aren't any new Qualcomm SoC
  clk drivers. And there's zero diff in the core clk framework.

  Instead we have new clk drivers for STM and Sophgo, with
  Samsung^WGoogle in third for the diffstat because they introduced HSI0
  and HSI2 clk drivers for Google's GS101 SoC (high speed interface
  things like PCIe, UFS, and MMC).

  Beyond those big diffs there's the usual updates to various clk
  drivers for incorrect parent descriptions or mising
  MODULE_DEVICE_TABLE()s, etc. Nothing in particular stands out as super
  interesting here.

  New Drivers:
   - STM32MP257 SoC clk driver
   - Airoha EN7581 SoC clk driver
   - Sophgo CV1800B, CV1812H and SG2000 SoC clk driver
   - Loongson-2k0500 and Loongson-2k2000 SoC clk driver
   - Add HSI0 and HSI2 clock controllers for Google GS101
   - Add i.MX95 BLK CTL clock driver

  Updates:
   - Allocate clk_ops dynamically for SCMI clk driver
   - Add support in qcom RCG and RCG2 for multiple configurations for
     the same frequency
   - Use above support for IPQ8074 NSS port 5 and 6 clocks to resolve
     issues
   - Fix the Qualcomm APSS IPQ5018 PLL to fix boot failures of some
     boards
   - Cleanups and fixes for Qualcomm Stromer PLLs
   - Reduce max CPU frequency on Qualcomm APSS IPQ5018
   - Fix Kconfig dependencies of Qualcomm SM8650 GPU and SC8280XP camera
     clk drivers
   - Make Qualcomm MSM8998 Venus clocks functional
   - Cleanup downstream remnants related to DisplayPort across Qualcomm
     SM8450, SM6350, SM8550, and SM8650
   - Reuse the Huayra APSS register map on Qualcomm MSM8996 CBF PLL
   - Use a specific Qualcomm QCS404 compatible for the otherwise generic
     HFPLL
   - Remove Qualcomm SM8150 CPUSS AHB clk as it is unused
   - Remove an unused field in the Qualcomm RPM clk driver
   - Add missing MODULE_DEVICE_TABLE to Qualcomm MSM8917 and MSM8953
     global clock controller drivers
   - Allow choice of manual or firmware-driven control over PLLs, needed
     to fully implement CPU clock controllers on Exynos850
   - Correct PLL clock IDs on ExynosAutov9
   - Propagate certain clock rates to allow setting proper SPI clock
     rates on Google GS101
   - Mark certain Google GS101 clocks critical
   - Convert old S3C64xx clock controller bindings to DT schema
   - Add new PLL rate and missing mux on Rockchip rk3568
   - Add missing reset line on Rockchip rk3588
   - Removal of an unused field in struct rockchip_mmc_clock
   - Amlogic s4/a1: add regmap maximum register for proper debugfs dump
   - Amlogic s4: add MODULE_DEVICE_TABLE() on pll and periph controllers
   - Amlogic pll driver: print clock name on lock error to help debug
   - Amlogic vclk: finish dsi clock path support
   - Amlogic license: fix occurence "GPL v2" as reported by checkpatch
   - Add PM runtime support to i.MX8MP Audiomix
   - Add DT schema for i.MX95 Display Master Block Control
   - Convert to platform remove callback returning void for i.MX8MP
     Audiomix
   - Add SPI (MSIOF) and external interrupt (INTC-EX) clocks on Renesas
     R-Car V4M
   - Add interrupt controller (PLIC) clock and reset on Renesas RZ/Five
   - Prepare power domain support for Renesas RZ/G2L family members, and
     add actual support on Renesas RZ/G3S SoC
   - Add thermal, serial (SCIF), and timer (CMT/TMU) clocks on Renesas
     R-Car V4M
   - Add additional constraints to Allwinner A64 PLL MIPI clock
   - Fix autoloading sunxi-ng clocks when build as a module"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (118 commits)
  clk: samsung: Don't register clkdev lookup for the fixed rate clocks
  clk, reset: microchip: mpfs: fix incorrect preprocessor conditions
  clk: qcom: clk-alpha-pll: fix rate setting for Stromer PLLs
  clk: qcom: apss-ipq-pll: fix PLL rate for IPQ5018
  clk: qcom: Fix SM_GPUCC_8650 dependencies
  clk: qcom: Fix SC_CAMCC_8280XP dependencies
  dt-bindings: clocks: stm32mp25: add access-controllers description
  clock, reset: microchip: move all mpfs reset code to the reset subsystem
  clk: samsung: gs101: drop unused HSI2 clock parent data
  clk: rockchip: rk3568: Add PLL rate for 724 MHz
  clk: rockchip: Remove an unused field in struct rockchip_mmc_clock
  dt-bindings: clock: fixed: Define a preferred node name
  clk: meson: s4: fix module autoloading
  clk: samsung: gs101: mark some apm UASC and XIU clocks critical
  clk: imx: imx8mp: Convert to platform remove callback returning void
  clk: imx: imx8mp: Switch to RUNTIME_PM_OPS()
  clk: bcm: rpi: Assign ->num before accessing ->hws
  clk: bcm: dvp: Assign ->num before accessing ->hws
  clk: samsung: gs101: add support for cmu_hsi2
  clk: samsung: gs101: add support for cmu_hsi0
  ...
 2024-05-18 12:48:37 -07:00
Linus Torvalds
c024814828 Hi, 
This is pull request for trusted keys subsystem containing a new key
 type for the Data Co-Processor (DCP), which is an IP core built into
 many NXP SoCs such as i.mx6ull.
 
 BR, Jarkko
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Merge tag 'keys-trusted-next-6.10-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/jarkko/linux-tpmdd

Pull trusted keys updates from Jarkko Sakkinen:
 "This contains a new key type for the Data Co-Processor (DCP), which is
  an IP core built into many NXP SoCs such as i.mx6ull"

* tag 'keys-trusted-next-6.10-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/jarkko/linux-tpmdd:
  docs: trusted-encrypted: add DCP as new trust source
  docs: document DCP-backed trusted keys kernel params
  MAINTAINERS: add entry for DCP-based trusted keys
  KEYS: trusted: Introduce NXP DCP-backed trusted keys
  KEYS: trusted: improve scalability of trust source config
  crypto: mxs-dcp: Add support for hardware-bound keys
 2024-05-13 10:38:13 -07:00
David Gstir
3d16af0b4c crypto: mxs-dcp: Add support for hardware-bound keys 
DCP (Data Co-Processor) is able to derive private keys for a fused
random seed, which can be referenced by handle but not accessed by
the CPU. Similarly, DCP is able to store arbitrary keys in four
dedicated key slots located in its secure memory area (internal SRAM).
These keys can be used to perform AES encryption.

Expose these derived keys and key slots through the crypto API via their
handle. The main purpose is to add DCP-backed trusted keys. Other
use cases are possible too (see similar existing paes implementations),
but these should carefully be evaluated as e.g. enabling AF_ALG will
give userspace full access to use keys. In scenarios with untrustworthy
userspace, this will enable en-/decryption oracles.

Co-developed-by: Richard Weinberger <richard@nod.at>
Signed-off-by: Richard Weinberger <richard@nod.at>
Co-developed-by: David Oberhollenzer <david.oberhollenzer@sigma-star.at>
Signed-off-by: David Oberhollenzer <david.oberhollenzer@sigma-star.at>
Signed-off-by: David Gstir <david@sigma-star.at>
Acked-by: Herbert Xu <herbert@gondor.apana.org.au>
Reviewed-by: Jarkko Sakkinen <jarkko@kernel.org>
Signed-off-by: Jarkko Sakkinen <jarkko@kernel.org>
 2024-05-09 18:29:03 +03:00
Conor Dooley
bc2da26599 clk, reset: microchip: mpfs: fix incorrect preprocessor conditions 
While moving all the reset code in the PolarFire SoC clock driver to the
reset subsystem, I removed an `#if IS_ENABLED(RESET_CONTROLLER)` from
the driver and moved it to the header, however this was not the correct
thing to do. In the driver such a condition over-eagerly provided a
complete implementation for mpfs_reset_{read,write}() when the reset
subsystem was enabled without the PolarFire SoC reset driver, but in the
header it meant that when the subsystem was enabled and the driver was
not, no implementation for mpfs_reset_controller_register() was
provided. Fix the condition so that the stub implementation of
mpfs_reset_controller_register() is used when the reset driver is
disabled.

Fixes: 098c290a49 ("clock, reset: microchip: move all mpfs reset code to the reset subsystem")
Reported-by: kernel test robot <lkp@intel.com>
Closes: https://lore.kernel.org/oe-kbuild-all/202405082259.44DzHvaN-lkp@intel.com/
Closes: https://lore.kernel.org/oe-kbuild-all/202405082200.tBrEs5CZ-lkp@intel.com/
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20240508-unabashed-cheese-8f645b4f69ba@spud
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2024-05-08 18:38:12 -07:00
Conor Dooley
098c290a49 clock, reset: microchip: move all mpfs reset code to the reset subsystem 
Stephen and Philipp, while reviewing patches, said that all of the aux
device creation and the register read/write code could be moved to the
reset subsystem, leaving the clock driver with no implementations of
reset_* functions at all. Move them.

Suggested-by: Philipp Zabel <p.zabel@pengutronix.de>
Suggested-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20240424-strangle-sharpener-34755c5e6e3e@spud
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2024-05-07 14:57:46 -07:00
Maulik Shah
f592cc5794 soc: qcom: rpmh-rsc: Enhance check for VRM in-flight request 
Each RPMh VRM accelerator resource has 3 or 4 contiguous 4-byte aligned
addresses associated with it. These control voltage, enable state, mode,
and in legacy targets, voltage headroom. The current in-flight request
checking logic looks for exact address matches. Requests for different
addresses of the same RPMh resource as thus not detected as in-flight.

Add new cmd-db API cmd_db_match_resource_addr() to enhance the in-flight
request check for VRM requests by ignoring the address offset.

This ensures that only one request is allowed to be in-flight for a given
VRM resource. This is needed to avoid scenarios where request commands are
carried out by RPMh hardware out-of-order leading to LDO regulator
over-current protection triggering.

Fixes: 658628e7ef ("drivers: qcom: rpmh-rsc: add RPMH controller for QCOM SoCs")
Cc: stable@vger.kernel.org
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Tested-by: Elliot Berman <quic_eberman@quicinc.com> # sm8650-qrd
Signed-off-by: Maulik Shah <quic_mkshah@quicinc.com>
Link: https://lore.kernel.org/r/20240215-rpmh-rsc-fixes-v4-1-9cbddfcba05b@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2024-04-21 12:11:40 -05:00
Linus Torvalds
bb41fe35dc Char/Misc and other driver subsystem updates for 6.9-rc1 
Here is the big set of char/misc and a number of other driver subsystem
 updates for 6.9-rc1.  Included in here are:
   - IIO driver updates, loads of new ones and evolution of existing ones
   - coresight driver updates
   - const cleanups for many driver subsystems
   - speakup driver additions
   - platform remove callback void cleanups
   - mei driver updates
   - mhi driver updates
   - cdx driver updates for MSI interrupt handling
   - nvmem driver updates
   - other smaller driver updates and cleanups, full details in the
     shortlog
 
 All of these have been in linux-next for a long time with no reported
 issue, other than a build warning with some older versions of gcc for a
 speakup driver, fix for that will come in a few days when I catch up
 with my pending patch queues.
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Merge tag 'char-misc-6.9-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc

Pull char/misc and other driver subsystem updates from Greg KH:
 "Here is the big set of char/misc and a number of other driver
  subsystem updates for 6.9-rc1. Included in here are:

   - IIO driver updates, loads of new ones and evolution of existing ones

   - coresight driver updates

   - const cleanups for many driver subsystems

   - speakup driver additions

   - platform remove callback void cleanups

   - mei driver updates

   - mhi driver updates

   - cdx driver updates for MSI interrupt handling

   - nvmem driver updates

   - other smaller driver updates and cleanups, full details in the
    shortlog

  All of these have been in linux-next for a long time with no reported
  issue, other than a build warning for the speakup driver"

The build warning hits clang and is a gcc (and C23) extension, and is
fixed up in the merge.

Link: https://lore.kernel.org/all/20240321134831.GA2762840@dev-arch.thelio-3990X/

* tag 'char-misc-6.9-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (279 commits)
  binder: remove redundant variable page_addr
  uio_dmem_genirq: UIO_MEM_DMA_COHERENT conversion
  uio_pruss: UIO_MEM_DMA_COHERENT conversion
  cnic,bnx2,bnx2x: use UIO_MEM_DMA_COHERENT
  uio: introduce UIO_MEM_DMA_COHERENT type
  cdx: add MSI support for CDX bus
  pps: use cflags-y instead of EXTRA_CFLAGS
  speakup: Add /dev/synthu device
  speakup: Fix 8bit characters from direct synth
  parport: sunbpp: Convert to platform remove callback returning void
  parport: amiga: Convert to platform remove callback returning void
  char: xillybus: Convert to platform remove callback returning void
  vmw_balloon: change maintainership
  MAINTAINERS: change the maintainer for hpilo driver
  char: xilinx_hwicap: Fix NULL vs IS_ERR() bug
  hpet: remove hpets::hp_clocksource
  platform: goldfish: move the separate 'default' propery for CONFIG_GOLDFISH
  char: xilinx_hwicap: drop casting to void in dev_set_drvdata
  greybus: move is_gb_* functions out of greybus.h
  greybus: Remove usage of the deprecated ida_simple_xx() API
  ...
 2024-03-21 13:21:31 -07:00
Arnd Bergmann
daa0987e1f Qualcomm driver updates for v6.9 
This introduces the Qualcomm Programmable Boot Sequencer (PBS) driver.
 
 The Qualcomm SMEM no longer acquires the hwspinlock during the "get"
 operation, to improve the system behavior during the recovery of a
 remoteproc that crashed with the hwspinlock held.
 
 The Qualcomm Always On Subsystem (AOSS) message protocol driver gains
 tracepoints, printf annotation, and a debugfs interface is introduced
 for tweaking system properties during development and debugging.
 
 The Qualcomm socinfo driver gains data for SM8475, QCM8550 and
 QCS8550 platforms, and the PM2250 is renamed to PM4125.
 
 Support for controlling the voltage regulator in SPM/SAW2 is introduced.
 
 The gfx.lvl power-domain is dropped for SA8540P, as this resource was
 incorrectly inherited from SC8280XP.
 
 Additionally some code cleanup improvements is introduced across APR,
 LLCC, SMP2P and SPM.
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Merge tag 'qcom-drivers-for-6.9' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/drivers

Qualcomm driver updates for v6.9

This introduces the Qualcomm Programmable Boot Sequencer (PBS) driver.

The Qualcomm SMEM no longer acquires the hwspinlock during the "get"
operation, to improve the system behavior during the recovery of a
remoteproc that crashed with the hwspinlock held.

The Qualcomm Always On Subsystem (AOSS) message protocol driver gains
tracepoints, printf annotation, and a debugfs interface is introduced
for tweaking system properties during development and debugging.

The Qualcomm socinfo driver gains data for SM8475, QCM8550 and
QCS8550 platforms, and the PM2250 is renamed to PM4125.

Support for controlling the voltage regulator in SPM/SAW2 is introduced.

The gfx.lvl power-domain is dropped for SA8540P, as this resource was
incorrectly inherited from SC8280XP.

Additionally some code cleanup improvements is introduced across APR,
LLCC, SMP2P and SPM.

* tag 'qcom-drivers-for-6.9' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (23 commits)
  dt-bindings: soc: qcom: qcom,saw2: add msm8226 l2 compatible
  soc: qcom: spm: add support for voltage regulator
  soc: qcom: spm: remove driver-internal structures from the driver API
  dt-bindings: soc: qcom: qcom,saw2: define optional regulator node
  dt-bindings: soc: qcom: qcom,saw2: add missing compatible strings
  dt-bindings: soc: qcom: merge qcom,saw2.txt into qcom,spm.yaml
  soc: qcom: llcc: Check return value on Broadcast_OR reg read
  soc: qcom: socinfo: Add Soc IDs for SM8475 family
  dt-bindings: arm: qcom,ids: Add IDs for SM8475 family
  soc: qcom: apr: make aprbus const
  dt-bindings: soc: qcom: qcom,pmic-glink: document X1E80100 compatible
  soc: qcom: add QCOM PBS driver
  dt-bindings: soc: qcom: Add qcom,pbs bindings
  pmdomain: qcom: rpmhpd: Drop SA8540P gfx.lvl
  soc: qcom: socinfo: rename PM2250 to PM4125
  soc: qcom: aoss: Add tracepoints in qmp_send()
  soc: qcom: socinfo: add SoC Info support for QCM8550 and QCS8550 platform
  dt-bindings: arm: qcom,ids: add SoC ID for QCM8550 and QCS8550
  soc: qcom: aoss: Add debugfs interface for sending messages
  soc: qcom: smem: remove hwspinlock from item get routine
  ...

Link: https://lore.kernel.org/r/20240225030612.480241-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 2024-03-04 16:52:37 +01:00
Krzysztof Kozlowski
0dc5b8abfa interconnect: constify of_phandle_args in xlate 
The xlate callbacks are supposed to translate of_phandle_args to proper
provider without modifying the of_phandle_args.  Make the argument
pointer to const for code safety and readability.

Acked-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Acked-by: Thierry Reding <treding@nvidia.com> # Tegra
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Alim Akhtar <alim.akhtar@samsung.com> # Samsung
Link: https://lore.kernel.org/r/20240220072213.35779-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>
 2024-02-26 00:38:17 +02:00
Dmitry Baryshkov
57e2b067f1 soc: qcom: spm: remove driver-internal structures from the driver API 
Move internal SPM driver structures to the driver itself, removing them
from the public API. The CPUidle driver doesn't use them at all.

Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20240102-saw2-spm-regulator-v7-4-0472ec237f49@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2024-02-16 11:30:57 -06:00
Kartik
8402074f30 soc/tegra: fuse: Add support for Tegra241 
Add support for Tegra241 which use ACPI boot.

Signed-off-by: Kartik <kkartik@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
 2024-02-01 15:58:05 +01:00
Christophe JAILLET
9863084dd9 soc/tegra: pmc: Remove some old and deprecated functions and constants 
These TEGRA_IO_RAIL_... functions and constants have been deprecated in
commit 21b4991051 ("soc/tegra: pmc: Add I/O pad voltage support") in
2016-11.

There seems to be no users since kernel 4.16.

Remove them now.

Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Signed-off-by: Thierry Reding <treding@nvidia.com>
 2024-02-01 15:58:04 +01:00
Dmitry Baryshkov
5155e48128 soc: qcom: socinfo: rename PM2250 to PM4125 
It seems, the only actual mentions of PM2250 can be found are related to
the Qualcomm RB1 platform. However even RB1 schematics use PM4125 as a
PMIC name. Rename PM2250 to PM4125 to follow the documentation.

Fixes: 082f9bc60f ("soc: qcom: spmi-pmic: add more PMIC SUBTYPE IDs")
Fixes: 112d96fd29 ("soc: qcom: socinfo: Add some PMICs")
Acked-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20240128-pm2250-pm4125-rename-v2-1-d51987e9f83a@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2024-01-27 21:45:49 -06:00
Linus Torvalds
2385018a4e - New Device Support 
- Add support for Qualcomm PM8937 PMIC to QCOM SPMI PMIC
 
  - Fix-ups
    - Use/convert to new/better APIs/helpers/MACROs instead of hand-rolling implementations
    - Device Tree binding adaptions/conversions/creation
    - Improve error handling; return proper error values, simplify, avoid duplicates, etc
    - Continue work to remove superfluous platform .remove() call-backs
    - Move some exported symbols into private namespaces
    - Clean-up and staticify PM related operations
    - Trivial; spelling, whitespace, clean-ups, etc
    - Fix include lists; alphabetise, remove unused, explicitly add used
 
  - Bug Fixes
    - Use PLATFORM_DEVID_AUTO to ensure multiple duplicate devices can co-exist
    - Ensure debugfs register view is correctly presented
    - Fix ordering and value issues in current use of clk_register_fractional_divider()
    - Repair Kconfig based dependency lists
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Merge tag 'mfd-next-6.8' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd

Pull mfd updates from Lee Jones:
 "New Device Support:
   - Add support for Qualcomm PM8937 PMIC to QCOM SPMI PMIC

  Fix-ups:
   - Use/convert to new/better APIs/helpers/MACROs instead of
     hand-rolling implementations
   - Device Tree binding adaptions/conversions/creation
   - Improve error handling; return proper error values, simplify,
     avoid duplicates, etc
   - Continue work to remove superfluous platform .remove() call-backs
   - Move some exported symbols into private namespaces
   - Clean-up and staticify PM related operations
   - Trivial; spelling, whitespace, clean-ups, etc
   - Fix include lists; alphabetise, remove unused, explicitly add used

  Bug Fixes:
   - Use PLATFORM_DEVID_AUTO to ensure multiple duplicate devices can
     co-exist
   - Ensure debugfs register view is correctly presented
   - Fix ordering and value issues in current use of
     clk_register_fractional_divider()
   - Repair Kconfig based dependency lists"

* tag 'mfd-next-6.8' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd: (50 commits)
  mfd: ti_am335x_tscadc: Fix TI SoC dependencies
  dt-bindings: mfd: sprd: Add support for UMS9620
  mfd: ab8500-sysctrl: Drop ancient charger
  mfd: intel-lpss: Fix the fractional clock divider flags
  mfd: tps6594: Add null pointer check to tps6594_device_init()
  dt-bindings: mfd: pm8008: Clean up example node names
  dt-bindings: mfd: hisilicon,hi6421-spmi-pmic: Clean up example
  dt-bindings: mfd: hisilicon,hi6421-spmi-pmic: Fix regulator binding
  dt-bindings: mfd: hisilicon,hi6421-spmi-pmic: Fix up binding reference
  mfd: da9062: Simplify obtaining I2C match data
  mfd: syscon: Fix null pointer dereference in of_syscon_register()
  mfd: intel-lpss: Don't fail probe on success of pci_alloc_irq_vectors()
  mfd: twl6030-irq: Revert to use of_match_device()
  mfd: cs42l43: Correct order of include files to be alphabetical
  mfd: cs42l43: Correct SoundWire port list
  mfd: Fix a few spelling mistakes in PMIC header file comments
  mfd: intel-lpss: Provide Intel LPSS PM ops structure
  mfd: intel-lpss: Move exported symbols to INTEL_LPSS namespace
  mfd: intel-lpss: Adjust header inclusions
  mfd: intel-lpss: Use device_get_match_data()
  ...
 2024-01-17 15:21:21 -08:00
Arnd Bergmann
8d446ff13a Memory controller drivers for v6.8 
Few improvements for Tegra Memory Controller: Override the SID
 programming in the device, if firmware or bootloader left it in bypass
 mode, e.g. after resuming from suspend.  Skip prorgamming the SID, if
 given Memory Controller client does not support it.
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Merge tag 'memory-controller-drv-6.8' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl into soc/drivers

Memory controller drivers for v6.8

Few improvements for Tegra Memory Controller: Override the SID
programming in the device, if firmware or bootloader left it in bypass
mode, e.g. after resuming from suspend.  Skip prorgamming the SID, if
given Memory Controller client does not support it.

* tag 'memory-controller-drv-6.8' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl:
  memory: tegra: Protect SID override call under CONFIG_IOMMU_API
  memory: tegra: Skip SID programming if SID registers aren't set
  memory: tegra: Add SID override programming for MC clients

Link: https://lore.kernel.org/r/20231213061523.4803-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 2023-12-22 11:27:02 +00:00
Arnd Bergmann
cd845dfd46 RISC-V SoC drivers for v6.8 
There's only one set of changes here, the addition of "Auto Update"
 support for PolarFire SoC. Auto Update is one of the ways that the FPGA
 bitstream can be updated, and the only one suitable for use from Linux
 as it does not immediately initiate a reboot when started.
 The driver was not accepted in the FPGA manager subsystem as the update
 only occurs after a reboot and makes no use of the FPGA manager
 framework.
 
 Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
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Merge tag 'riscv-soc-drivers-for-v6.8' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux into soc/drivers

RISC-V SoC drivers for v6.8

There's only one set of changes here, the addition of "Auto Update"
support for PolarFire SoC. Auto Update is one of the ways that the FPGA
bitstream can be updated, and the only one suitable for use from Linux
as it does not immediately initiate a reboot when started.
The driver was not accepted in the FPGA manager subsystem as the update
only occurs after a reboot and makes no use of the FPGA manager
framework.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>

* tag 'riscv-soc-drivers-for-v6.8' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux:
  MAINTAINERS: add auto-update driver to mpfs entry
  firmware: microchip: Replace of_device.h with explicit include
  firmware: microchip: add PolarFire SoC Auto Update support
  soc: microchip: mpfs: add auto-update subdev to system controller
  soc: microchip: mpfs: print service status in warning message
  soc: microchip: mpfs: enable access to the system controller's flash
  dt-bindings: soc: microchip: add a property for system controller flash
  firmware_loader: Expand Firmware upload error codes with firmware invalid error

Link: https://lore.kernel.org/r/20231221-droop-unblock-81e4fe14acee@spud
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 2023-12-22 11:22:16 +00:00
Herve Codina
7a2ee1576d soc: fsl: cpm1: qmc: Introduce functions to change timeslots at runtime 
Introduce qmc_chan_{get,set}_ts_info() function to allow timeslots
modification at runtime.

The modification is provided using qmc_chan_set_ts_info() and will be
applied on next qmc_chan_start().
qmc_chan_set_ts_info() must be called with the channel rx and/or tx
stopped.

Signed-off-by: Herve Codina <herve.codina@bootlin.com>
Reviewed-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Link: https://lore.kernel.org/r/20231205152116.122512-18-herve.codina@bootlin.com
 2023-12-12 10:29:20 +01:00
Herve Codina
ba3b7e4753 soc: fsl: cpm1: qmc: Add support for child devices 
QMC child devices support is needed to avoid orphan DT nodes that use a
simple DT phandle to reference a QMC channel.

Allow to instantiate child devices and also extend the API to get the
qmc_chan using a child device.

Signed-off-by: Herve Codina <herve.codina@bootlin.com>
Link: https://lore.kernel.org/r/20231205152116.122512-7-herve.codina@bootlin.com
 2023-12-12 10:29:20 +01:00
Herve Codina
0e034aec5b soc: fsl: cpm1: qmc: Extend the API to provide Rx status 
In HDLC mode, some status flags related to the data read transfer can be
set by the hardware and need to be known by a QMC consumer for further
analysis.

Extend the API in order to provide these transfer status flags at the
read complete() call.

In TRANSPARENT mode, these flags have no meaning. Keep only one read
complete() API and update the consumers working in transparent mode.
In this case, the newly introduced flags parameter is simply unused.

Signed-off-by: Herve Codina <herve.codina@bootlin.com>
Reviewed-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Link: https://lore.kernel.org/r/20231205152116.122512-5-herve.codina@bootlin.com
 2023-12-12 10:29:20 +01:00
Dang Huynh
4773d2f1a5 mfd: qcom-spmi-pmic: Add support for PM8937 
Add the subtype and compatible strings for PM8937.

The PM8937 is found in various SoCs, including MSM8917, MSM8937,
MSM8940 and APQ variants.

Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Signed-off-by: Dang Huynh <danct12@riseup.net>
Link: https://lore.kernel.org/r/20231121-pm8937-v2-1-b0171ab62075@riseup.net
Signed-off-by: Lee Jones <lee@kernel.org>
 2023-12-07 13:50:28 +00:00
Conor Dooley
742aa6c563 soc: microchip: mpfs: enable access to the system controller's flash 
The system controller has a flash that contains images used to reprogram
the FPGA using IAP (In-Application Programming).
Introduce a function that allows a driver with a reference to the system
controller to get one to a flash device attached to it.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
 2023-12-06 12:06:18 +00:00
Ashish Mhetre
fe3b082a6e memory: tegra: Add SID override programming for MC clients 
For some devices the bootloader/firmware may set up the device in
bypass. Memory clients like display needs kernel to program SID after
resume because bootloader/firmware programs the SID of display device to
bypass. In order to make sure that kernel IOMMU mappings for these
devices work after resume, add SID override programming support for all
memory clients on memory controller resume.

This partially reverts 'commit ef86b2c280 ("memory: tegra: Remove
clients SID override programming")'

Signed-off-by: Ashish Mhetre <amhetre@nvidia.com>
Link: https://lore.kernel.org/r/20231107112713.21399-1-amhetre@nvidia.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
 2023-11-21 10:09:28 +01:00
Linus Torvalds
4bbdb725a3 IOMMU Updates for Linux v6.7 
Including:
 
 	- Core changes:
 	  - Make default-domains mandatory for all IOMMU drivers
 	  - Remove group refcounting
 	  - Add generic_single_device_group() helper and consolidate
 	    drivers
 	  - Cleanup map/unmap ops
 	  - Scaling improvements for the IOVA rcache depot
 	  - Convert dart & iommufd to the new domain_alloc_paging()
 
 	- ARM-SMMU:
 	  - Device-tree binding update:
 	    - Add qcom,sm7150-smmu-v2 for Adreno on SM7150 SoC
 	  - SMMUv2:
 	    - Support for Qualcomm SDM670 (MDSS) and SM7150 SoCs
 	  - SMMUv3:
 	    - Large refactoring of the context descriptor code to
 	      move the CD table into the master, paving the way
 	      for '->set_dev_pasid()' support on non-SVA domains
 	  - Minor cleanups to the SVA code
 
 	- Intel VT-d:
 	  - Enable debugfs to dump domain attached to a pasid
 	  - Remove an unnecessary inline function.
 
 	- AMD IOMMU:
 	  - Initial patches for SVA support (not complete yet)
 
 	- S390 IOMMU:
 	  - DMA-API conversion and optimized IOTLB flushing
 
 	- Some smaller fixes and improvements
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Merge tag 'iommu-updates-v6.7' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu

Pull iommu updates from Joerg Roedel:
 "Core changes:
   - Make default-domains mandatory for all IOMMU drivers
   - Remove group refcounting
   - Add generic_single_device_group() helper and consolidate drivers
   - Cleanup map/unmap ops
   - Scaling improvements for the IOVA rcache depot
   - Convert dart & iommufd to the new domain_alloc_paging()

  ARM-SMMU:
   - Device-tree binding update:
       - Add qcom,sm7150-smmu-v2 for Adreno on SM7150 SoC
   - SMMUv2:
       - Support for Qualcomm SDM670 (MDSS) and SM7150 SoCs
   - SMMUv3:
       - Large refactoring of the context descriptor code to move the CD
         table into the master, paving the way for '->set_dev_pasid()'
         support on non-SVA domains
   - Minor cleanups to the SVA code

  Intel VT-d:
   - Enable debugfs to dump domain attached to a pasid
   - Remove an unnecessary inline function

  AMD IOMMU:
   - Initial patches for SVA support (not complete yet)

  S390 IOMMU:
   - DMA-API conversion and optimized IOTLB flushing

  And some smaller fixes and improvements"

* tag 'iommu-updates-v6.7' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu: (102 commits)
  iommu/dart: Remove the force_bypass variable
  iommu/dart: Call apple_dart_finalize_domain() as part of alloc_paging()
  iommu/dart: Convert to domain_alloc_paging()
  iommu/dart: Move the blocked domain support to a global static
  iommu/dart: Use static global identity domains
  iommufd: Convert to alloc_domain_paging()
  iommu/vt-d: Use ops->blocked_domain
  iommu/vt-d: Update the definition of the blocking domain
  iommu: Move IOMMU_DOMAIN_BLOCKED global statics to ops->blocked_domain
  Revert "iommu/vt-d: Remove unused function"
  iommu/amd: Remove DMA_FQ type from domain allocation path
  iommu: change iommu_map_sgtable to return signed values
  iommu/virtio: Add __counted_by for struct viommu_request and use struct_size()
  iommu/vt-d: debugfs: Support dumping a specified page table
  iommu/vt-d: debugfs: Create/remove debugfs file per {device, pasid}
  iommu/vt-d: debugfs: Dump entry pointing to huge page
  iommu/vt-d: Remove unused function
  iommu/arm-smmu-v3-sva: Remove bond refcount
  iommu/arm-smmu-v3-sva: Remove unused iommu_sva handle
  iommu/arm-smmu-v3: Rename cdcfg to cd_table
  ...
 2023-11-09 13:37:28 -08:00
Linus Torvalds
babe393974 The number of commits for documentation is not huge this time around, but 
there are some significant changes nonetheless:
 
 - Some more Spanish-language and Chinese translations.
 
 - The much-discussed documentation of the confidential-computing threat
   model.
 
 - Powerpc and RISCV documentation move under Documentation/arch - these
   complete this particular bit of documentation churn.
 
 - A large traditional-Chinese documentation update.
 
 - A new document on backporting and conflict resolution.
 
 - Some kernel-doc and Sphinx fixes.
 
 Plus the usual smattering of smaller updates and typo fixes.
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Merge tag 'docs-6.7' of git://git.lwn.net/linux

Pull documentation updates from Jonathan Corbet:
 "The number of commits for documentation is not huge this time around,
  but there are some significant changes nonetheless:

   - Some more Spanish-language and Chinese translations

   - The much-discussed documentation of the confidential-computing
     threat model

   - Powerpc and RISCV documentation move under Documentation/arch -
     these complete this particular bit of documentation churn

   - A large traditional-Chinese documentation update

   - A new document on backporting and conflict resolution

   - Some kernel-doc and Sphinx fixes

  Plus the usual smattering of smaller updates and typo fixes"

* tag 'docs-6.7' of git://git.lwn.net/linux: (40 commits)
  scripts/kernel-doc: Fix the regex for matching -Werror flag
  docs: backporting: address feedback
  Documentation: driver-api: pps: Update PPS generator documentation
  speakup: Document USB support
  doc: blk-ioprio: Bring the doc in line with the implementation
  docs: usb: fix reference to nonexistent file in UVC Gadget
  docs: doc-guide: mention 'make refcheckdocs'
  Documentation: fix typo in dynamic-debug howto
  scripts/kernel-doc: match -Werror flag strictly
  Documentation/sphinx: Remove the repeated word "the" in comments.
  docs: sparse: add SPDX-License-Identifier
  docs/zh_CN: Add subsystem-apis Chinese translation
  docs/zh_TW: update contents for zh_TW
  docs: submitting-patches: encourage direct notifications to commenters
  docs: add backporting and conflict resolution document
  docs: move riscv under arch
  docs: update link to powerpc/vmemmap_dedup.rst
  mm/memory-hotplug: fix typo in documentation
  docs: move powerpc under arch
  PCI: Update the devres documentation regarding to pcim_*()
  ...
 2023-11-01 17:11:41 -10:00
Linus Torvalds
385903a7ec SoC driver updates for 6.7 
The highlights for the driver support this time are
 
  - Qualcomm platforms gain support for the Qualcomm Secure Execution
    Environment firmware interface to access EFI variables on certain
    devices, and new features for multiple platform and firmware drivers.
 
  - Arm FF-A firmware support gains support for v1.1 specification features,
    in particular notification and memory transaction descriptor changes.
 
  - SCMI firmware support now support v3.2 features for clock and DVFS
    configuration and a new transport for Qualcomm platforms.
 
  - Minor cleanups and bugfixes are added to pretty much all the active
    platforms: qualcomm, broadcom, dove, ti-k3, rockchip, sifive, amlogic,
    atmel, tegra, aspeed, vexpress, mediatek, samsung and more.
    In particular, this contains portions of the treewide conversion to
    use __counted_by annotations and the device_get_match_data helper.
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Merge tag 'soc-drivers-6.7' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull SoC driver updates from Arnd Bergmann:
 "The highlights for the driver support this time are

   - Qualcomm platforms gain support for the Qualcomm Secure Execution
     Environment firmware interface to access EFI variables on certain
     devices, and new features for multiple platform and firmware
     drivers.

   - Arm FF-A firmware support gains support for v1.1 specification
     features, in particular notification and memory transaction
     descriptor changes.

   - SCMI firmware support now support v3.2 features for clock and DVFS
     configuration and a new transport for Qualcomm platforms.

   - Minor cleanups and bugfixes are added to pretty much all the active
     platforms: qualcomm, broadcom, dove, ti-k3, rockchip, sifive,
     amlogic, atmel, tegra, aspeed, vexpress, mediatek, samsung and
     more.

     In particular, this contains portions of the treewide conversion to
     use __counted_by annotations and the device_get_match_data helper"

* tag 'soc-drivers-6.7' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (156 commits)
  soc: qcom: pmic_glink_altmode: Print return value on error
  firmware: qcom: scm: remove unneeded 'extern' specifiers
  firmware: qcom: scm: add a missing forward declaration for struct device
  firmware: qcom: move Qualcomm code into its own directory
  soc: samsung: exynos-chipid: Convert to platform remove callback returning void
  soc: qcom: apr: Add __counted_by for struct apr_rx_buf and use struct_size()
  soc: qcom: pmic_glink: fix connector type to be DisplayPort
  soc: ti: k3-socinfo: Avoid overriding return value
  soc: ti: k3-socinfo: Fix typo in bitfield documentation
  soc: ti: knav_qmss_queue: Use device_get_match_data()
  firmware: ti_sci: Use device_get_match_data()
  firmware: qcom: qseecom: add missing include guards
  soc/pxa: ssp: Convert to platform remove callback returning void
  soc/mediatek: mtk-mmsys: Convert to platform remove callback returning void
  soc/mediatek: mtk-devapc: Convert to platform remove callback returning void
  soc/loongson: loongson2_guts: Convert to platform remove callback returning void
  soc/litex: litex_soc_ctrl: Convert to platform remove callback returning void
  soc/ixp4xx: ixp4xx-qmgr: Convert to platform remove callback returning void
  soc/ixp4xx: ixp4xx-npe: Convert to platform remove callback returning void
  soc/hisilicon: kunpeng_hccs: Convert to platform remove callback returning void
  ...
 2023-11-01 14:46:51 -10:00
Sascha Hauer
481d97ba61 PM / devfreq: rockchip-dfi: add support for RK3588 
Add support for the RK3588 to the driver. The RK3588 has four DDR
channels with a register stride of 0x4000 between the channel
registers, also it has a DDRMON_CTRL register per channel.

Link: https://lore.kernel.org/all/20231018061714.3553817-20-s.hauer@pengutronix.de/
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Acked-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
 2023-10-19 21:21:16 +09:00
Sascha Hauer
4d586b5724 PM / devfreq: rockchip-dfi: Add perf support 
The DFI is a unit which is suitable for measuring DDR utilization, but
so far it could only be used as an event driver for the DDR frequency
scaling driver. This adds perf support to the DFI driver.

Usage with the 'perf' tool can look like:

perf stat -a -e rockchip_ddr/cycles/,\
		rockchip_ddr/read-bytes/,\
		rockchip_ddr/write-bytes/,\
		rockchip_ddr/bytes/ sleep 1

 Performance counter stats for 'system wide':

        1582524826      rockchip_ddr/cycles/
           1802.25 MB   rockchip_ddr/read-bytes/
           1793.72 MB   rockchip_ddr/write-bytes/
           3595.90 MB   rockchip_ddr/bytes/

       1.014369709 seconds time elapsed

perf support has been tested on a RK3568 and a RK3399, the latter with
dual channel DDR.

Link: https://lore.kernel.org/all/20231019064819.3496740-1-s.hauer@pengutronix.de/
Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Acked-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
[cw00.choi: Fix typo from 'write_acccess' to 'write_access']
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
 2023-10-19 21:13:28 +09:00
Sascha Hauer
d8c6e337e7 PM / devfreq: rockchip-dfi: Handle LPDDR4X 
In the DFI driver LPDDR4X can be handled in the same way as LPDDR4. Add
the missing case.

Link: https://lore.kernel.org/all/20231018061714.3553817-13-s.hauer@pengutronix.de/
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Acked-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
 2023-10-19 20:48:28 +09:00
Sascha Hauer
076b0597f5 PM / devfreq: rockchip-dfi: Add RK3568 support 
This adds RK3568 support to the DFI driver.  Only iniitialization
differs from the currently supported RK3399.

Link: https://lore.kernel.org/all/20231018061714.3553817-11-s.hauer@pengutronix.de/
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
 2023-10-19 20:45:39 +09:00
Sascha Hauer
74002e668d PM / devfreq: rk3399_dmc,dfi: generalize DDRTYPE defines 
The DDRTYPE defines are named to be RK3399 specific, but they can be
used for other Rockchip SoCs as well, so replace the RK3399_PMUGRF_
prefix with ROCKCHIP_. They are defined in a SoC specific header
file, so when generalizing the prefix also move the new defines to
a SoC agnostic header file. While at it use GENMASK to define the
DDRTYPE bitfield and give it a name including the full register name.

Link: https://lore.kernel.org/all/20231018061714.3553817-9-s.hauer@pengutronix.de/
Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Acked-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
 2023-10-19 20:39:08 +09:00
Sumit Gupta
ea608a01d4 firmware: tegra: Add suspend hook and reset BPMP IPC early on resume 
Add suspend hook and a 'suspended' field in the 'struct tegra_bpmp'
to mark if BPMP is suspended. Also, add a 'flags' field in the
'struct tegra_bpmp_message' whose 'TEGRA_BPMP_MESSAGE_RESET' bit can be
set from the Tegra MC driver to signal that the reset of BPMP IPC
channels is required before sending MRQ to the BPMP FW. Together both
the fields allow us to handle any requests that might be sent too soon
as they can cause hang during system resume.

One case where we see BPMP requests being sent before the BPMP driver
has resumed is the memory bandwidth requests which are triggered by
onlining the CPUs during system resume. The CPUs are onlined before the
BPMP has resumed and we need to reset the BPMP IPC channels to handle
these requests.

The additional check for 'flags' is done to avoid any un-intended BPMP
IPC reset if the tegra_bpmp_transfer*() API gets called during suspend
sequence after the BPMP driver is suspended.

Fixes: f41e1442ac ("cpufreq: tegra194: add OPP support and set bandwidth")
Co-developed-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
 2023-10-13 14:20:27 +02:00
Deming Wang
bde3ce7257 firmware: tegra: Fix a typo 
successfully, not 'succesfully'

Signed-off-by: Deming Wang <wangdeming@inspur.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
 2023-10-11 23:02:19 +02:00
Costa Shulyupin
17e02586ed docs: move powerpc under arch 
and fix all in-tree references.

Architecture-specific documentation is being moved into Documentation/arch/
as a way of cleaning up the top-level documentation directory and making
the docs hierarchy more closely match the source hierarchy.

Signed-off-by: Costa Shulyupin <costa.shul@redhat.com>
Acked-by: Michael Ellerman <mpe@ellerman.id.au>
Signed-off-by: Jonathan Corbet <corbet@lwn.net>
Link: https://lore.kernel.org/r/20230826165737.2101199-1-costa.shul@redhat.com
 2023-10-10 13:35:55 -06:00
Jason Gunthorpe
c462944901 iommu/tegra-gart: Remove tegra-gart 
Thierry says this is not used anymore, and doesn't think it makes sense as
an iommu driver. The HW it supports is about 10 years old now and newer HW
uses different IOMMU drivers.

As this is the only driver with a GART approach, and it doesn't really
meet the driver expectations from the IOMMU core, let's just remove it
so we don't have to think about how to make it fit in.

It has a number of identified problems:
 - The assignment of iommu_groups doesn't match the HW behavior

 - It claims to have an UNMANAGED domain but it is really an IDENTITY
   domain with a translation aperture. This is inconsistent with the core
   expectation for security sensitive operations

 - It doesn't implement a SW page table under struct iommu_domain so
   * It can't accept a map until the domain is attached
   * It forgets about all maps after the domain is detached
   * It doesn't clear the HW of maps once the domain is detached
     (made worse by having the wrong groups)

Cc: Thierry Reding <treding@nvidia.com>
Cc: Dmitry Osipenko <digetx@gmail.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Lu Baolu <baolu.lu@linux.intel.com>
Reviewed-by: Jerry Snitselaar <jsnitsel@redhat.com>
Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
Link: https://lore.kernel.org/r/6-v8-81230027b2fa+9d-iommu_all_defdom_jgg@nvidia.com
Signed-off-by: Joerg Roedel <jroedel@suse.de>
 2023-09-25 11:40:54 +02:00
Linus Torvalds
0468be89b3 IOMMU Updates for Linux v6.6 
Including:
 
 	- Core changes:
 	  - Consolidate probe_device path
 	  - Make the PCI-SAC IOVA allocation trick PCI-only
 
 	- AMD IOMMU:
 	  - Consolidate PPR log handling
 	  - Interrupt handling improvements
 	  - Refcount fixes for amd_iommu_v2 driver
 
 	- Intel VT-d driver:
 	  - Enable idxd device DMA with pasid through iommu dma ops.
 	  - Lift RESV_DIRECT check from VT-d driver to core.
 	  - Miscellaneous cleanups and fixes.
 
 	- ARM-SMMU drivers:
 	  - Device-tree binding updates:
 	    - Add additional compatible strings for Qualcomm SoCs
 	    - Allow ASIDs to be configured in the DT to work around Qualcomm's
 	      broken hypervisor
 	    - Fix clocks for Qualcomm's MSM8998 SoC
 	  - SMMUv2:
 	    - Support for Qualcomm's legacy firmware implementation featured on
 	      at least MSM8956 and MSM8976.
 	    - Match compatible strings for Qualcomm SM6350 and SM6375 SoC variants
 	  - SMMUv3:
 	    - Use 'ida' instead of a bitmap for VMID allocation
 
 	  - Rockchip IOMMU:
 	    - Lift page-table allocation restrictions on newer hardware
 
 	  - Mediatek IOMMU:
 	    - Add MT8188 IOMMU Support
 
 	  - Renesas IOMMU:
 	    - Allow PCIe devices
 
 	- Usual set of cleanups an smaller fixes
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Merge tag 'iommu-updates-v6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu

Pull iommu updates from Joerg Roedel:
 "Core changes:

   - Consolidate probe_device path

   - Make the PCI-SAC IOVA allocation trick PCI-only

  AMD IOMMU:

   - Consolidate PPR log handling

   - Interrupt handling improvements

   - Refcount fixes for amd_iommu_v2 driver

  Intel VT-d driver:

   - Enable idxd device DMA with pasid through iommu dma ops

   - Lift RESV_DIRECT check from VT-d driver to core

   - Miscellaneous cleanups and fixes

  ARM-SMMU drivers:

   - Device-tree binding updates:
      - Add additional compatible strings for Qualcomm SoCs
      - Allow ASIDs to be configured in the DT to work around Qualcomm's
        broken hypervisor
      - Fix clocks for Qualcomm's MSM8998 SoC

   - SMMUv2:
      - Support for Qualcomm's legacy firmware implementation featured
        on at least MSM8956 and MSM8976
      - Match compatible strings for Qualcomm SM6350 and SM6375 SoC
        variants

   - SMMUv3:
      - Use 'ida' instead of a bitmap for VMID allocation

   - Rockchip IOMMU:
      - Lift page-table allocation restrictions on newer hardware

   - Mediatek IOMMU:
      - Add MT8188 IOMMU Support

   - Renesas IOMMU:
      - Allow PCIe devices

  .. and the usual set of cleanups an smaller fixes"

* tag 'iommu-updates-v6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu: (64 commits)
  iommu: Explicitly include correct DT includes
  iommu/amd: Remove unused declarations
  iommu/arm-smmu-qcom: Add SM6375 SMMUv2
  iommu/arm-smmu-qcom: Add SM6350 DPU compatible
  iommu/arm-smmu-qcom: Add SM6375 DPU compatible
  iommu/arm-smmu-qcom: Sort the compatible list alphabetically
  dt-bindings: arm-smmu: Fix MSM8998 clocks description
  iommu/vt-d: Remove unused extern declaration dmar_parse_dev_scope()
  iommu/vt-d: Fix to convert mm pfn to dma pfn
  iommu/vt-d: Fix to flush cache of PASID directory table
  iommu/vt-d: Remove rmrr check in domain attaching device path
  iommu: Prevent RESV_DIRECT devices from blocking domains
  dmaengine/idxd: Re-enable kernel workqueue under DMA API
  iommu/vt-d: Add set_dev_pasid callback for dma domain
  iommu/vt-d: Prepare for set_dev_pasid callback
  iommu/vt-d: Make prq draining code generic
  iommu/vt-d: Remove pasid_mutex
  iommu/vt-d: Add domain_flush_pasid_iotlb()
  iommu: Move global PASID allocation from SVA to core
  iommu: Generalize PASID 0 for normal DMA w/o PASID
  ...
 2023-09-01 16:54:25 -07:00
Linus Torvalds
f8fd5c2483 This pull request is full of clk driver changes. In fact, there aren't any 
changes to the clk framework this time around. That's probably because everyone
 was on vacation (yours truly included). We did lose a couple clk drivers this
 time around because nobody was using those devices. That skews the diffstat a
 bit, but either way, nothing looks out of the ordinary here. The usual suspects
 are chugging along adding support for more SoCs and fixing bugs.
 
 If I had to choose, I'd say the theme for the past few months has been
 "polish". There's quite a few patches that migrate to
 devm_platform_ioremap_resource() in here. And there's more than a handful of
 patches that move the NR_CLKS define from the DT binding header to the driver.
 There's even patches that migrate drivers to use clk_parent_data and clk_hw to
 describe clk tree topology. It seems that the spring (summer?) cleaning bug got
 some folks, or the semiconductor shortage finally hit the software side.
 
 New Drivers:
  - StarFive JH7110 SoC clock drivers
  - Qualcomm IPQ5018 Global Clock Controller driver
  - Versa3 clk generator to support 48KHz playback/record with audio codec on
    RZ/G2L SMARC EVK
 
 Removed Drivers:
  - Remove non-OF mmp clk drivers
  - Remove OXNAS clk driver
 
 Updates:
  - Add __counted_by to struct clk_hw_onecell_data and struct spmi_pmic_div_clk_cc
  - Move defines for numbers of clks (NR_CLKS) from DT headers to drivers
  - Introduce kstrdup_and_replace() and use it
  - Add PLL rates for Rockchip rk3568
  - Add the display clock tree for Rockchip rv1126
  - Add Audio Clock Generator (ADG) clocks on Renesas R-Car Gen3 and RZ/G2 SoCs
  - Convert sun9i-mmc clock to use devm_platform_get_and_ioremap_resource()
  - Fix function name in a comment in ccu_mmc_timing.c
  - Parameter name correction for ccu_nkm_round_rate()
  - Implement CLK_SET_RATE_PARENT for Allwinner NKM clocks, i.e. consider alternative
    parent rates when determining clock rates
  - Set CLK_SET_RATE_PARENT for Allwinner A64 pll-mipi
  - Support finding closest (as opposed to closest but not higher) clock rate
    for NM, NKM, mux and div type clocks, as use it for Allwinner A64 pll-video0
  - Prefer current parent rate if able to generate ideal clock rate for Allwinner NKM clocks
  - Clean up Qualcomm SMD RPM driver, with interconnect bus clocks moved out to
    the interconnect drivers
  - Fix various PM runtime bugs across many Qualcomm clk drivers
  - Migrate Qualcomm MDM9615 is to parent_hw and parent_data
  - Add network related resets on Qualcomm IPQ4019
  - Add a couple missing USB related clocks to Qualcomm IPQ9574
  - Add missing gpll0_sleep_clk_src to Qualcomm MSM8917 global clock controller
  - In the Qualcomm QDU1000 global clock controller, GDSCs, clkrefs, and GPLL1 are
    added, while PCIe pipe clock, SDCC rcg ops are corrected
  - Add missing GDSCs to and correct GDSCs for the SC8280XP global clock controller driver
  - Support retention for the Qualcomm SC8280XP display clock controller GDSCs.
  - Qualcommm's SDCC apps_clk_src is marked with CLK_OPS_PARENT_ENABLE to fix
    issues with missing parent clocks across sc7180, sm7150, sm6350 and sm8250,
    while sm8450 is corrected to use floor ops
  - Correct Qualcomm SM6350 GPU clock controller's clock supplies
  - Drop unwanted clocks from the Qualcomm IPQ5332 GCC driver
  - Add missing OXILICX GDSC to Qualcomm MSM8226 GCC
  - Change the delay in the Qualcomm reset controller to fsleep() for correctness
  - Extend the Qualcomm SM83550 Video clock controller to support SC8280XP
  - Add graphics clock support on Renesas RZ/G2M, RZ/G2N, RZ/G2E, and R-Car H3,
    M3-W, and M3-N SoCs
  - Add Clocked Serial Interface (CSI) clocks on Renesas RZ/V2M
  - Add PWM (MTU3) clock and reset on Renesas RZ/G2UL and RZ/Five
  - Add the PDM IPC clock for i.MX93
  - Add 519.75MHz frequency support for i.MX9 PLL
  - Simplify the .determine_rate() implementation for i.MX GPR mux
  - Make the i.MX8QXP LPCG clock use devm_platform_ioremap_resource()
  - Add the audio mux clock to i.MX8
  - Fix the SPLL2 MULT range for PLLv4
  - Update the SPLL2 type in i.MX8ULP
  - Fix the SAI4 clock on i.MX8MP
  - Add silicon revision print for i.MX25 on clocks init
  - Drop the return value from __mx25_clocks_init()
  - Fix the clock pauses on no-op set_rate for i.MX8M composite clock
  - Drop restrictions for i.MX PLL14xx and fix its max prediv value
  - Drop the 393216000 and 361267200 from i.MX PLL14xx rate table to allow
    glitch free switching
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Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk subsystem updates from Stephen Boyd:
 "This pull request is full of clk driver changes. In fact, there aren't
  any changes to the clk framework this time around. That's probably
  because everyone was on vacation (yours truly included). We did lose a
  couple clk drivers this time around because nobody was using those
  devices. That skews the diffstat a bit, but either way, nothing looks
  out of the ordinary here. The usual suspects are chugging along adding
  support for more SoCs and fixing bugs.

  If I had to choose, I'd say the theme for the past few months has been
  "polish". There's quite a few patches that migrate to
  devm_platform_ioremap_resource() in here. And there's more than a
  handful of patches that move the NR_CLKS define from the DT binding
  header to the driver. There's even patches that migrate drivers to use
  clk_parent_data and clk_hw to describe clk tree topology. It seems
  that the spring (summer?) cleaning bug got some folks, or the
  semiconductor shortage finally hit the software side.

  New Drivers:
   - StarFive JH7110 SoC clock drivers
   - Qualcomm IPQ5018 Global Clock Controller driver
   - Versa3 clk generator to support 48KHz playback/record with audio
     codec on RZ/G2L SMARC EVK

  Removed Drivers:
   - Remove non-OF mmp clk drivers
   - Remove OXNAS clk driver

  Updates:
   - Add __counted_by to struct clk_hw_onecell_data and struct
     spmi_pmic_div_clk_cc
   - Move defines for numbers of clks (NR_CLKS) from DT headers to
     drivers
   - Introduce kstrdup_and_replace() and use it
   - Add PLL rates for Rockchip rk3568
   - Add the display clock tree for Rockchip rv1126
   - Add Audio Clock Generator (ADG) clocks on Renesas R-Car Gen3 and
     RZ/G2 SoCs
   - Convert sun9i-mmc clock to use
     devm_platform_get_and_ioremap_resource()
   - Fix function name in a comment in ccu_mmc_timing.c
   - Parameter name correction for ccu_nkm_round_rate()
   - Implement CLK_SET_RATE_PARENT for Allwinner NKM clocks, i.e.
     consider alternative parent rates when determining clock rates
   - Set CLK_SET_RATE_PARENT for Allwinner A64 pll-mipi
   - Support finding closest (as opposed to closest but not higher)
     clock rate for NM, NKM, mux and div type clocks, as use it for
     Allwinner A64 pll-video0
   - Prefer current parent rate if able to generate ideal clock rate for
     Allwinner NKM clocks
   - Clean up Qualcomm SMD RPM driver, with interconnect bus clocks
     moved out to the interconnect drivers
   - Fix various PM runtime bugs across many Qualcomm clk drivers
   - Migrate Qualcomm MDM9615 is to parent_hw and parent_data
   - Add network related resets on Qualcomm IPQ4019
   - Add a couple missing USB related clocks to Qualcomm IPQ9574
   - Add missing gpll0_sleep_clk_src to Qualcomm MSM8917 global clock
     controller
   - In the Qualcomm QDU1000 global clock controller, GDSCs, clkrefs,
     and GPLL1 are added, while PCIe pipe clock, SDCC rcg ops are
     corrected
   - Add missing GDSCs to and correct GDSCs for the SC8280XP global
     clock controller driver
   - Support retention for the Qualcomm SC8280XP display clock
     controller GDSCs.
   - Qualcommm's SDCC apps_clk_src is marked with CLK_OPS_PARENT_ENABLE
     to fix issues with missing parent clocks across sc7180, sm7150,
     sm6350 and sm8250, while sm8450 is corrected to use floor ops
   - Correct Qualcomm SM6350 GPU clock controller's clock supplies
   - Drop unwanted clocks from the Qualcomm IPQ5332 GCC driver
   - Add missing OXILICX GDSC to Qualcomm MSM8226 GCC
   - Change the delay in the Qualcomm reset controller to fsleep() for
     correctness
   - Extend the Qualcomm SM83550 Video clock controller to support
     SC8280XP
   - Add graphics clock support on Renesas RZ/G2M, RZ/G2N, RZ/G2E, and
     R-Car H3, M3-W, and M3-N SoCs
   - Add Clocked Serial Interface (CSI) clocks on Renesas RZ/V2M
   - Add PWM (MTU3) clock and reset on Renesas RZ/G2UL and RZ/Five
   - Add the PDM IPC clock for i.MX93
   - Add 519.75MHz frequency support for i.MX9 PLL
   - Simplify the .determine_rate() implementation for i.MX GPR mux
   - Make the i.MX8QXP LPCG clock use devm_platform_ioremap_resource()
   - Add the audio mux clock to i.MX8
   - Fix the SPLL2 MULT range for PLLv4
   - Update the SPLL2 type in i.MX8ULP
   - Fix the SAI4 clock on i.MX8MP
   - Add silicon revision print for i.MX25 on clocks init
   - Drop the return value from __mx25_clocks_init()
   - Fix the clock pauses on no-op set_rate for i.MX8M composite clock
   - Drop restrictions for i.MX PLL14xx and fix its max prediv value
   - Drop the 393216000 and 361267200 from i.MX PLL14xx rate table to
     allow glitch free switching"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (207 commits)
  clk: qcom: Fix SM_GPUCC_8450 dependencies
  clk: lmk04832: Support using PLL1_LD as SPI readback pin
  clk: lmk04832: Don't disable vco clock on probe fail
  clk: lmk04832: Set missing parent_names for output clocks
  clk: mvebu: Convert to devm_platform_ioremap_resource()
  clk: nuvoton: Convert to devm_platform_ioremap_resource()
  clk: socfpga: agilex: Convert to devm_platform_ioremap_resource()
  clk: ti: Use devm_platform_get_and_ioremap_resource()
  clk: mediatek: Convert to devm_platform_ioremap_resource()
  clk: hsdk-pll: Convert to devm_platform_ioremap_resource()
  clk: gemini: Convert to devm_platform_ioremap_resource()
  clk: fsl-sai: Convert to devm_platform_ioremap_resource()
  clk: bm1880: Convert to devm_platform_ioremap_resource()
  clk: axm5516: Convert to devm_platform_ioremap_resource()
  clk: actions: Convert to devm_platform_ioremap_resource()
  clk: cdce925: Remove redundant of_match_ptr()
  clk: pxa910: Move number of clocks to driver source
  clk: pxa1928: Move number of clocks to driver source
  clk: pxa168: Move number of clocks to driver source
  clk: mmp2: Move number of clocks to driver source
  ...
 2023-08-30 19:53:39 -07:00
Linus Torvalds
a1c19328a1 ARM: SoC cleanups for 6.6 
These are all minor cleanups for platform specific code in arch/arm/
 and some of the associated drivers. The majority of these are work
 done by Rob Herring to improve the way devicetreee header files
 are handled.
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Merge tag 'soc-arm-6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC cleanups from Arnd Bergmann:
 "These are all minor cleanups for platform specific code in arch/arm/
  and some of the associated drivers. The majority of these are work
  done by Rob Herring to improve the way devicetreee header files are
  handled"

* tag 'soc-arm-6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (49 commits)
  ARM: davinci: Drop unused includes
  ARM: s5pv210: Explicitly include correct DT includes
  ARM: dove: Drop unused includes
  ARM: mvebu: Explicitly include correct DT includes
  Documentation/process: maintainer-soc: document dtbs_check requirement for Samsung
  MAINTAINER: samsung: document dtbs_check requirement for Samsung
  Documentation/process: maintainer-soc: add clean platforms profile
  MAINTAINERS: soc: reference maintainer profile
  ARM: nspire: Remove unused header file mmio.h
  ARM: nspire: Use syscon-reboot to handle restart
  soc: fsl: Explicitly include correct DT includes
  soc: xilinx: Explicitly include correct DT includes
  soc: sunxi: Explicitly include correct DT includes
  soc: rockchip: Explicitly include correct DT includes
  soc: mediatek: Explicitly include correct DT includes
  soc: aspeed: Explicitly include correct DT includes
  firmware: Explicitly include correct DT includes
  bus: Explicitly include correct DT includes
  ARM: spear: Explicitly include correct DT includes
  ARM: mvebu: Explicitly include correct DT includes
  ...
 2023-08-30 16:49:40 -07:00
Yue Haibing
49e62a0462 net: mscc: ocelot: Remove unused declarations 
Commit 6c30384eb1 ("net: mscc: ocelot: register devlink ports")
declared but never implemented ocelot_devlink_init() and
ocelot_devlink_teardown().
Commit 2096805497 ("net: mscc: ocelot: automatically detect VCAP constants")
declared but never implemented ocelot_detect_vcap_constants().
Commit 403ffc2c34 ("net: mscc: ocelot: add support for preemptible traffic classes")
declared but never implemented ocelot_port_update_preemptible_tcs().

Signed-off-by: Yue Haibing <yuehaibing@huawei.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Link: https://lore.kernel.org/r/20230821130218.19096-1-yuehaibing@huawei.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
 2023-08-22 10:29:15 -07:00
Joerg Roedel
d8fe59f110 Merge branches 'apple/dart', 'arm/mediatek', 'arm/renesas', 'arm/rockchip', 'arm/smmu', 'unisoc', 'x86/vt-d', 'x86/amd' and 'core' into next 2023-08-21 14:18:43 +02:00
Martin Kaiser
b8a06b125c clk: imx25: print silicon revision during init 
Print the imx25 silicon revision when the clocks are initialised.

Use the same mechanism as for imx27, i.e. call mx25_revision.
This function is unused at the moment.

Signed-off-by: Martin Kaiser <martin@kaiser.cx>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Link: https://lore.kernel.org/r/20230802184046.153394-2-martin@kaiser.cx
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
 2023-08-14 12:41:05 +03:00
Arnd Bergmann
61029e2b37 AT91 SoC updates for 6.6: 
It contains:
 - explicitly include correct DT includes from Rob
 - one cleanup which removes unused extern declaration on atmel_tcb.h
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Merge tag 'at91-soc-6.6' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into soc/arm

AT91 SoC updates for 6.6:

It contains:
- explicitly include correct DT includes from Rob
- one cleanup which removes unused extern declaration on atmel_tcb.h

* tag 'at91-soc-6.6' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
  ARM: at91: Remove unused extern declarations
  ARM: at91: Explicitly include correct DT includes
  soc: microchip: Explicitly include correct DT includes

Link: https://lore.kernel.org/r/20230804044118.231478-1-claudiu.beznea@tuxon.dev
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 2023-08-12 10:32:51 +02:00
Chengci.Xu
946e719ce6 iommu/mediatek: Add enable IOMMU SMC command for INFRA masters 
Prepare for MT8188. In MT8188, the register which enables IOMMU for
INFRA masters are in the secure world for security concerns, therefore we
add a SMC command for INFRA masters to enable IOMMU in ATF.

Signed-off-by: Chengci.Xu <chengci.xu@mediatek.com>
Signed-off-by: Yong Wu <yong.wu@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Alexandre Mergnat <amergnat@baylibre.com>
Link: https://lore.kernel.org/r/20230602090227.7264-5-yong.wu@mediatek.com
Signed-off-by: Joerg Roedel <jroedel@suse.de>
 2023-08-07 14:15:48 +02:00
YueHaibing
96a49448c4 ARM: at91: Remove unused extern declarations 
commit 157576d552 ("misc: remove atmel_tclib")
left behind this.

Signed-off-by: YueHaibing <yuehaibing@huawei.com>
Link: https://lore.kernel.org/r/20230725141105.26904-1-yuehaibing@huawei.com
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
 2023-07-29 16:56:09 +03:00