Commit Graph

400713 Commits

Author SHA1 Message Date
Fathi Boudra
0ffae27f0f ARM: vexpress: Make defconfig work again
This patch updates the Versatile Express defconfig to a level
which makes it possible to run a defconfig-ed kernel work
on the board and in QEMU with modern userspace. It does:

- update cmdline to contain "console=ttyAMA0" only
- enable devtmpfs filesystem
- enable voltage regulator support
- enable ext4 filesystem
- disable low level debug and early printk

Signed-off-by: Fathi Boudra <fathi.boudra@linaro.org>
[PM: removed DEBUG_LL - it doesn't work on qemu]
[PM: reworded the commit message]
Signed-off-by: Pawel Moll <pawel.moll@arm.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2013-10-28 13:25:54 -07:00
Olof Johansson
b6fb5474af The imx/mxs soc changes for 3.13:
* Low-level debug support for Vybrid
 * Support soc bus/device for imx6
 * Suspend support for imx6dl and imx6sl
 * The imx6q clock updates for PCIe and audio PLL support
 * IOMUXC GPR update for fec support
 * Some random cleanup
 * A few defconfig updates
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Merge tag 'imx-soc-3.13' of git://git.linaro.org/people/shawnguo/linux-2.6 into next/soc

From Shawn Guo:
The imx/mxs soc changes for 3.13:

* Low-level debug support for Vybrid
* Support soc bus/device for imx6
* Suspend support for imx6dl and imx6sl
* The imx6q clock updates for PCIe and audio PLL support
* IOMUXC GPR update for fec support
* Some random cleanup
* A few defconfig updates

* tag 'imx-soc-3.13' of git://git.linaro.org/people/shawnguo/linux-2.6: (31 commits)
  ARM: imx: enable suspend for imx6sl
  ARM: imx: ensure dsm_request signal is not asserted when setting LPM
  ARM: imx6q: call WB and RBC configuration from imx6q_pm_enter()
  ARM: imx6q: move low-power code out of clock driver
  ARM: imx: drop extern with function prototypes in common.h
  ARM: imx: reset core along with enable/disable operation
  ARM: imx: do not return from imx_cpu_die() call
  ARM: imx_v6_v7_defconfig: Select CONFIG_PROVE_LOCKING
  ARM: imx_v6_v7_defconfig: Enable LEDS_GPIO related options
  ARM: mxs_defconfig: Turn off CONFIG_DEBUG_GPIO
  ARM: imx: replace imx6q_restart() with mxc_restart()
  ARM: mach-imx: mm-imx5: Retrieve iomuxc base address from dt
  ARM: mach-imx: mm-imx5: Retrieve tzic base address from dt
  ARM: mach-imx: clk-imx51-imx53: Retrieve base address and irq from dt
  ARM: mxs_defconfig: Add CHIPIDEA_UDC support
  ARM: imx: Include linux/err.h
  ARM: imx_v6_v7_defconfig: Add CHIPIDEA_UDC support
  ARM: imx_v6_v7_defconfig: Add SPDIF support
  ARM: imx6q: clock and Kconfig update for PCIe support
  ARM: imx: Add LVDS general-purpose clocks to i.MX6Q
  ...

Signed-off-by: Olof Johansson <olof@lixom.net>
2013-10-28 10:37:52 -07:00
Olof Johansson
826f57b497 Merge tag 'sunxi-defconfig-for-3.13' of https://github.com/mripard/linux into next/soc
From Maxime Ripard:
Allwinner sunXi defconfig changes for 3.13

This pull request only see the introduction of a sunxi_defconfig.

* tag 'sunxi-defconfig-for-3.13' of https://github.com/mripard/linux:
  ARM: sunxi: Add a defconfig for the Allwinner SoCs

Signed-off-by: Olof Johansson <olof@lixom.net>
2013-10-28 10:19:46 -07:00
Olof Johansson
0d74578b7d ARM: sunxi: remove .init_time hooks
The machine entries were split up, but the cleanup to remove .init_time
removed the function that the new/split entries refer to. Remove them
since they are no longer needed.

Cc: Maxime Ripard <mripard@free-electrons.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2013-10-28 10:19:45 -07:00
Olof Johansson
e086df92e2 Allwinner sunXi SoCs machine additions for 3.13
Nothing outstanding here, mostly some documentation cleanup, and the split of
 the previous generic machine declaration into three different machines to
 handle the sun4i/sun5i, sun6i and sun7i separately.
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Merge tag 'sunxi-core-for-3.13' of https://github.com/mripard/linux into next/soc

From Maxime Ripard:
Allwinner sunXi SoCs machine additions for 3.13

Nothing outstanding here, mostly some documentation cleanup, and the split of
the previous generic machine declaration into three different machines to
handle the sun4i/sun5i, sun6i and sun7i separately.

* tag 'sunxi-core-for-3.13' of https://github.com/mripard/linux:
  Documentation: dt: Remove clock gates IDs list for Allwinner SoCs
  Documentation: dt: Remove interrupt sources list for Allwinner SoCs
  Documentation: sunxi: Update Allwinner SoC documentation
  Documentation: sunxi: Update A13 user manual dead link
  ARM: sunxi: Order Kconfig options alphabetically
  ARM: sunxi: Simplify restart setup code
  ARM: sunxi: Split out the DT machines for sun6i and sun7i

Signed-off-by: Olof Johansson <olof@lixom.net>
2013-10-28 10:19:38 -07:00
Olof Johansson
0fc869e8f2 Merge branch 'cleanup/dt-clock' into next/soc
Merging in dt clock cleanup as a pre-req with some of the later SoC branches.

There are a handful of conflicts here -- some of the already merged SoC
branches should have been based on the cleanup but weren't.

In particular, a remove/add of include on highbank and two remove/remove
conflicts on kirkwood were fixed up.

* cleanup/dt-clock: (28 commits)
  ARM: vt8500: remove custom .init_time hook
  ARM: vexpress: remove custom .init_time hook
  ARM: tegra: remove custom .init_time hook
  ARM: sunxi: remove custom .init_time hook
  ARM: sti: remove custom .init_time hook
  ARM: socfpga: remove custom .init_time hook
  ARM: rockchip: remove custom .init_time hook
  ARM: prima2: remove custom .init_time hook
  ARM: nspire: remove custom .init_time hook
  ARM: nomadik: remove custom .init_time hook
  ARM: mxs: remove custom .init_time hook
  ARM: kirkwood: remove custom .init_time hook
  ARM: imx: remove custom .init_time hook
  ARM: highbank: remove custom .init_time hook
  ARM: exynos: remove custom .init_time hook
  ARM: dove: remove custom .init_time hook
  ARM: bcm2835: remove custom .init_time hook
  ARM: bcm: provide common arch init for DT clocks
  ARM: call of_clk_init from default time_init handler
  ARM: vt8500: prepare for arch-wide .init_time callback
  ...

Signed-off-by: Olof Johansson <olof@lixom.net>
2013-10-28 10:11:42 -07:00
Kevin Hilman
4dcf03346a ARM: tegra: core SoC support changes for 3.13
This branch includes:
 * SoC fuse values are used as device randomness at boot.
 * Initial support for the Tegra124 SoC is added. When coupled with an
   appropriate clock driver, which should also be merged for 3.13, we are
   able to boot to user-space using an initrd.
 * The powergate code gains support for Tegra114.
 
 This branch is based on previous pull request tegra-for-3.13-cleanup.
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Merge tag 'tegra-for-3.13-soc-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into next/soc

From Stephen Warren:
ARM: tegra: core SoC support changes for 3.13

This branch includes:
* SoC fuse values are used as device randomness at boot.
* Initial support for the Tegra124 SoC is added. When coupled with an
  appropriate clock driver, which should also be merged for 3.13, we are
  able to boot to user-space using an initrd.
* The powergate code gains support for Tegra114.

This branch is based on previous pull request tegra-for-3.13-cleanup.

* tag 'tegra-for-3.13-soc-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra:
  ARM: tegra: Add Tegra114 powergate support
  ARM: tegra: Constify list of CPU domains
  ARM: tegra: Remove duplicate powergate defines
  ARM: tegra: add LP1 support code for Tegra124
  ARM: tegra: re-calculate the LP1 data for Tegra30/114
  ARM: tegra: enable CPU idle for Tegra124
  ARM: tegra: make tegra_resume can work with current and later chips
  ARM: tegra: CPU hotplug support for Tegra124
  ARM: tegra: add PMC compatible value for Tegra124
  ARM: tegra: add Tegra124 SoC support
  ARM: tegra: add fuses as device randomness
  ARM: tegra: fix ARCH_TEGRA_114_SOC select sort order
  ARM: tegra: make tegra_init_fuse() __init
  ARM: tegra: remove much of iomap.h
  ARM: tegra: move resume vector define to irammap.h
  ARM: tegra: delete gpio-names.h
  ARM: tegra: delete stale header content
  ARM: tegra: remove common.c
  ARM: tegra: split tegra_pmc_init() in two

Signed-off-by: Kevin Hilman <khilman@linaro.org>
2013-10-25 03:46:52 -07:00
Shawn Guo
9ba64fe3eb ARM: imx: enable suspend for imx6sl
The imx6sl low power mode implementation inherits imx6q/dl one,
and pm-imx6q.c can just work for imx6sl with some minor updates.
Let's enable imx6sl suspend support by reusing pm-imx6q.c and use
cpu_is_imxXX() to handle the those minor differences between imx6sl
and imx6q/dl.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-10-21 09:39:27 +08:00
Shawn Guo
d48866fefd ARM: imx: ensure dsm_request signal is not asserted when setting LPM
There is a defect in imx6 LPM design.  When SW tries to enter low power
mode with following sequence, the chip will enter low power mode before
A9 CPU execute WFI instruction:

1. Set CCM_CLPCR[1:0] to 2'b00;
2. ARM CPU enters WFI;
3. ARM CPU wakeup from an interrupt event, which is masked by GPC or not
   visible to GPC, such as interrupt from local timer;
4. Set CCM_CLPCR[1:0] to 2'b01 or 2'b10;
5. ARM CPU execute WFI.

Before the last step, the chip will enter WAIT mode if CCM_CLPCR[1:0] is
set to 2'b01, or enter STOP mode if CCM_CLPCR[1:0] is set to 2'b10.

The patch implements a recommended workaround for this issue.

1. SW triggers irq #32(IOMUX) to be always pending manually by setting
   IOMUX_GPR1_GINT bit;
2. SW should then unmask it in GPC before setting CCM LPM;
3. SW should mask it right after CCM LPM is set (bit0-1 of CCM_CLPCR).

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-10-21 09:39:26 +08:00
Shawn Guo
1d674a73c5 ARM: imx6q: call WB and RBC configuration from imx6q_pm_enter()
The WB and RBC configuration calls are currently made from
imx6q_set_lpm() for WAIT_CLOCKED and WAIT_UNCLOCKED mode with a simple
state tracking.  This becomes unnecessary since we can make the calls
from imx6q_pm_enter() directly now for suspend.

More importantly, the current call of imx6q_enable_wb() from
imx6q_set_lpm() is buggy.  The CLPCR register bits configured by
imx6q_enable_wb() will get lost, because imx6q_set_lpm() caches the same
register and write it back at the end of the function.  That's why the
imx6dl suspend/resume does not work currently - the wakeup from suspend
triggers a reset on imx6dl.

Moves the WB and RBC calls into imx6q_pm_enter() to save the state
tracking and fixes above bug, so that suspend/resume can start working
on imx6dl.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-10-21 09:39:25 +08:00
Shawn Guo
9e8147bb5e ARM: imx6q: move low-power code out of clock driver
The LPM (Low Power Mode) code that currently sits in imx6q clock driver
will be reused by imx6sl.  Let's move it into pm-imx6q.c, so that we
can keep clock driver SoC specific and reuse pm-imx6q.c on imx6sl.

In order to avoid adding another ioremap for CCM block,
imx6q_pm_set_ccm_base() is created to let clock driver set up ccm_base
for pm code.

During the move, the unused CCGR macros get removed.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-10-21 09:39:24 +08:00
Shawn Guo
803648db20 ARM: imx: drop extern with function prototypes in common.h
Since commit 70dc8a4 (checkpatch: warn when using extern with function
prototypes in .h files), we will get checkpatch warning when updating
common.h following the existing convention which has extern for function
prototypes.

Let's change the convention to not use extern with function prototypes
in this header.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-10-21 09:39:14 +08:00
Shawn Guo
6050d181a4 ARM: imx: reset core along with enable/disable operation
From hotplug stress test result, resetting core during enable/disable
operation can improve cpu hotplug stability.  So let's set
SRC reset bit in imx_enable_cpu() for the core when its enable bit is
accessed.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-10-21 09:37:32 +08:00
Shawn Guo
fcd75f921d ARM: imx: do not return from imx_cpu_die() call
When imx_cpu_die() is being called, the cpu should never return from the
call but just in WFI and wait for hardware to take it down.  So let's
do cpu_do_idle() repeatly in the call.  Doing this help improve the
relibility of hotplug operation.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-10-21 09:37:31 +08:00
Fabio Estevam
85920f3960 ARM: imx_v6_v7_defconfig: Select CONFIG_PROVE_LOCKING
This is very useful for detecting 'circular locking dependency' issues.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-10-21 09:37:30 +08:00
Fabio Estevam
94425a1916 ARM: imx_v6_v7_defconfig: Enable LEDS_GPIO related options
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-10-21 09:37:28 +08:00
Fabio Estevam
a0fb706e11 ARM: mxs_defconfig: Turn off CONFIG_DEBUG_GPIO
Having CONFIG_DEBUG_GPIO=y leads to several debug messages polluting kernel log:

[    0.580325] of_get_named_gpio_flags: can't parse gpios property of node '/regulators/3p3v[0]'
[    0.581185] 3P3V: 3300 mV
[    0.584827] of_get_named_gpio_flags exited with status 124
[    0.585852] vddio-sd0: 3300 mV
[    0.590023] of_get_named_gpio_flags exited with status 79
[    0.590770] fec-3v3: 3300 mV
[    0.594805] of_get_named_gpio_flags exited with status 105
[    0.595491] usb0_vbus: 5000 mV
[    0.599687] of_get_named_gpio_flags exited with status 104
[    0.600380] usb1_vbus: 5000 mV
[    0.604463] of_get_named_gpio_flags exited with status 126
[    0.605153] lcd-3v3: 3300 mV
[    0.608970] of_get_named_gpio_flags exited with status 77

Turn this option off, as these messages are not really useful for normal usage.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-10-21 09:37:27 +08:00
Shawn Guo
87a84b6982 ARM: imx: replace imx6q_restart() with mxc_restart()
The imx6q_restart() works fine with normal reboot but will run into
problem with emergency reboot like sysrq-b.  In that case, of_iomap()
gets called from interrupt context and hence triggers the BUG_ON in
__get_vm_area_node().

Actually, since commit c1e31d1 (ARM: imx: create
mxc_arch_reset_init_dt() for DT boot), imx6q/dl should try to use
mxc_restart() by calling mxc_arch_reset_init_dt() beforehand, where
things like of_iomap() can be done.

The patch updates mxc_restart() a little bit to get it work for imx6q/dl
and kill imx6q_restart() completely.

Reported-by: Nathan Lynch <nathan_lynch@mentor.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-10-21 09:36:53 +08:00
Fabio Estevam
6fc6c93eb6 ARM: mach-imx: mm-imx5: Retrieve iomuxc base address from dt
As mx53 is a dt-only SoC, we should retrieve the iomuxc base address from the
device tree, instead of using the old MX53_IO_ADDRESS method.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-10-21 09:35:57 +08:00
Fabio Estevam
823b2fe25a ARM: mach-imx: mm-imx5: Retrieve tzic base address from dt
As mx53 is a dt-only SoC, we should retrieve the tzic base address from the
device tree, instead of using the old MX53_IO_ADDRESS method.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-10-21 09:35:56 +08:00
Fabio Estevam
bfcc7bcef5 ARM: mach-imx: clk-imx51-imx53: Retrieve base address and irq from dt
As mx53 is a dt-only SoC, we should retrieve the gpt base address and irq
from the device tree, instead of using the old MX53_IO_ADDRESS method.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-10-21 09:27:55 +08:00
Fabio Estevam
a4de29044d ARM: mxs_defconfig: Add CHIPIDEA_UDC support
Generated by doing:

make mxs_defconfig
Manually selected the CHIPIDEA_UDC driver
make savedefconfig
cp defconfig arch/arm/configs/mxs_defconfig

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-10-21 09:15:13 +08:00
Thierry Reding
1ddd35be8b ARM: imx: Include linux/err.h
The IS_ERR() macro is defined in the linux/err.h header file, so include
it explicitly.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-10-21 09:15:12 +08:00
Fabio Estevam
15233e1db2 ARM: imx_v6_v7_defconfig: Add CHIPIDEA_UDC support
Generated by doing:

make imx_v6_v7_defconfig
Manually selected the CHIPIDEA_UDC driver
make savedefconfig
cp defconfig arch/arm/configs/imx_v6_v7_defconfig

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-10-21 09:15:10 +08:00
Fabio Estevam
e39c3368aa ARM: imx_v6_v7_defconfig: Add SPDIF support
Generated by doing:

make imx_v6_v7_defconfig
Manually selected the IMX_SPDIF driver
make savedefconfig
cp defconfig arch/arm/configs/imx_v6_v7_defconfig

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-10-21 09:15:09 +08:00
Sean Cross
74b8031307 ARM: imx6q: clock and Kconfig update for PCIe support
Update imx6q clock initialization and Kconfig for PCIe support.

Signed-off-by: Sean Cross <xobs@kosagi.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-10-21 09:15:08 +08:00
Sean Cross
bf22172158 ARM: imx: Add LVDS general-purpose clocks to i.MX6Q
The i.MX6 has two general-purpose LVDS clocks that can be driven
from a variety of sources.  This patch adds a mux and a gate for
both of these clocks.

Signed-off-by: Sean Cross <xobs@kosagi.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-10-21 09:15:07 +08:00
Shawn Guo
7655fe53f4 ARM: imx: remove stale mx53_display_revision() declaration
The mx53_display_revision() declaration in common.h is stale and used
nowhere, so remove it.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-10-21 09:15:06 +08:00
Shawn Guo
a28875462b ARM: imx6: report soc info via soc device
The patch enables soc bus infrastructure and adds a function
imx_soc_device_init() to report soc info via soc device interface for
imx6qdl and imx6sl.  With the support, user space can get soc related
info by looking at sysfs like below.

  $ cat /sys/devices/soc0/machine
  Freescale i.MX6 Quad SABRE Smart Device Board
  $ cat /sys/devices/soc0/family
  Freescale i.MX
  $ cat /sys/devices/soc0/soc_id
  i.MX6Q
  $ cat /sys/devices/soc0/revision
  1.2

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-10-21 09:14:54 +08:00
Shawn Guo
d8ce823fb3 ARM: imx: use imx_init_revision_from_anatop() on imx6sl
Add imx6sl support into imx_init_revision_from_anatop(), so that it can
be used to initialize cpu type and revision on imx6sl.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-10-21 09:13:13 +08:00
Shawn Guo
f1c6f31472 ARM: imx: add a common function to initialize revision from anatop
The patch creates a common function imx_init_revision_from_anatop() by
merging imx6q_init_revision() and imx_anatop_get_digprog(), so that any
SoC that encodes revision info in anatop can use it to initialize
revision.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-10-21 09:13:12 +08:00
Shawn Guo
3f75978b37 ARM: imx6q: use common soc revision helpers
It calls imx_set_soc_revision() to set up soc revision in
imx6q_init_revision(), and replaces all the occurrences of
imx6q_revision() with common helper imx_get_soc_revision().

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-10-21 09:12:51 +08:00
Shawn Guo
bfefdff8f9 ARM: imx: add soc revision helper functions
Similar to what we do for cpu type, the patch adds helper functions
imx_set_soc_revision() and imx_get_soc_revision() to maintain
imx_soc_revision in cpu.c.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-10-21 09:11:08 +08:00
Shawn Guo
c7c3eac627 ARM: imx: add low-level debug for vybrid
Add low-level debug support for vybrid, so that earlyprintk can be
enabled for debugging early boot issue.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-10-21 09:11:07 +08:00
Michael Opdenacker
4c1dd3e5ed ARM: imx: remove IRQF_DISABLED
This flag is a NOOP since 2.6.35 and can be removed.

This is an update for 3.11 of a patch already sent for 3.10

Signed-off-by: Michael Opdenacker <michael.opdenacker@free-electrons.com>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-10-21 09:11:05 +08:00
Fugang Duan
a9aec30dcf ARM: imx6sl: config iomux-gpr1 to select clock for fec
Config iomux-gpr1 to select clock source for fec system clock.
Clear gpr1[14], gpr1[18-17] bit to select the fec clock source
from internal anatop PLL.

Signed-off-by: Fugang Duan <B38611@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-10-21 09:11:04 +08:00
Fugang Duan
7f6ac89c1d ARM: imx6sl: add imx6sl iomux-gpr field define
Add imx6sl iomux-gpr register field define in "imx6q-iomuxc-gpr.h" header
file, which is not fully define all iomux-gpr registers and fields, only
add fec related macro define.

Signed-off-by: Fugang Duan <B38611@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-10-21 09:11:03 +08:00
Nicolin Chen
64990a4314 ARM: imx6q: Add pll4_audio_div to clock tree
There's a pll4_audio_div clock, an extra divider for pll4, missing
in current clock tree, thus add it.

Signed-off-by: Nicolin Chen <b42378@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-10-21 09:11:02 +08:00
Shawn Guo
6886530bab Merge remote-tracking branch 'shesselba/clk-of-init-v2_for-3.13' into imx/soc 2013-10-21 09:10:56 +08:00
Thierry Reding
bd6a9ddcb9 ARM: tegra: Add Tegra114 powergate support
Extend the list of power gates found on Tegra114. Note that there are
now holes in the list, so perhaps a simple array is no longer the best
data structure to represent it.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-10-18 16:28:11 -06:00
Thierry Reding
f0ea2e0bb8 ARM: tegra: Constify list of CPU domains
There's no need to modify these at runtime, it is static data and never
needs to change.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-10-18 16:28:11 -06:00
Thierry Reding
c1e96da28c ARM: tegra: Remove duplicate powergate defines
Instead of duplicating powergate defines, reuse the ones from the
include/linux/tegra-powergate.h header file.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-10-18 16:28:10 -06:00
Joseph Lo
f0c4ac1329 ARM: tegra: add LP1 support code for Tegra124
The LP1 suspend procedure is the same with Tegra30 and Tegra114. Just
need to update the difference of the register address, then we can
continue to share the code.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-10-18 16:28:10 -06:00
Joseph Lo
92e94fe1cd ARM: tegra: re-calculate the LP1 data for Tegra30/114
This patch re-calculates the LP1 data of tegra30/114_sdram_pad_address
to base on its label not rely on others. This can make easier to
maintain if some other Tegra chips keep re-using these codes in the
future. And change the name of tegra30_sdram_pad_save to
tegra_sdram_pad_save to make it more common to other chips.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-10-18 16:28:09 -06:00
Joseph Lo
24036fdc76 ARM: tegra: enable CPU idle for Tegra124
The CPUIdle function of Tegra124 is identical to Tegra114, so we share
the same driver with Tegra114.

Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-10-18 16:28:09 -06:00
Joseph Lo
d127e9c5c5 ARM: tegra: make tegra_resume can work with current and later chips
Because the CPU0 was the first up and the last down core when cluster
power up/down or platform suspend. So only CPU0 needs the rest of the
functions to reset flow controller and re-enable SCU and L2. We also
move the L2 init function for Cortex-A15 to there. The secondery CPU
can just call cpu_resume.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-10-18 16:28:08 -06:00
Joseph Lo
9997e62682 ARM: tegra: CPU hotplug support for Tegra124
The procedure of CPU hotplug for Tegra124 is same with Tegra114. We
re-use the same function with it.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-10-18 16:28:08 -06:00
Joseph Lo
6ca91f9d64 ARM: tegra: add PMC compatible value for Tegra124
The PMC HW is not identical to the existing Tegra SoC. Hence add to it.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-10-18 16:28:07 -06:00
Joseph Lo
7394447505 ARM: tegra: add Tegra124 SoC support
Add Tegra124 SoC support that base on CortexA15MP Core. And enable the
SMP function that can re-use the same procedure with Tegra114.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-10-18 16:28:07 -06:00
Stephen Warren
3bd1ae57f7 ARM: tegra: add fuses as device randomness
Various fuses on Tegra include information that's unique to an individual
chip, or a subset of chips. Call add_device_randomness() with this data
to perturb the initial state of the random pool.

Suggested-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-10-18 16:28:06 -06:00