Commit Graph

37566 Commits

Author SHA1 Message Date
Zhang Rui
0fe3752901 tools/power/turbostat: Obey allowed CPUs for system summary
System summary should summarize the information for allowed CPUs instead
of all the present CPUs.

Introduce topology information for allowed CPUs, and use them to
get system summary.

Signed-off-by: Zhang Rui <rui.zhang@intel.com>
2023-10-20 14:20:07 +08:00
Zhang Rui
ccf8a05280 tools/power/turbostat: Obey allowed CPUs for primary thread/core detection
Thread_id doesn't tell if a CPU is allowed or not.

Detect allowed CPUs only and use the first detected thread/core as the
primary thread/core of a core/package.

Signed-off-by: Zhang Rui <rui.zhang@intel.com>
2023-10-20 10:27:09 +08:00
Zhang Rui
74318add13 tools/power/turbostat: Abstract several functions
When detecting the primary thread/core in a core/package, current code
doesn't handle the allowed CPUs.

Abstract several functions for further fix of this issue.

No functional change.

Signed-off-by: Zhang Rui <rui.zhang@intel.com>
2023-10-20 10:27:09 +08:00
Zhang Rui
7bb3fe27ad tools/power/turbostat: Obey allowed CPUs during startup
Set turbostat CPU affinity to make sure turbostat is running on one of
the allowed CPUs.

Set base_cpu to the first allowed CPU so that some platform information
is dumped using one of the allowed CPUs.

Signed-off-by: Zhang Rui <rui.zhang@intel.com>
2023-10-20 10:27:09 +08:00
Zhang Rui
4ede6d1ce7 tools/power/turbostat: Obey allowed CPUs when accessing CPU counters
for_all_cpus/for_all_cpus_2 are used for accessing the per CPU counters,
and they should follow the cpu_allowed_set instead of cpu_present_set.

Signed-off-by: Zhang Rui <rui.zhang@intel.com>
2023-10-20 10:27:09 +08:00
Zhang Rui
71cfd1da9f tools/power/turbostat: Introduce cpu_allowed_set
Turbostat supports "-c" parameter which limits output to system summary
plus the specified cpu-set. But some code still uses cpu_present_set to
read and dump the counters.

Introduce cpu_allowed_set for code that should obey the specified cpu-set.

No functional change.

Signed-off-by: Zhang Rui <rui.zhang@intel.com>
2023-10-20 10:24:00 +08:00
Zhang Rui
6b74a30b76 tools/power/turbostat: Remove PC7/PC9 support on ADL/RPL
Compared with other platforms that share cnl_features, ADL/RPL don't
have PC7/PC9.

Clone a new platform feature set from cnl_features for ADL/RPL, with
PC7/PC9 removed.

Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Reviewed-by: Len Brown <len.brown@intel.com>
2023-09-27 22:14:21 +08:00
Zhang Rui
05ad96ff0f tools/power/turbostat: Enable MSR_CORE_C1_RES on recent Intel client platforms
All recent Intel client platforms have MSR_CORE_C1_RES. Enable the
support on these platforms, including CNL/ICL/LKF/RKL/TGL/ADL/RPL/MTL.

Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Reviewed-by: Len Brown <len.brown@intel.com>
2023-09-27 22:14:21 +08:00
Zhang Rui
7ee39d8d59 tools/power/turbostat: Introduce probe_pm_features()
Feature probe has nothing to do with CPUID, thus it should not be in
process_cpuids().

Introduce probe_pm_features() and move all feature probing functions
into it.

Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Reviewed-by: Len Brown <len.brown@intel.com>
2023-09-27 22:14:21 +08:00
Zhang Rui
5612b2c89b tools/power/turbostat: Relocate more probing related code
Relocate more feature probing code outside of process_cpuids() into the
corresponding probing functions.

This improves the readability of code and the turbostat output.

Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Reviewed-by: Len Brown <len.brown@intel.com>
2023-09-27 22:14:20 +08:00
Zhang Rui
ce7a32c2a4 tools/power/turbostat: Reorder some functions
Reorder some functions to solve code depdency introduced by next patch.

No functional change.

Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Reviewed-by: Len Brown <len.brown@intel.com>
2023-09-27 22:14:20 +08:00
Zhang Rui
db735f8ba7 tools/power/turbostat: Relocate thermal probing code
Introduce probe_thermal(), and move all thermal probing related code
into it.

Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Reviewed-by: Len Brown <len.brown@intel.com>
2023-09-27 22:14:20 +08:00
Zhang Rui
e7d7b82de1 tools/power/turbostat: Relocate lpi probing code
Introduce probe_lpi(), and move all lpi probing related code into it.

Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Reviewed-by: Len Brown <len.brown@intel.com>
2023-09-27 22:14:20 +08:00
Zhang Rui
2538d1673d tools/power/turbostat: Relocate graphics probing code
Introduce probe_graphics(), and move all graphics probing related code
into it.

Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Reviewed-by: Len Brown <len.brown@intel.com>
2023-09-27 22:14:20 +08:00
Zhang Rui
6cb13609a0 tools/power/turbostat: Rename rapl probing function
Rename rapl_probe() to probe_rapl() to be consistent with other probing
function names.

Probe rapl after probing uncore frequency.

Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Reviewed-by: Len Brown <len.brown@intel.com>
2023-09-27 22:14:20 +08:00
Zhang Rui
622c8f2355 tools/power/turbostat: Rename uncore probing function
Rename intel_uncore_frequency_probe() to probe_intel_uncore_frequency()
to be consistent with other probing function names.

Probe uncore frequency right after probing cstates.

Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Reviewed-by: Len Brown <len.brown@intel.com>
2023-09-27 22:14:20 +08:00
Zhang Rui
11cd9a09f3 tools/power/turbostat: Relocate pstate probing code
Introduce probe_pstates() and move all pstate probing related code into
it.

Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Reviewed-by: Len Brown <len.brown@intel.com>
2023-09-27 22:14:20 +08:00
Zhang Rui
045acf6064 tools/power/turbostat: Relocate cstate probing code
Move all cstate probing related code into probe_cstates().

Note that dump_platform_info() actually dumps both MSR_PLATFORM_INFO and
MSR_IA32_POWER_CTL. MSR_PLATFORM_INFO is for pstate and
MSR_IA32_POWER_CTL is for cstate. So split dump_platform_info() and dump
MSR_IA32_POWER_CTL in probe_cstates().

Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Reviewed-by: Len Brown <len.brown@intel.com>
2023-09-27 22:14:20 +08:00
Zhang Rui
32e8c6169a tools/power/turbostat: Improve probe_platform_features() logic
AMD/Hygon platforms that don't have RAPL use 'amd_features' to describe
the platform features. Unknown Intel platforms use 'default_features' to
describe the platform features.

As none of the platform feature is set for 'amd_features' or
'default_features', there is no need to maintain both of them.

Remove 'amd_features' structure and improve the logic in
probe_platform_features().

Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Reviewed-by: Len Brown <len.brown@intel.com>
2023-09-27 22:14:20 +08:00
Zhang Rui
d085b3b0f1 tools/power/turbostat: Delete intel_model_duplicates()
Now CPU model checks have been cleaned up, no code depends on the
duplicated CPU model value.

Delete intel_model_duplicates().

Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Reviewed-by: Len Brown <len.brown@intel.com>
2023-09-27 22:14:20 +08:00
Zhang Rui
7d0ebe6f7e tools/power/turbostat: Abstract cstate prewake bit support
Abstract cstate prewake bit support.

Delete is_icx()/is_spr() CPU model checks.

Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Reviewed-by: Len Brown <len.brown@intel.com>
2023-09-27 22:14:20 +08:00
Zhang Rui
ed43247b15 tools/power/turbostat: Abstract aperf/mperf multiplier support
Abstract aperf/mperf multiplier support.

Delete is_knl() CPU model check.

Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Reviewed-by: Len Brown <len.brown@intel.com>
2023-09-27 22:14:20 +08:00
Zhang Rui
58ddb691d8 tools/power/turbostat: Abstract extended cstate MSRs support
Abstract the support for MSR_PKG_WEIGHTED_CORE_C0_RES,
MSR_PKG_ANY_CORE_C0_RES, MSR_PKG_ANY_GFXE_C0_RES and
MSR_PKG_BOTH_CORE_GFXE_C0_RES.

Delete has_skl_msrs() CPU model check.

Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Reviewed-by: Len Brown <len.brown@intel.com>
2023-09-27 22:14:20 +08:00
Zhang Rui
80d132cb45 tools/power/turbostat: Abstract MSR_KNL_CORE_C6_RESIDENCY support
Abstract the support for MSR_KNL_CORE_C6_RESIDENCY.

Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Reviewed-by: Len Brown <len.brown@intel.com>
2023-09-27 22:14:20 +08:00
Zhang Rui
c8202a6c3a tools/power/turbostat: Abstract MSR_ATOM_PKG_C6_RESIDENCY support
Abstract the support for MSR_ATOM_PKG_C6_RESIDENCY.

Delete is_slm() CPU model check.

Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Reviewed-by: Len Brown <len.brown@intel.com>
2023-09-27 22:14:20 +08:00
Zhang Rui
6c36882e09 tools/power/turbostat: Abstract MSR_CC6/MC6_DEMOTION_POLICY_CONFIG support
Abstract the support for MSR_CC6/MC6_DEMOTION_POLICY_CONFIG.

Delete has_slv_msrs() CPU model check.

Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Reviewed-by: Len Brown <len.brown@intel.com>
2023-09-27 22:14:20 +08:00
Zhang Rui
9cc1c10385 tools/power/turbostat: Abstract MSR_MODULE_C6_RES_MS support
Abstract MSR_MODULE_C6_RES_MS support.

Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Reviewed-by: Len Brown <len.brown@intel.com>
2023-09-27 22:14:20 +08:00
Zhang Rui
76d83d2ae8 tools/power/turbostat: Abstract MSR_CORE_C1_RES support
Abstract the support for MSR_CORE_C1_RES.

Delete is_dnv() CPU model check.

Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Reviewed-by: Len Brown <len.brown@intel.com>
2023-09-27 22:14:20 +08:00
Zhang Rui
148df4fd04 tools/power/turbostat: Abstract IRTL support
Abstract the support for MSR_PKGC3/PKGC6/PKGC7/PKGC8/PKGC9/PKGC10_IRTL.

Delete has_snb_msrs() CPU model check.

Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Reviewed-by: Len Brown <len.brown@intel.com>
2023-09-27 22:14:20 +08:00
Zhang Rui
8c382f9e74 tools/power/turbostat: Use fine grained IRTL output
It is pointless to dump the IRTL register for a package cstate that is
not supported by the platform.

Print IRTL only for states that are available in
platform->supported_cstates.

Delete has_c8910_msrs() CPU model check.

Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Reviewed-by: Len Brown <len.brown@intel.com>
2023-09-27 22:14:20 +08:00
Zhang Rui
cd7a2b6a61 tools/power/turbostat: Adjust cstate for is_slm()/is_knl()/is_cnl()/is_ehl() models
Disable CC3 for is_slm()/is_knl()/is_cnl()/is_ehl() models.

Delete is_cnl()/is_ehl() CPU model checks.

Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Reviewed-by: Len Brown <len.brown@intel.com>
2023-09-27 22:14:19 +08:00
Zhang Rui
4d2c95d40a tools/power/turbostat: Adjust cstate for has_c8910_msrs() models
Enable PC8/PC9/PC10 for has_c8910_msrs() models.

Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Reviewed-by: Len Brown <len.brown@intel.com>
2023-09-27 22:14:19 +08:00
Zhang Rui
1109694817 tools/power/turbostat: Adjust cstate for is_bdx() models
Disable CC7/PC7 for is_bdx() models.

Delete is_bdx() CPU model check.

Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Reviewed-by: Len Brown <len.brown@intel.com>
2023-09-27 22:14:19 +08:00
Zhang Rui
24d16bec37 tools/power/turbostat: Adjust cstate for is_skx()/is_icx()/is_spr() models
Disable CC3/CC7/PC3/PC7 for is_skx()/is_icx()/is_spr() models.

Delete is_skx() CPU model check.

Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Reviewed-by: Len Brown <len.brown@intel.com>
2023-09-27 22:14:19 +08:00
Zhang Rui
8e20ced057 tools/power/turbostat: Adjust cstate for is_dnv() models
Enable CC1 and disable CC3/CC7/PC3/PC7 for is_dnv() models.

Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Reviewed-by: Len Brown <len.brown@intel.com>
2023-09-27 22:14:19 +08:00
Zhang Rui
3d982ac0da tools/power/turbostat: Adjust cstate for is_jvl() models
Disable CC3/CC7/PC2/PC3/PC6/PC7 for is_jvl() models.

Delete is_jvl() CPU model check.

Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Reviewed-by: Len Brown <len.brown@intel.com>
2023-09-27 22:14:19 +08:00
Zhang Rui
ff20614955 tools/power/turbostat: Adjust cstate for has_slv_msrs() models
Disable PC2/PC3/PC7 and enable PC6 for has_slv_msrs() models.

Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Reviewed-by: Len Brown <len.brown@intel.com>
2023-09-27 22:14:19 +08:00
Zhang Rui
192cbf0468 tools/power/turbostat: Adjust cstate for has_snb_msrs() models
Enable PC7 for has_snb_msrs() models.

Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Reviewed-by: Len Brown <len.brown@intel.com>
2023-09-27 22:14:19 +08:00
Zhang Rui
6f1935c036 tools/power/turbostat: Adjust cstate for models with .cst_limit set
Enable PC3/PC6 for platforms with .cst_limit set because package cstates
are guarded by pkg_cstate_limit.

Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Reviewed-by: Len Brown <len.brown@intel.com>
2023-09-27 22:14:19 +08:00
Zhang Rui
942c854d8d tools/power/turbostat: Adjust cstate for has_snb_msrs() models
Enable CC7 and PC2 for has_snb_msrs() models.

Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Reviewed-by: Len Brown <len.brown@intel.com>
2023-09-27 22:14:19 +08:00
Zhang Rui
ce7ddf8af2 tools/power/turbostat: Adjust cstate for models with .has_nhm_msrs set
Enable CC1/CC3/CC6 for platforms with .has_nhm_msrs set.

Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Reviewed-by: Len Brown <len.brown@intel.com>
2023-09-27 22:14:19 +08:00
Zhang Rui
3c6a17b8ae tools/power/turbostat: Add skeleton support for cstate enumeration
Add skeleton support for cstate enumeration.

Note that the previous logic may override the cstate setting for
multiple times for different reasons. The conversion to new cstate
enumeration must be done step by step following the previous code
order strictly.

Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Reviewed-by: Len Brown <len.brown@intel.com>
2023-09-27 22:14:19 +08:00
Zhang Rui
485a017c45 tools/power/turbostat: Abstract TSC tweak support
On some models, the CPU base frequency is different from the TSC
frequency, and the aperf/mperf counters are running at CPU base
frequency instead of TSC frequency.

Abstract support for TSC tweak.

Given that tsc_tweak depends on base_hz, move the code to probe_bclk()
after base_hz is available.

Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Reviewed-by: Len Brown <len.brown@intel.com>
2023-09-27 22:14:19 +08:00
Zhang Rui
bf1ad57c3f tools/power/turbostat: Remove unused family/model parameters for RAPL functions
RAPL probing can be done without family/model checking. Remove these
parameters in rapl probe functions.

Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Reviewed-by: Len Brown <len.brown@intel.com>
2023-09-27 22:14:19 +08:00
Zhang Rui
7c60409382 tools/power/turbostat: Abstract hardcoded TDP value
Different hardcoded TDP values are used when TDP can not be retrieved
from the hardware.

Abstract hardcoded TDP value.

Delete CPU model checks in get_tdp_intel().

Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Reviewed-by: Len Brown <len.brown@intel.com>
2023-09-27 22:14:19 +08:00
Zhang Rui
9e6f35159c tools/power/turbostat: Abstract fixed DRAM Energy unit support
Abstract the support for fixed Dram domain energy unit.

Delete rapl_dram_energy_units_probe() CPU model check.

Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Reviewed-by: Len Brown <len.brown@intel.com>
2023-09-27 22:14:19 +08:00
Zhang Rui
6d35b8c4a6 tools/power/turbostat: Abstract RAPL divisor support
INTEL_FAM6_ATOM_SILVERMONT model needs a divisor to convert the raw
Energy Units value from MSR_RAPL_POWER_UNIT.

Abstract the support for RAPL divisor.

Delete CPU model check in rapl_probe_intel().

Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Reviewed-by: Len Brown <len.brown@intel.com>
2023-09-27 22:14:19 +08:00
Zhang Rui
e338831b14 tools/power/turbostat: Abstract Per Core RAPL support
Abstract the support for Per Core RAPL.

Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Reviewed-by: Len Brown <len.brown@intel.com>
2023-09-27 22:14:19 +08:00
Zhang Rui
86ba263d9b tools/power/turbostat: Abstract RAPL MSRs support
Abstract the support for RAPL MSRs.

Delete CPU model checks in rapl_probe_intel().

Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Reviewed-by: Len Brown <len.brown@intel.com>
2023-09-27 22:14:19 +08:00
Zhang Rui
a98f886035 tools/power/turbostat: Simplify the logic for RAPL enumeration
The support for each RAPL domains, as well as the support for the perf
status of each RAPL domains, can be detected by checking the
availabilities of the corresponding RAPL MSRs.

Change the code accordingly and remove the hardcoded logic for each
model.

Note that this also fixes the INTEL_FAM6_ATOM_TREMONT model, which has
RAPL_PKG_PERF_STATUS and MSR_DRAM_PERF_STATUS but doesn't have BIC_PKG__
and BIC_RAM__ set.

Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Reviewed-by: Len Brown <len.brown@intel.com>
2023-09-27 22:14:19 +08:00