Commit Graph

4458 Commits

Author SHA1 Message Date
Ben Skeggs
047d2df54c drm/nvc0/pm: parse clock for pll 0x0a (0x137020) from perf table
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-05-16 10:50:47 +10:00
Ben Skeggs
40f6193b8f drm/nvc0/pm: correct core/mem/shader perflvl parsing
We need to parse some of these other entries still, but I've yet to
determine exactly which PLLs the rest map to.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-05-16 10:50:42 +10:00
Ben Skeggs
730673b665 drm/nouveau/pm: remove memtiming support check when assigning to perflvl
Really not necessary here, we want to be able to see if/how we managed to
match a timingset to a performance level, even if we can't currently
program it.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-05-16 10:50:38 +10:00
Ben Skeggs
fcfc768806 drm/nva3: support for memory timing map table
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-05-16 10:50:33 +10:00
Martin Peres
e614b2e7ca drm/nouveau: Associate memtimings with performance levels on cards <= nv98
v2 (Ben Skeggs): fix ramcfg strap, and remove bogus handling of perf 0x40

Signed-off-by: Martin Peres <martin.peres@ensi-bourges.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-05-16 10:50:30 +10:00
Ben Skeggs
dac55b5825 drm/nva3/pm: initial pass at set_clock() hook
I still discourage anyone from actually doing this yet.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-05-16 10:50:25 +10:00
Ben Skeggs
aa58c40563 drm/nvc0/gr: calculate some more of our magic numbers
Again, doesn't quite match NVIDIA's, but not sure it really matters.  This
will however, match the same rules we use to calculate the other related
grctx magics.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-05-16 10:50:22 +10:00
Ben Skeggs
b23b9e7109 drm/nv50: respect LVDS link count from EDID on SPWG panels
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-05-16 10:50:16 +10:00
Ben Skeggs
8c3f6bb970 drm/nouveau: recognise DCB connector type 0x41 as LVDS
After looking at a number of different logs, it appears 0x41 likely
indicates the presense of an LVDS panel following the SPWG spec
(http://www.spwg.org/)

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-05-16 10:50:13 +10:00
Ben Skeggs
eea55c89e5 drm/nouveau: fix uninitialised variable warning
Looks like a false positive to me, but, anyways!

Reported-by: Jimmy Rentz <jb17bsome@gmail.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-05-16 10:50:07 +10:00
Jimmy Rentz
976661093d drm/nouveau: Fix a crash at card takedown for NV40 and older cards
NV40 and older cards (pre NV50) reserve a vram bo for the vga memory at
card init. This bo is then freed at card shutdown.  The problem is that
the ttm bo vram manager was already freed. So a crash occurs when the
vga bo is freed. The fix is to free the vga bo prior to freeing the ttm
bo vram manager. There might be other solutions but this seemed the
simplest to me.

Signed-off-by: Jimmy Rentz <jb17bsome@gmail.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-05-16 10:50:04 +10:00
Jimmy Rentz
2abdb057e4 drm/nouveau: Free nv04 instmem ramin heap at card takedown
Add a missing nv04 instmem ramin heap shutdown call.

Signed-off-by: Jimmy Rentz <jb17bsome@gmail.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-05-16 10:49:58 +10:00
Ben Skeggs
215f902e15 drm/nva3: somewhat improve clock reporting
Definitely not 100% correct, but, for the configurations I've seen used
it'll read back the correct clocks now.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-05-16 10:49:54 +10:00
Ben Skeggs
ce521846b9 drm/nouveau: pull refclk from vbios on limits 0x40 boards
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-05-16 10:49:50 +10:00
Ben Skeggs
3acf67f66e drm/nv40/gr: oops, fix random bits getting set in engine obj
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-05-16 10:49:47 +10:00
Emil Velikov
619d4f7e21 drm/nv50: improve nv50_pm_get_clock()
Many of the nv50 cards have their shader and/or memory pll
disabled at some stage.
This patch addresses those cases, so that the function
returns the correct frequency.

When the shader pll is disabled, the blob reports 2*core clock
Whereas for memory, the data stored in the vbios. This action
is incorrect as some vbioses store a clock value that is less
than the refference clock of the pll.

Thus we are reporting the reff_clk as it is the frequency the
pll actually operates

v2 - Convert NV_INFO() messages to NV_DEBUG()
Provide more information in the actuall message

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-05-16 10:49:41 +10:00
Martin Peres
1f962797fb drm/nouveau/pm: fix compilation failure when CONFIG_POWER_SUPPLY is not set
Signed-off-by: Martin Peres <martin.peres@ensi-bourges.fr>
Reported-by: Stratos Psomadakis <psomas@ece.ntua.gr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-05-16 10:49:34 +10:00
Ben Skeggs
1233bd8d31 drm/nvc0/fifo: stick user area into a gpuobj rather than a bo
Contents will now be preserved across a suspend, unlike a pinned bo

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-05-16 10:49:30 +10:00
Ben Skeggs
1d97f4acd3 drm/nvc0/gr: no need to store context in graph_fini()
PFIFO kickoff should have handled this for us.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-05-16 10:49:26 +10:00
Ben Skeggs
0638df425f drm/nvc0/fifo: restore context table on resume
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-05-16 10:49:22 +10:00
Ben Skeggs
7a5c23de36 drm/nvc0/fifo: kick channels off during suspend
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-05-16 10:49:17 +10:00
Ben Skeggs
fe799114e2 drm/nvc0/gr: better handling of fuc firmware
Allows per-chipset firmware to be installed, and keeps a copy in memory
for suspend/resume purposes.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-05-16 10:49:13 +10:00
Ben Skeggs
9548258fbc drm/nv50: support PMPEG on original nv50
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-05-16 10:49:08 +10:00
Ben Skeggs
93187450fa drm/nv50: rename nv84_mpeg to nv50_mpeg
In preparation for adding 0x50 support.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-05-16 10:49:04 +10:00
Ben Skeggs
c0924326c8 drm/nv84: add support for PMPEG
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-05-16 10:48:59 +10:00
Ben Skeggs
a02ccc7f97 drm/nv40/vpe: add support for PMPEG
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-05-16 10:48:56 +10:00
Ben Skeggs
d5a27370b5 drm/nvc0: implement support for copy engines
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-05-16 10:48:53 +10:00
Ben Skeggs
7ff5441e55 drm/nva3: implement support for copy engine
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-05-16 10:48:48 +10:00
Ben Skeggs
a82dd49f14 drm/nouveau: remove remnants of nouveau_pgraph_engine
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-05-16 10:48:45 +10:00
Ben Skeggs
92abe74992 drm/nouveau: fix suspend failure path to reinitialise all engines
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-05-16 10:48:42 +10:00
Ben Skeggs
39a654d5b9 drm/nouveau: remove remnants of nouveau_pgraph_engine from nouveau_channel
The nouveau_wait_for_idle() call should hopefully not have been actually
necessary, we *do* wait for the channel to go idle already.  If it's
an issue somehow, the chipset-specific hooks can wait for idle themselves
before taking the lock.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-05-16 10:48:37 +10:00
Ben Skeggs
96c5008290 drm/nouveau: move set_tile_region to nouveau_exec_engine
In the very least VPE (PMPEG and friends) also has this style of tile
region regs, lets make them just work if/when they get added.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-05-16 10:48:33 +10:00
Ben Skeggs
4976986bd4 drm/nv04/gr: move to exec engine interfaces
Like nv10-nv50, needs cleanup.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-05-16 10:48:27 +10:00
Ben Skeggs
d11db27901 drm/nv10/gr: move to exec engine interfaces
Like nv20-nv50, needs cleanup.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-05-16 10:48:24 +10:00
Ben Skeggs
a0b1de84fe drm/nv20-nv30/gr: move to exec engine interface
A bit of cleanup done along the way, but, like nv40/nv50, needs more.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-05-16 10:48:18 +10:00
Ben Skeggs
39c8d36827 drm/nv40/gr: move to exec engine interfaces
Like nv50, this needs a good cleanup.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-05-16 10:48:14 +10:00
Ben Skeggs
7a45cd19c9 drm/nvc0/gr: move to exec engine interfaces
Much nicer to do that nv50, the code was pretty much written to expect
such a change in the future.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-05-16 10:48:09 +10:00
Ben Skeggs
2703c21a82 drm/nv50/gr: move to exec engine interfaces
This needs a massive cleanup, but to catch bugs from the interface changes
vs the engine code cleanup, this will be done later.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-05-16 10:48:06 +10:00
Ben Skeggs
6dfdd7a61e drm/nouveau: working towards a common way to represent engines
There's lots of more-or-less independant engines present on NVIDIA GPUs
these days, and we generally want to perform the same operations on them.
Implementing new ones requires hooking into lots of different places,
the aim of this work is to make this simpler and cleaner.

NV84:NV98 PCRYPT moved over as a test.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-05-16 10:48:01 +10:00
Ben Skeggs
2d7b919c9b drm/nouveau: remove some unused members from dev_priv
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-05-16 10:47:55 +10:00
Ben Skeggs
4ea52f8974 drm/nouveau: move engine object creation into per-engine hooks
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-05-16 10:47:52 +10:00
Ben Skeggs
475feffabe drm/nouveau: use static vidshift of 2 on volt 0x30 tables
Explanation is in the commit.  If anyone has an example of where this is
*not* the case, please report it!

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-05-16 10:47:47 +10:00
Roy Spliet
50066f8117 drm/nouveau: improve memtiming table parsing
Improves the parsing of the memory timing table on NV50-NV98revA1 chipsets.

Added stepping to drm_nouveau_private to make sure newer NV98 (105M) is
zero rather than incorrect.

Signed-off-by: Roy Spliet <r.spliet@student.tudelft.nl>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-05-16 10:47:43 +10:00
Ben Skeggs
7795bee0c4 drm/nvc0: decode gpc/hubclient on vm fault
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-05-16 10:47:37 +10:00
Ben Skeggs
e2966632ae drm/nvc0: more vm fault reasons
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-05-16 10:47:34 +10:00
Ben Skeggs
7a31347362 drm/nvc0: more vm fault engines
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-05-16 10:47:28 +10:00
Emil Velikov
0b89a072f9 drm/nouveau: Fix missing whitespace checkpatch.pl errors.
This patch fixes messages such as
ERROR: space required after that ','
ERROR: spaces required around that '='

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Signed-off-by: Francisco Jerez <currojerez@riseup.net>
2011-05-16 10:47:25 +10:00
Emil Velikov
f9ec8f6c8d drm/nouveau: Fix brace placement checkpatch.pl errors.
Fix 'ERROR: that open brace { should be on the previous line'
Fix 'ERROR: else should follow close brace }'

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Signed-off-by: Francisco Jerez <currojerez@riseup.net>
2011-05-16 10:47:19 +10:00
Emil Velikov
f212949ced drm/nouveau: Clean up trailing whitespace and C99-style comments.
Fix 'ERROR: trailing whitespace',
Fix 'ERROR: do not use C99 // comments'

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Signed-off-by: Francisco Jerez <currojerez@riseup.net>
2011-05-16 10:47:17 +10:00
Emil Velikov
71298e2f0b drm/nouveau: Fix indentation-related checkpatch.pl error messages.
Fix 'ERROR: code indent should use tabs where possible'
Fix 'ERROR: space required before the open parenthesis ('

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Signed-off-by: Francisco Jerez <currojerez@riseup.net>
2011-05-16 10:47:10 +10:00