arm64: tegra: Add XUSB and pad controller on Tegra194

Adds the XUSB pad and XUSB controllers on Tegra194.

Signed-off-by: JC Kuo <jckuo@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
This commit is contained in:
JC Kuo 2020-02-12 14:11:32 +08:00 committed by Thierry Reding
parent f9f711efd4
commit fab7a0391b

View File

@ -537,6 +537,145 @@
status = "disabled";
};
xusb_padctl: padctl@3520000 {
compatible = "nvidia,tegra194-xusb-padctl";
reg = <0x03520000 0x1000>,
<0x03540000 0x1000>;
reg-names = "padctl", "ao";
resets = <&bpmp TEGRA194_RESET_XUSB_PADCTL>;
reset-names = "padctl";
status = "disabled";
pads {
usb2 {
clocks = <&bpmp TEGRA194_CLK_USB2_TRK>;
clock-names = "trk";
lanes {
usb2-0 {
nvidia,function = "xusb";
status = "disabled";
#phy-cells = <0>;
};
usb2-1 {
nvidia,function = "xusb";
status = "disabled";
#phy-cells = <0>;
};
usb2-2 {
nvidia,function = "xusb";
status = "disabled";
#phy-cells = <0>;
};
usb2-3 {
nvidia,function = "xusb";
status = "disabled";
#phy-cells = <0>;
};
};
};
usb3 {
lanes {
usb3-0 {
nvidia,function = "xusb";
status = "disabled";
#phy-cells = <0>;
};
usb3-1 {
nvidia,function = "xusb";
status = "disabled";
#phy-cells = <0>;
};
usb3-2 {
nvidia,function = "xusb";
status = "disabled";
#phy-cells = <0>;
};
usb3-3 {
nvidia,function = "xusb";
status = "disabled";
#phy-cells = <0>;
};
};
};
};
ports {
usb2-0 {
status = "disabled";
};
usb2-1 {
status = "disabled";
};
usb2-2 {
status = "disabled";
};
usb2-3 {
status = "disabled";
};
usb3-0 {
status = "disabled";
};
usb3-1 {
status = "disabled";
};
usb3-2 {
status = "disabled";
};
usb3-3 {
status = "disabled";
};
};
};
usb@3610000 {
compatible = "nvidia,tegra194-xusb";
reg = <0x03610000 0x40000>,
<0x03600000 0x10000>;
reg-names = "hcd", "fpci";
interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA194_CLK_XUSB_CORE_HOST>,
<&bpmp TEGRA194_CLK_XUSB_FALCON>,
<&bpmp TEGRA194_CLK_XUSB_CORE_SS>,
<&bpmp TEGRA194_CLK_XUSB_SS>,
<&bpmp TEGRA194_CLK_CLK_M>,
<&bpmp TEGRA194_CLK_XUSB_FS>,
<&bpmp TEGRA194_CLK_UTMIPLL>,
<&bpmp TEGRA194_CLK_CLK_M>,
<&bpmp TEGRA194_CLK_PLLE>;
clock-names = "xusb_host", "xusb_falcon_src",
"xusb_ss", "xusb_ss_src", "xusb_hs_src",
"xusb_fs_src", "pll_u_480m", "clk_m",
"pll_e";
power-domains = <&bpmp TEGRA194_POWER_DOMAIN_XUSBC>,
<&bpmp TEGRA194_POWER_DOMAIN_XUSBA>;
power-domain-names = "xusb_host", "xusb_ss";
nvidia,xusb-padctl = <&xusb_padctl>;
status = "disabled";
};
fuse@3820000 {
compatible = "nvidia,tegra194-efuse";
reg = <0x03820000 0x10000>;