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Merge patch series "UFS patches for kernel 6.11"
Bart Van Assche <bvanassche@acm.org> says: Hi Martin, Please consider this series of UFS driver patches for the next merge window. Thank you, Bart. Link: https://lore.kernel.org/r/20240708211716.2827751-1-bvanassche@acm.org Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
This commit is contained in:
Martin K. Petersen
commit
e30618a480
@ -137,7 +137,6 @@ EXPORT_SYMBOL_GPL(ufshcd_mcq_queue_cfg_addr);
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*
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* MAC - Max. Active Command of the Host Controller (HC)
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* HC wouldn't send more than this commands to the device.
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* It is mandatory to implement get_hba_mac() to enable MCQ mode.
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* Calculates and adjusts the queue depth based on the depth
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* supported by the HC and ufs device.
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*/
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@ -145,12 +144,21 @@ int ufshcd_mcq_decide_queue_depth(struct ufs_hba *hba)
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{
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int mac;
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/* Mandatory to implement get_hba_mac() */
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mac = ufshcd_mcq_vops_get_hba_mac(hba);
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if (mac < 0) {
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dev_err(hba->dev, "Failed to get mac, err=%d\n", mac);
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return mac;
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if (!hba->vops || !hba->vops->get_hba_mac) {
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/*
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* Extract the maximum number of active transfer tasks value
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* from the host controller capabilities register. This value is
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* 0-based.
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*/
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hba->capabilities =
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ufshcd_readl(hba, REG_CONTROLLER_CAPABILITIES);
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mac = hba->capabilities & MASK_TRANSFER_REQUESTS_SLOTS_MCQ;
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mac++;
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} else {
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mac = hba->vops->get_hba_mac(hba);
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}
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if (mac < 0)
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goto err;
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WARN_ON_ONCE(!hba->dev_info.bqueuedepth);
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/*
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@ -159,6 +167,10 @@ int ufshcd_mcq_decide_queue_depth(struct ufs_hba *hba)
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* shared queuing architecture is enabled.
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*/
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return min_t(int, mac, hba->dev_info.bqueuedepth);
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err:
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dev_err(hba->dev, "Failed to get mac, err=%d\n", mac);
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return mac;
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}
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static int ufshcd_mcq_config_nr_queues(struct ufs_hba *hba)
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@ -415,9 +427,16 @@ EXPORT_SYMBOL_GPL(ufshcd_mcq_enable_esi);
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void ufshcd_mcq_enable(struct ufs_hba *hba)
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{
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ufshcd_rmwl(hba, MCQ_MODE_SELECT, MCQ_MODE_SELECT, REG_UFS_MEM_CFG);
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hba->mcq_enabled = true;
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}
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EXPORT_SYMBOL_GPL(ufshcd_mcq_enable);
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void ufshcd_mcq_disable(struct ufs_hba *hba)
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{
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ufshcd_rmwl(hba, MCQ_MODE_SELECT, 0, REG_UFS_MEM_CFG);
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hba->mcq_enabled = false;
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}
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void ufshcd_mcq_config_esi(struct ufs_hba *hba, struct msi_msg *msg)
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{
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ufshcd_writel(hba, msg->address_lo, REG_UFS_ESILBA);
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@ -64,16 +64,11 @@ void ufshcd_auto_hibern8_update(struct ufs_hba *hba, u32 ahit);
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void ufshcd_compl_one_cqe(struct ufs_hba *hba, int task_tag,
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struct cq_entry *cqe);
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int ufshcd_mcq_init(struct ufs_hba *hba);
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void ufshcd_mcq_disable(struct ufs_hba *hba);
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int ufshcd_mcq_decide_queue_depth(struct ufs_hba *hba);
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int ufshcd_mcq_memory_alloc(struct ufs_hba *hba);
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void ufshcd_mcq_make_queues_operational(struct ufs_hba *hba);
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void ufshcd_mcq_config_mac(struct ufs_hba *hba, u32 max_active_cmds);
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u32 ufshcd_mcq_read_cqis(struct ufs_hba *hba, int i);
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void ufshcd_mcq_write_cqis(struct ufs_hba *hba, u32 val, int i);
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struct ufs_hw_queue *ufshcd_mcq_req_to_hwq(struct ufs_hba *hba,
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struct request *req);
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unsigned long ufshcd_mcq_poll_cqe_lock(struct ufs_hba *hba,
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struct ufs_hw_queue *hwq);
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void ufshcd_mcq_compl_all_cqes_lock(struct ufs_hba *hba,
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struct ufs_hw_queue *hwq);
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bool ufshcd_cmd_inflight(struct scsi_cmnd *cmd);
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@ -255,14 +250,6 @@ static inline int ufshcd_vops_mcq_config_resource(struct ufs_hba *hba)
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return -EOPNOTSUPP;
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}
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static inline int ufshcd_mcq_vops_get_hba_mac(struct ufs_hba *hba)
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{
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if (hba->vops && hba->vops->get_hba_mac)
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return hba->vops->get_hba_mac(hba);
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return -EOPNOTSUPP;
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}
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static inline int ufshcd_mcq_vops_op_runtime_config(struct ufs_hba *hba)
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{
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if (hba->vops && hba->vops->op_runtime_config)
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@ -164,8 +164,6 @@ EXPORT_SYMBOL_GPL(ufshcd_dump_regs);
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enum {
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UFSHCD_MAX_CHANNEL = 0,
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UFSHCD_MAX_ID = 1,
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UFSHCD_CMD_PER_LUN = 32 - UFSHCD_NUM_RESERVED,
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UFSHCD_CAN_QUEUE = 32 - UFSHCD_NUM_RESERVED,
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};
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static const char *const ufshcd_state_name[] = {
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@ -455,7 +453,7 @@ static void ufshcd_add_command_trace(struct ufs_hba *hba, unsigned int tag,
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intr = ufshcd_readl(hba, REG_INTERRUPT_STATUS);
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if (is_mcq_enabled(hba)) {
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if (hba->mcq_enabled) {
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struct ufs_hw_queue *hwq = ufshcd_mcq_req_to_hwq(hba, rq);
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hwq_id = hwq->id;
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@ -2304,7 +2302,7 @@ void ufshcd_send_command(struct ufs_hba *hba, unsigned int task_tag,
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if (unlikely(ufshcd_should_inform_monitor(hba, lrbp)))
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ufshcd_start_monitor(hba, lrbp);
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if (is_mcq_enabled(hba)) {
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if (hba->mcq_enabled) {
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int utrd_size = sizeof(struct utp_transfer_req_desc);
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struct utp_transfer_req_desc *src = lrbp->utr_descriptor_ptr;
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struct utp_transfer_req_desc *dest;
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@ -2404,7 +2402,7 @@ static inline int ufshcd_hba_capabilities(struct ufs_hba *hba)
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hba->capabilities &= ~MASK_64_ADDRESSING_SUPPORT;
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/* nutrs and nutmrs are 0 based values */
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hba->nutrs = (hba->capabilities & MASK_TRANSFER_REQUESTS_SLOTS) + 1;
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hba->nutrs = (hba->capabilities & MASK_TRANSFER_REQUESTS_SLOTS_SDB) + 1;
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hba->nutmrs =
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((hba->capabilities & MASK_TASK_MANAGEMENT_REQUEST_SLOTS) >> 16) + 1;
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hba->reserved_slot = hba->nutrs - 1;
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@ -3003,7 +3001,7 @@ static int ufshcd_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
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goto out;
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}
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if (is_mcq_enabled(hba))
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if (hba->mcq_enabled)
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hwq = ufshcd_mcq_req_to_hwq(hba, scsi_cmd_to_rq(cmd));
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ufshcd_send_command(hba, tag, hwq);
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@ -3062,7 +3060,7 @@ static int ufshcd_clear_cmd(struct ufs_hba *hba, u32 task_tag)
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unsigned long flags;
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int err;
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if (is_mcq_enabled(hba)) {
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if (hba->mcq_enabled) {
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/*
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* MCQ mode. Clean up the MCQ resources similar to
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* what the ufshcd_utrl_clear() does for SDB mode.
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@ -3172,7 +3170,7 @@ retry:
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__func__, lrbp->task_tag);
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/* MCQ mode */
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if (is_mcq_enabled(hba)) {
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if (hba->mcq_enabled) {
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/* successfully cleared the command, retry if needed */
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if (ufshcd_clear_cmd(hba, lrbp->task_tag) == 0)
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err = -EAGAIN;
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@ -3994,11 +3992,11 @@ static void ufshcd_host_memory_configure(struct ufs_hba *hba)
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*/
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static int ufshcd_dme_link_startup(struct ufs_hba *hba)
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{
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struct uic_command uic_cmd = {0};
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struct uic_command uic_cmd = {
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.command = UIC_CMD_DME_LINK_STARTUP,
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};
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int ret;
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uic_cmd.command = UIC_CMD_DME_LINK_STARTUP;
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ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
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if (ret)
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dev_dbg(hba->dev,
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@ -4016,11 +4014,11 @@ static int ufshcd_dme_link_startup(struct ufs_hba *hba)
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*/
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static int ufshcd_dme_reset(struct ufs_hba *hba)
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{
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struct uic_command uic_cmd = {0};
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struct uic_command uic_cmd = {
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.command = UIC_CMD_DME_RESET,
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};
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int ret;
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uic_cmd.command = UIC_CMD_DME_RESET;
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ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
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if (ret)
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dev_err(hba->dev,
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@ -4055,11 +4053,11 @@ EXPORT_SYMBOL_GPL(ufshcd_dme_configure_adapt);
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*/
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static int ufshcd_dme_enable(struct ufs_hba *hba)
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{
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struct uic_command uic_cmd = {0};
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struct uic_command uic_cmd = {
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.command = UIC_CMD_DME_ENABLE,
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};
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int ret;
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uic_cmd.command = UIC_CMD_DME_ENABLE;
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ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
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if (ret)
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dev_err(hba->dev,
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@ -4112,7 +4110,12 @@ static inline void ufshcd_add_delay_before_dme_cmd(struct ufs_hba *hba)
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int ufshcd_dme_set_attr(struct ufs_hba *hba, u32 attr_sel,
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u8 attr_set, u32 mib_val, u8 peer)
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{
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struct uic_command uic_cmd = {0};
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struct uic_command uic_cmd = {
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.command = peer ? UIC_CMD_DME_PEER_SET : UIC_CMD_DME_SET,
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.argument1 = attr_sel,
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.argument2 = UIC_ARG_ATTR_TYPE(attr_set),
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.argument3 = mib_val,
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};
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static const char *const action[] = {
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"dme-set",
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"dme-peer-set"
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@ -4121,12 +4124,6 @@ int ufshcd_dme_set_attr(struct ufs_hba *hba, u32 attr_sel,
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int ret;
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int retries = UFS_UIC_COMMAND_RETRIES;
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uic_cmd.command = peer ?
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UIC_CMD_DME_PEER_SET : UIC_CMD_DME_SET;
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uic_cmd.argument1 = attr_sel;
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uic_cmd.argument2 = UIC_ARG_ATTR_TYPE(attr_set);
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uic_cmd.argument3 = mib_val;
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do {
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/* for peer attributes we retry upon failure */
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ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
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@ -4156,7 +4153,10 @@ EXPORT_SYMBOL_GPL(ufshcd_dme_set_attr);
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int ufshcd_dme_get_attr(struct ufs_hba *hba, u32 attr_sel,
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u32 *mib_val, u8 peer)
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{
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struct uic_command uic_cmd = {0};
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struct uic_command uic_cmd = {
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.command = peer ? UIC_CMD_DME_PEER_GET : UIC_CMD_DME_GET,
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.argument1 = attr_sel,
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};
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static const char *const action[] = {
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"dme-get",
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"dme-peer-get"
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@ -4190,10 +4190,6 @@ int ufshcd_dme_get_attr(struct ufs_hba *hba, u32 attr_sel,
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}
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}
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uic_cmd.command = peer ?
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UIC_CMD_DME_PEER_GET : UIC_CMD_DME_GET;
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uic_cmd.argument1 = attr_sel;
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do {
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/* for peer attributes we retry upon failure */
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ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
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@ -4326,7 +4322,11 @@ out_unlock:
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*/
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int ufshcd_uic_change_pwr_mode(struct ufs_hba *hba, u8 mode)
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{
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struct uic_command uic_cmd = {0};
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struct uic_command uic_cmd = {
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.command = UIC_CMD_DME_SET,
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.argument1 = UIC_ARG_MIB(PA_PWRMODE),
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.argument3 = mode,
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};
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int ret;
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if (hba->quirks & UFSHCD_QUIRK_BROKEN_PA_RXHSUNTERMCAP) {
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@ -4339,9 +4339,6 @@ int ufshcd_uic_change_pwr_mode(struct ufs_hba *hba, u8 mode)
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}
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}
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uic_cmd.command = UIC_CMD_DME_SET;
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uic_cmd.argument1 = UIC_ARG_MIB(PA_PWRMODE);
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uic_cmd.argument3 = mode;
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ufshcd_hold(hba);
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ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
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ufshcd_release(hba);
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@ -4382,13 +4379,14 @@ EXPORT_SYMBOL_GPL(ufshcd_link_recovery);
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|
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int ufshcd_uic_hibern8_enter(struct ufs_hba *hba)
|
||||
{
|
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int ret;
|
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struct uic_command uic_cmd = {0};
|
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struct uic_command uic_cmd = {
|
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.command = UIC_CMD_DME_HIBER_ENTER,
|
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};
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ktime_t start = ktime_get();
|
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int ret;
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|
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ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_ENTER, PRE_CHANGE);
|
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|
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uic_cmd.command = UIC_CMD_DME_HIBER_ENTER;
|
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ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
|
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trace_ufshcd_profile_hibern8(dev_name(hba->dev), "enter",
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ktime_to_us(ktime_sub(ktime_get(), start)), ret);
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@ -4406,13 +4404,14 @@ EXPORT_SYMBOL_GPL(ufshcd_uic_hibern8_enter);
|
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|
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int ufshcd_uic_hibern8_exit(struct ufs_hba *hba)
|
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{
|
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struct uic_command uic_cmd = {0};
|
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struct uic_command uic_cmd = {
|
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.command = UIC_CMD_DME_HIBER_EXIT,
|
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};
|
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int ret;
|
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ktime_t start = ktime_get();
|
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|
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ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_EXIT, PRE_CHANGE);
|
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|
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uic_cmd.command = UIC_CMD_DME_HIBER_EXIT;
|
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ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
|
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trace_ufshcd_profile_hibern8(dev_name(hba->dev), "exit",
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ktime_to_us(ktime_sub(ktime_get(), start)), ret);
|
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@ -5562,7 +5561,7 @@ static int ufshcd_poll(struct Scsi_Host *shost, unsigned int queue_num)
|
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u32 tr_doorbell;
|
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struct ufs_hw_queue *hwq;
|
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|
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if (is_mcq_enabled(hba)) {
|
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if (hba->mcq_enabled) {
|
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hwq = &hba->uhq[queue_num];
|
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|
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return ufshcd_mcq_poll_cqe_lock(hba, hwq);
|
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@ -6203,7 +6202,7 @@ out:
|
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/* Complete requests that have door-bell cleared */
|
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static void ufshcd_complete_requests(struct ufs_hba *hba, bool force_compl)
|
||||
{
|
||||
if (is_mcq_enabled(hba))
|
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if (hba->mcq_enabled)
|
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ufshcd_mcq_compl_pending_transfer(hba, force_compl);
|
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else
|
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ufshcd_transfer_req_compl(hba);
|
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@ -6460,7 +6459,7 @@ static bool ufshcd_abort_one(struct request *rq, void *priv)
|
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*ret ? "failed" : "succeeded");
|
||||
|
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/* Release cmd in MCQ mode if abort succeeds */
|
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if (is_mcq_enabled(hba) && (*ret == 0)) {
|
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if (hba->mcq_enabled && (*ret == 0)) {
|
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hwq = ufshcd_mcq_req_to_hwq(hba, scsi_cmd_to_rq(lrbp->cmd));
|
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if (!hwq)
|
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return 0;
|
||||
@ -7393,7 +7392,7 @@ static int ufshcd_eh_device_reset_handler(struct scsi_cmnd *cmd)
|
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goto out;
|
||||
}
|
||||
|
||||
if (is_mcq_enabled(hba)) {
|
||||
if (hba->mcq_enabled) {
|
||||
for (pos = 0; pos < hba->nutrs; pos++) {
|
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lrbp = &hba->lrb[pos];
|
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if (ufshcd_cmd_inflight(lrbp->cmd) &&
|
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@ -7489,7 +7488,7 @@ int ufshcd_try_to_abort_task(struct ufs_hba *hba, int tag)
|
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*/
|
||||
dev_err(hba->dev, "%s: cmd at tag %d not pending in the device.\n",
|
||||
__func__, tag);
|
||||
if (is_mcq_enabled(hba)) {
|
||||
if (hba->mcq_enabled) {
|
||||
/* MCQ mode */
|
||||
if (ufshcd_cmd_inflight(lrbp->cmd)) {
|
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/* sleep for max. 200us same delay as in SDB mode */
|
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@ -7567,7 +7566,7 @@ static int ufshcd_abort(struct scsi_cmnd *cmd)
|
||||
|
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ufshcd_hold(hba);
|
||||
|
||||
if (!is_mcq_enabled(hba)) {
|
||||
if (!hba->mcq_enabled) {
|
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reg = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
|
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if (!test_bit(tag, &hba->outstanding_reqs)) {
|
||||
/* If command is already aborted/completed, return FAILED. */
|
||||
@ -7600,7 +7599,7 @@ static int ufshcd_abort(struct scsi_cmnd *cmd)
|
||||
}
|
||||
hba->req_abort_count++;
|
||||
|
||||
if (!is_mcq_enabled(hba) && !(reg & (1 << tag))) {
|
||||
if (!hba->mcq_enabled && !(reg & (1 << tag))) {
|
||||
/* only execute this code in single doorbell mode */
|
||||
dev_err(hba->dev,
|
||||
"%s: cmd was completed, but without a notifying intr, tag = %d",
|
||||
@ -7627,7 +7626,7 @@ static int ufshcd_abort(struct scsi_cmnd *cmd)
|
||||
goto release;
|
||||
}
|
||||
|
||||
if (is_mcq_enabled(hba)) {
|
||||
if (hba->mcq_enabled) {
|
||||
/* MCQ mode. Branch off to handle abort for mcq mode */
|
||||
err = ufshcd_mcq_abort(cmd);
|
||||
goto release;
|
||||
@ -8682,6 +8681,9 @@ static int ufshcd_alloc_mcq(struct ufs_hba *hba)
|
||||
if (ret)
|
||||
goto err;
|
||||
|
||||
hba->host->can_queue = hba->nutrs - UFSHCD_NUM_RESERVED;
|
||||
hba->reserved_slot = hba->nutrs - UFSHCD_NUM_RESERVED;
|
||||
|
||||
return 0;
|
||||
err:
|
||||
hba->nutrs = old_nutrs;
|
||||
@ -8703,12 +8705,6 @@ static void ufshcd_config_mcq(struct ufs_hba *hba)
|
||||
ufshcd_mcq_make_queues_operational(hba);
|
||||
ufshcd_mcq_config_mac(hba, hba->nutrs);
|
||||
|
||||
hba->host->can_queue = hba->nutrs - UFSHCD_NUM_RESERVED;
|
||||
hba->reserved_slot = hba->nutrs - UFSHCD_NUM_RESERVED;
|
||||
|
||||
ufshcd_mcq_enable(hba);
|
||||
hba->mcq_enabled = true;
|
||||
|
||||
dev_info(hba->dev, "MCQ configured, nr_queues=%d, io_queues=%d, read_queue=%d, poll_queues=%d, queue_depth=%d\n",
|
||||
hba->nr_hw_queues, hba->nr_queues[HCTX_TYPE_DEFAULT],
|
||||
hba->nr_queues[HCTX_TYPE_READ], hba->nr_queues[HCTX_TYPE_POLL],
|
||||
@ -8736,8 +8732,10 @@ static int ufshcd_device_init(struct ufs_hba *hba, bool init_dev_params)
|
||||
ufshcd_set_link_active(hba);
|
||||
|
||||
/* Reconfigure MCQ upon reset */
|
||||
if (is_mcq_enabled(hba) && !init_dev_params)
|
||||
if (hba->mcq_enabled && !init_dev_params) {
|
||||
ufshcd_config_mcq(hba);
|
||||
ufshcd_mcq_enable(hba);
|
||||
}
|
||||
|
||||
/* Verify device initialization by sending NOP OUT UPIU */
|
||||
ret = ufshcd_verify_dev_init(hba);
|
||||
@ -8758,11 +8756,13 @@ static int ufshcd_device_init(struct ufs_hba *hba, bool init_dev_params)
|
||||
if (ret)
|
||||
return ret;
|
||||
if (is_mcq_supported(hba) && !hba->scsi_host_added) {
|
||||
ufshcd_mcq_enable(hba);
|
||||
ret = ufshcd_alloc_mcq(hba);
|
||||
if (!ret) {
|
||||
ufshcd_config_mcq(hba);
|
||||
} else {
|
||||
/* Continue with SDB mode */
|
||||
ufshcd_mcq_disable(hba);
|
||||
use_mcq_mode = false;
|
||||
dev_err(hba->dev, "MCQ mode is disabled, err=%d\n",
|
||||
ret);
|
||||
@ -8776,6 +8776,7 @@ static int ufshcd_device_init(struct ufs_hba *hba, bool init_dev_params)
|
||||
} else if (is_mcq_supported(hba)) {
|
||||
/* UFSHCD_QUIRK_REINIT_AFTER_MAX_GEAR_SWITCH is set */
|
||||
ufshcd_config_mcq(hba);
|
||||
ufshcd_mcq_enable(hba);
|
||||
}
|
||||
}
|
||||
|
||||
@ -8961,8 +8962,6 @@ static const struct scsi_host_template ufshcd_driver_template = {
|
||||
.eh_timed_out = ufshcd_eh_timed_out,
|
||||
.this_id = -1,
|
||||
.sg_tablesize = SG_ALL,
|
||||
.cmd_per_lun = UFSHCD_CMD_PER_LUN,
|
||||
.can_queue = UFSHCD_CAN_QUEUE,
|
||||
.max_segment_size = PRDT_DATA_BYTE_COUNT_MAX,
|
||||
.max_sectors = SZ_1M / SECTOR_SIZE,
|
||||
.max_host_blocked = 1,
|
||||
|
||||
@ -693,7 +693,7 @@ static void ufs_mtk_mcq_disable_irq(struct ufs_hba *hba)
|
||||
struct ufs_mtk_host *host = ufshcd_get_variant(hba);
|
||||
u32 irq, i;
|
||||
|
||||
if (!is_mcq_enabled(hba))
|
||||
if (!hba->mcq_enabled)
|
||||
return;
|
||||
|
||||
if (host->mcq_nr_intr == 0)
|
||||
@ -711,7 +711,7 @@ static void ufs_mtk_mcq_enable_irq(struct ufs_hba *hba)
|
||||
struct ufs_mtk_host *host = ufshcd_get_variant(hba);
|
||||
u32 irq, i;
|
||||
|
||||
if (!is_mcq_enabled(hba))
|
||||
if (!hba->mcq_enabled)
|
||||
return;
|
||||
|
||||
if (host->mcq_nr_intr == 0)
|
||||
@ -1308,7 +1308,7 @@ static int ufs_mtk_link_set_hpm(struct ufs_hba *hba)
|
||||
if (err)
|
||||
return err;
|
||||
|
||||
if (is_mcq_enabled(hba)) {
|
||||
if (hba->mcq_enabled) {
|
||||
ufs_mtk_config_mcq(hba, false);
|
||||
ufshcd_mcq_make_queues_operational(hba);
|
||||
ufshcd_mcq_config_mac(hba, hba->nutrs);
|
||||
|
||||
@ -73,8 +73,8 @@ enum ufs_event_type {
|
||||
* @done: UIC command completion
|
||||
*/
|
||||
struct uic_command {
|
||||
u32 command;
|
||||
u32 argument1;
|
||||
const u32 command;
|
||||
const u32 argument1;
|
||||
u32 argument2;
|
||||
u32 argument3;
|
||||
int cmd_active;
|
||||
@ -325,7 +325,9 @@ struct ufs_pwr_mode_info {
|
||||
* @event_notify: called to notify important events
|
||||
* @reinit_notify: called to notify reinit of UFSHCD during max gear switch
|
||||
* @mcq_config_resource: called to configure MCQ platform resources
|
||||
* @get_hba_mac: called to get vendor specific mac value, mandatory for mcq mode
|
||||
* @get_hba_mac: reports maximum number of outstanding commands supported by
|
||||
* the controller. Should be implemented for UFSHCI 4.0 or later
|
||||
* controllers that are not compliant with the UFSHCI 4.0 specification.
|
||||
* @op_runtime_config: called to config Operation and runtime regs Pointers
|
||||
* @get_outstanding_cqs: called to get outstanding completion queues
|
||||
* @config_esi: called to config Event Specific Interrupt
|
||||
@ -1133,11 +1135,6 @@ struct ufs_hw_queue {
|
||||
|
||||
#define MCQ_QCFG_SIZE 0x40
|
||||
|
||||
static inline bool is_mcq_enabled(struct ufs_hba *hba)
|
||||
{
|
||||
return hba->mcq_enabled;
|
||||
}
|
||||
|
||||
static inline unsigned int ufshcd_mcq_opr_offset(struct ufs_hba *hba,
|
||||
enum ufshcd_mcq_opr opr, int idx)
|
||||
{
|
||||
|
||||
@ -67,7 +67,8 @@ enum {
|
||||
|
||||
/* Controller capability masks */
|
||||
enum {
|
||||
MASK_TRANSFER_REQUESTS_SLOTS = 0x0000001F,
|
||||
MASK_TRANSFER_REQUESTS_SLOTS_SDB = 0x0000001F,
|
||||
MASK_TRANSFER_REQUESTS_SLOTS_MCQ = 0x000000FF,
|
||||
MASK_NUMBER_OUTSTANDING_RTT = 0x0000FF00,
|
||||
MASK_TASK_MANAGEMENT_REQUEST_SLOTS = 0x00070000,
|
||||
MASK_EHSLUTRD_SUPPORTED = 0x00400000,
|
||||
|
||||
Loading…
Reference in New Issue
Block a user