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scsi: ufs: mcq: Make .get_hba_mac() optional
UFSHCI controllers that are compliant with the UFSHCI 4.0 standard report the maximum number of supported commands in the controller capabilities register. Use that value if .get_hba_mac == NULL. Reviewed-by: Peter Wang <peter.wang@mediatek.com> Signed-off-by: Bart Van Assche <bvanassche@acm.org> Link: https://lore.kernel.org/r/20240708211716.2827751-11-bvanassche@acm.org Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
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@ -138,18 +138,26 @@ EXPORT_SYMBOL_GPL(ufshcd_mcq_queue_cfg_addr);
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*
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* MAC - Max. Active Command of the Host Controller (HC)
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* HC wouldn't send more than this commands to the device.
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* It is mandatory to implement get_hba_mac() to enable MCQ mode.
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* Calculates and adjusts the queue depth based on the depth
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* supported by the HC and ufs device.
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*/
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int ufshcd_mcq_decide_queue_depth(struct ufs_hba *hba)
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{
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int mac = -EOPNOTSUPP;
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int mac;
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if (!hba->vops || !hba->vops->get_hba_mac)
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goto err;
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mac = hba->vops->get_hba_mac(hba);
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if (!hba->vops || !hba->vops->get_hba_mac) {
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/*
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* Extract the maximum number of active transfer tasks value
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* from the host controller capabilities register. This value is
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* 0-based.
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*/
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hba->capabilities =
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ufshcd_readl(hba, REG_CONTROLLER_CAPABILITIES);
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mac = hba->capabilities & MASK_TRANSFER_REQUESTS_SLOTS_MCQ;
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mac++;
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} else {
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mac = hba->vops->get_hba_mac(hba);
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}
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if (mac < 0)
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goto err;
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@ -424,6 +432,12 @@ void ufshcd_mcq_enable(struct ufs_hba *hba)
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}
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EXPORT_SYMBOL_GPL(ufshcd_mcq_enable);
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void ufshcd_mcq_disable(struct ufs_hba *hba)
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{
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ufshcd_rmwl(hba, MCQ_MODE_SELECT, 0, REG_UFS_MEM_CFG);
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hba->mcq_enabled = false;
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}
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void ufshcd_mcq_config_esi(struct ufs_hba *hba, struct msi_msg *msg)
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{
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ufshcd_writel(hba, msg->address_lo, REG_UFS_ESILBA);
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@ -64,6 +64,7 @@ void ufshcd_auto_hibern8_update(struct ufs_hba *hba, u32 ahit);
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void ufshcd_compl_one_cqe(struct ufs_hba *hba, int task_tag,
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struct cq_entry *cqe);
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int ufshcd_mcq_init(struct ufs_hba *hba);
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void ufshcd_mcq_disable(struct ufs_hba *hba);
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int ufshcd_mcq_decide_queue_depth(struct ufs_hba *hba);
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int ufshcd_mcq_memory_alloc(struct ufs_hba *hba);
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struct ufs_hw_queue *ufshcd_mcq_req_to_hwq(struct ufs_hba *hba,
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@ -8753,12 +8753,13 @@ static int ufshcd_device_init(struct ufs_hba *hba, bool init_dev_params)
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if (ret)
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return ret;
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if (is_mcq_supported(hba) && !hba->scsi_host_added) {
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ufshcd_mcq_enable(hba);
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ret = ufshcd_alloc_mcq(hba);
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if (!ret) {
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ufshcd_config_mcq(hba);
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ufshcd_mcq_enable(hba);
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} else {
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/* Continue with SDB mode */
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ufshcd_mcq_disable(hba);
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use_mcq_mode = false;
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dev_err(hba->dev, "MCQ mode is disabled, err=%d\n",
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ret);
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@ -325,7 +325,9 @@ struct ufs_pwr_mode_info {
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* @event_notify: called to notify important events
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* @reinit_notify: called to notify reinit of UFSHCD during max gear switch
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* @mcq_config_resource: called to configure MCQ platform resources
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* @get_hba_mac: called to get vendor specific mac value, mandatory for mcq mode
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* @get_hba_mac: reports maximum number of outstanding commands supported by
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* the controller. Should be implemented for UFSHCI 4.0 or later
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* controllers that are not compliant with the UFSHCI 4.0 specification.
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* @op_runtime_config: called to config Operation and runtime regs Pointers
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* @get_outstanding_cqs: called to get outstanding completion queues
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* @config_esi: called to config Event Specific Interrupt
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@ -68,6 +68,7 @@ enum {
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/* Controller capability masks */
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enum {
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MASK_TRANSFER_REQUESTS_SLOTS_SDB = 0x0000001F,
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MASK_TRANSFER_REQUESTS_SLOTS_MCQ = 0x000000FF,
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MASK_NUMBER_OUTSTANDING_RTT = 0x0000FF00,
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MASK_TASK_MANAGEMENT_REQUEST_SLOTS = 0x00070000,
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MASK_EHSLUTRD_SUPPORTED = 0x00400000,
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