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crypto: hisilicon - support new error types for ZIP
Kunpeng930 ZIP adds 'zip_axi_poison_err' 'zip_sva_err' and 'QM_ACC_DO_TASK_TIMEOUT' hardware error types. This patch enables the error types and configures the error types as NFE. Signed-off-by: Weili Qian <qianweili@huawei.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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@ -68,10 +68,10 @@
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#define HZIP_CORE_INT_RAS_CE_ENABLE 0x1
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#define HZIP_CORE_INT_RAS_NFE_ENB 0x301164
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#define HZIP_CORE_INT_RAS_FE_ENB 0x301168
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#define HZIP_CORE_INT_RAS_NFE_ENABLE 0x7FE
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#define HZIP_CORE_INT_RAS_NFE_ENABLE 0x1FFE
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#define HZIP_SRAM_ECC_ERR_NUM_SHIFT 16
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#define HZIP_SRAM_ECC_ERR_ADDR_SHIFT 24
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#define HZIP_CORE_INT_MASK_ALL GENMASK(10, 0)
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#define HZIP_CORE_INT_MASK_ALL GENMASK(12, 0)
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#define HZIP_COMP_CORE_NUM 2
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#define HZIP_DECOMP_CORE_NUM 6
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#define HZIP_CORE_NUM (HZIP_COMP_CORE_NUM + \
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@ -133,6 +133,8 @@ static const struct hisi_zip_hw_error zip_hw_error[] = {
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{ .int_msk = BIT(8), .msg = "zip_com_inf_err" },
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{ .int_msk = BIT(9), .msg = "zip_enc_inf_err" },
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{ .int_msk = BIT(10), .msg = "zip_pre_out_err" },
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{ .int_msk = BIT(11), .msg = "zip_axi_poison_err" },
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{ .int_msk = BIT(12), .msg = "zip_sva_err" },
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{ /* sentinel */ }
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};
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@ -668,6 +670,9 @@ static void hisi_zip_err_info_init(struct hisi_qm *qm)
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err_info->msi_wr_port = HZIP_WR_PORT;
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err_info->acpi_rst = "ZRST";
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err_info->nfe = QM_BASE_NFE | QM_ACC_WB_NOT_READY_TIMEOUT;
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if (qm->ver >= QM_HW_V3)
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err_info->nfe |= QM_ACC_DO_TASK_TIMEOUT;
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}
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static const struct hisi_qm_err_ini hisi_zip_err_ini = {
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