Some low-level optimizations and fixes that don't belong in an -rc

series for various OMAP-family chips, targeted for v3.15.
 
 Basic build, boot, and PM test logs are available here:
 
 http://www.pwsan.com/omap/testlogs/prcm-a-for-v3.15/20140228124518/
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Merge tag 'for-v3.15/omap-hwmod-clk-prcm-a' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into omap-for-v3.15/prcm

Some low-level optimizations and fixes that don't belong in an -rc
series for various OMAP-family chips, targeted for v3.15.

Basic build, boot, and PM test logs are available here:

http://www.pwsan.com/omap/testlogs/prcm-a-for-v3.15/20140228124518/
This commit is contained in:
Tony Lindgren 2014-02-28 15:41:55 -08:00
commit 9ed5811ddd
7 changed files with 26 additions and 6 deletions

View File

@ -60,6 +60,7 @@ AFLAGS_sram34xx.o :=-Wa,-march=armv7-a
obj-$(CONFIG_SOC_OMAP2420) += omap2-restart.o
obj-$(CONFIG_SOC_OMAP2430) += omap2-restart.o
obj-$(CONFIG_SOC_AM33XX) += am33xx-restart.o
obj-$(CONFIG_SOC_AM43XX) += omap4-restart.o
obj-$(CONFIG_ARCH_OMAP3) += omap3-restart.o
obj-$(CONFIG_ARCH_OMAP4) += omap4-restart.o
obj-$(CONFIG_SOC_OMAP5) += omap4-restart.o

View File

@ -231,6 +231,7 @@ DT_MACHINE_START(AM43_DT, "Generic AM43 (Flattened Device Tree)")
.init_machine = omap_generic_init,
.init_time = omap3_sync32k_timer_init,
.dt_compat = am43_boards_compat,
.restart = omap44xx_restart,
MACHINE_END
#endif

View File

@ -306,7 +306,7 @@ long omap2_dpll_round_rate(struct clk_hw *hw, unsigned long target_rate,
ref_rate = __clk_get_rate(dd->clk_ref);
clk_name = __clk_get_name(hw->clk);
pr_debug("clock: %s: starting DPLL round_rate, target rate %ld\n",
pr_debug("clock: %s: starting DPLL round_rate, target rate %lu\n",
clk_name, target_rate);
scaled_rt_rp = target_rate / (ref_rate / DPLL_SCALE_FACTOR);
@ -342,7 +342,7 @@ long omap2_dpll_round_rate(struct clk_hw *hw, unsigned long target_rate,
if (r == DPLL_MULT_UNDERFLOW)
continue;
pr_debug("clock: %s: m = %d: n = %d: new_rate = %ld\n",
pr_debug("clock: %s: m = %d: n = %d: new_rate = %lu\n",
clk_name, m, n, new_rate);
if (target_rate == new_rate) {
@ -354,7 +354,7 @@ long omap2_dpll_round_rate(struct clk_hw *hw, unsigned long target_rate,
}
if (target_rate != new_rate) {
pr_debug("clock: %s: cannot round to rate %ld\n",
pr_debug("clock: %s: cannot round to rate %lu\n",
clk_name, target_rate);
return ~0;
}

View File

@ -254,6 +254,11 @@ void omap4_cminst_clkdm_force_wakeup(u8 part, u16 inst, u16 cdoffs)
*
*/
void omap4_cminst_clkdm_force_sleep(u8 part, u16 inst, u16 cdoffs)
{
_clktrctrl_write(OMAP34XX_CLKSTCTRL_FORCE_SLEEP, part, inst, cdoffs);
}
/**
* omap4_cminst_wait_module_ready - wait for a module to be in 'func' state
* @part: PRCM partition ID that the CM_CLKCTRL register exists in
@ -404,8 +409,17 @@ static int omap4_clkdm_clear_all_wkup_sleep_deps(struct clockdomain *clkdm)
static int omap4_clkdm_sleep(struct clockdomain *clkdm)
{
omap4_cminst_clkdm_enable_hwsup(clkdm->prcm_partition,
clkdm->cm_inst, clkdm->clkdm_offs);
if (clkdm->flags & CLKDM_CAN_HWSUP)
omap4_cminst_clkdm_enable_hwsup(clkdm->prcm_partition,
clkdm->cm_inst,
clkdm->clkdm_offs);
else if (clkdm->flags & CLKDM_CAN_FORCE_SLEEP)
omap4_cminst_clkdm_force_sleep(clkdm->prcm_partition,
clkdm->cm_inst,
clkdm->clkdm_offs);
else
return -EINVAL;
return 0;
}

View File

@ -525,7 +525,7 @@ int omap3_noncore_dpll_set_rate(struct clk_hw *hw, unsigned long rate,
* stuff is inherited for free
*/
if (!ret)
if (!ret && clk_get_parent(hw->clk) != new_parent)
__clk_reparent(hw->clk, new_parent);
return 0;

View File

@ -719,6 +719,7 @@ static struct omap_hwmod_ocp_if *am43xx_hwmod_ocp_ifs[] __initdata = {
&am33xx_l4_ls__uart4,
&am33xx_l4_ls__uart5,
&am33xx_l4_ls__uart6,
&am33xx_l4_ls__spinlock,
&am33xx_l4_ls__elm,
&am33xx_l4_ls__epwmss0,
&am33xx_epwmss0__ecap0,

View File

@ -25,6 +25,7 @@
#include "prminst44xx.h"
#include "prm-regbits-44xx.h"
#include "prcm44xx.h"
#include "prcm43xx.h"
#include "prcm_mpu44xx.h"
#include "soc.h"
@ -176,6 +177,8 @@ void omap4_prminst_global_warm_sw_reset(void)
dev_inst = OMAP54XX_PRM_DEVICE_INST;
else if (soc_is_dra7xx())
dev_inst = DRA7XX_PRM_DEVICE_INST;
else if (soc_is_am43xx())
dev_inst = AM43XX_PRM_DEVICE_INST;
else
return;