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LoongArch changes for v6.8

Browse Source 
1, Raise minimum clang version to 18.0.0;
 2, Enable initial Rust support for LoongArch;
 3, Add built-in dtb support for LoongArch;
 4, Use generic interface to support crashkernel=X,[high,low];
 5, Some bug fixes and other small changes;
 6, Update the default config file.
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Merge tag 'loongarch-6.8' of git://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson

Pull LoongArch updates from Huacai Chen:

 - Raise minimum clang version to 18.0.0

 - Enable initial Rust support for LoongArch

 - Add built-in dtb support for LoongArch

 - Use generic interface to support crashkernel=X,[high,low]

 - Some bug fixes and other small changes

 - Update the default config file.

* tag 'loongarch-6.8' of git://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson: (22 commits)
  MAINTAINERS: Add BPF JIT for LOONGARCH entry
  LoongArch: Update Loongson-3 default config file
  LoongArch: BPF: Prevent out-of-bounds memory access
  LoongArch: BPF: Support 64-bit pointers to kfuncs
  LoongArch: Fix definition of ftrace_regs_set_instruction_pointer()
  LoongArch: Use generic interface to support crashkernel=X,[high,low]
  LoongArch: Fix and simplify fcsr initialization on execve()
  LoongArch: Let cores_io_master cover the largest NR_CPUS
  LoongArch: Change SHMLBA from SZ_64K to PAGE_SIZE
  LoongArch: Add a missing call to efi_esrt_init()
  LoongArch: Parsing CPU-related information from DTS
  LoongArch: dts: DeviceTree for Loongson-2K2000
  LoongArch: dts: DeviceTree for Loongson-2K1000
  LoongArch: dts: DeviceTree for Loongson-2K0500
  LoongArch: Allow device trees be built into the kernel
  dt-bindings: interrupt-controller: loongson,liointc: Fix dtbs_check warning for interrupt-names
  dt-bindings: interrupt-controller: loongson,liointc: Fix dtbs_check warning for reg-names
  dt-bindings: loongarch: Add Loongson SoC boards compatibles
  dt-bindings: loongarch: Add CPU bindings for LoongArch
  LoongArch: Enable initial Rust support
  ...
This commit is contained in:
Linus Torvalds 2024-01-19 13:30:49 -08:00
commit 24fdd51899
34 changed files with 1735 additions and 102 deletions
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24
Documentation/admin-guide/kernel-parameters.txt
View File

@ -888,9 +888,9 @@
memory region [offset, offset + size] for that kernel
image. If '@offset' is omitted, then a suitable offset
is selected automatically.
[KNL, X86-64, ARM64, RISCV] Select a region under 4G first, and
fall back to reserve region above 4G when '@offset'
hasn't been specified.
[KNL, X86-64, ARM64, RISCV, LoongArch] Select a region
under 4G first, and fall back to reserve region above
4G when '@offset' hasn't been specified.
See Documentation/admin-guide/kdump/kdump.rst for further details.
crashkernel=range1:size1[,range2:size2,...][@offset]
@ -901,25 +901,27 @@
Documentation/admin-guide/kdump/kdump.rst for an example.
crashkernel=size[KMG],high
[KNL, X86-64, ARM64, RISCV] range could be above 4G.
[KNL, X86-64, ARM64, RISCV, LoongArch] range could be
above 4G.
Allow kernel to allocate physical memory region from top,
so could be above 4G if system have more than 4G ram
installed. Otherwise memory region will be allocated
below 4G, if available.
It will be ignored if crashkernel=X is specified.
crashkernel=size[KMG],low
[KNL, X86-64, ARM64, RISCV] range under 4G. When crashkernel=X,high
is passed, kernel could allocate physical memory region
above 4G, that cause second kernel crash on system
that require some amount of low memory, e.g. swiotlb
requires at least 64M+32K low memory, also enough extra
low memory is needed to make sure DMA buffers for 32-bit
devices won't run out. Kernel would try to allocate
[KNL, X86-64, ARM64, RISCV, LoongArch] range under 4G.
When crashkernel=X,high is passed, kernel could allocate
physical memory region above 4G, that cause second kernel
crash on system that require some amount of low memory,
e.g. swiotlb requires at least 64M+32K low memory, also
enough extra low memory is needed to make sure DMA buffers
for 32-bit devices won't run out. Kernel would try to allocate
default size of memory below 4G automatically. The default
size is platform dependent.
--> x86: max(swiotlb_size_or_default() + 8MiB, 256MiB)
--> arm64: 128MiB
--> riscv: 128MiB
--> loongarch: 128MiB
This one lets the user specify own low range under 4G
for second kernel instead.
0: to disable low allocation.

18
Documentation/devicetree/bindings/interrupt-controller/loongson,liointc.yaml
View File

@ -11,8 +11,13 @@ maintainers:
description: |
This interrupt controller is found in the Loongson-3 family of chips and
Loongson-2K1000 chip, as the primary package interrupt controller which
Loongson-2K series chips, as the primary package interrupt controller which
can route local I/O interrupt to interrupt lines of cores.
Be aware of the following points.
1.The Loongson-2K0500 is a single core CPU;
2.The Loongson-2K0500/2K1000 has 64 device interrupt sources as inputs, so we
need to define two nodes in dts{i} to describe the "0-31" and "32-61" interrupt
sources respectively.
allOf:
- $ref: /schemas/interrupt-controller.yaml#
@ -33,6 +38,7 @@ properties:
- const: main
- const: isr0
- const: isr1
minItems: 2
interrupt-controller: true
@ -45,11 +51,9 @@ properties:
interrupt-names:
description: List of names for the parent interrupts.
items:
- const: int0
- const: int1
- const: int2
- const: int3
pattern: int[0-3]
minItems: 1
maxItems: 4
'#interrupt-cells':
const: 2
@ -69,6 +73,7 @@ required:
- compatible
- reg
- interrupts
- interrupt-names
- interrupt-controller
- '#interrupt-cells'
- loongson,parent_int_map
@ -86,7 +91,8 @@ if:
then:
properties:
reg:
minItems: 3
minItems: 2
maxItems: 3
required:
- reg-names

61
Documentation/devicetree/bindings/loongarch/cpus.yaml Normal file
View File

@ -0,0 +1,61 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/loongarch/cpus.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: LoongArch CPUs
maintainers:
- Binbin Zhou <zhoubinbin@loongson.cn>
description:
This document describes the list of LoongArch CPU cores that support FDT,
it describe the layout of CPUs in a system through the "cpus" node.
allOf:
- $ref: /schemas/cpu.yaml#
properties:
compatible:
enum:
- loongson,la264
- loongson,la364
reg:
maxItems: 1
clocks:
maxItems: 1
required:
- compatible
- reg
- clocks
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/clock/loongson,ls2k-clk.h>
cpus {
#size-cells = <0>;
#address-cells = <1>;
cpu@0 {
compatible = "loongson,la264";
device_type = "cpu";
reg = <0>;
clocks = <&clk LOONGSON2_NODE_CLK>;
};
cpu@1 {
compatible = "loongson,la264";
device_type = "cpu";
reg = <1>;
clocks = <&clk LOONGSON2_NODE_CLK>;
};
};
...

34
Documentation/devicetree/bindings/loongarch/loongson.yaml Normal file
View File

@ -0,0 +1,34 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/loongarch/loongson.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Loongson SoC-based boards
maintainers:
- Binbin Zhou <zhoubinbin@loongson.cn>
properties:
$nodename:
const: '/'
compatible:
oneOf:
- description: Loongson-2K0500 processor based boards
items:
- const: loongson,ls2k0500-ref
- const: loongson,ls2k0500
- description: Loongson-2K1000 processor based boards
items:
- const: loongson,ls2k1000-ref
- const: loongson,ls2k1000
- description: Loongson-2K2000 processor based boards
items:
- const: loongson,ls2k2000-ref
- const: loongson,ls2k2000
additionalProperties: true
...

13
Documentation/rust/arch-support.rst
View File

@ -12,10 +12,11 @@ which uses ``libclang``.
Below is a general summary of architectures that currently work. Level of
support corresponds to ``S`` values in the ``MAINTAINERS`` file.
============ ================ ==============================================
Architecture Level of support Constraints
============ ================ ==============================================
``um`` Maintained ``x86_64`` only.
``x86`` Maintained ``x86_64`` only.
============ ================ ==============================================
============= ================ ==============================================
Architecture Level of support Constraints
============= ================ ==============================================
``loongarch`` Maintained -
``um`` Maintained ``x86_64`` only.
``x86`` Maintained ``x86_64`` only.
============= ================ ==============================================

7
MAINTAINERS
View File

@ -3692,6 +3692,13 @@ L: bpf@vger.kernel.org
S: Supported
F: arch/arm64/net/
BPF JIT for LOONGARCH
M: Tiezhu Yang <yangtiezhu@loongson.cn>
R: Hengqi Chen <hengqi.chen@gmail.com>
L: bpf@vger.kernel.org
S: Maintained
F: arch/loongarch/net/
BPF JIT for MIPS (32-BIT AND 64-BIT)
M: Johan Almbladh <johan.almbladh@anyfinetworks.com>
M: Paul Burton <paulburton@kernel.org>

1
arch/loongarch/Kbuild
View File

@ -4,6 +4,7 @@ obj-y += net/
obj-y += vdso/
obj-$(CONFIG_KVM) += kvm/
obj-$(CONFIG_BUILTIN_DTB) += boot/dts/
# for cleaning
subdir- += boot

22
arch/loongarch/Kconfig
View File

@ -142,6 +142,7 @@ config LOONGARCH
select HAVE_REGS_AND_STACK_ACCESS_API
select HAVE_RETHOOK
select HAVE_RSEQ
select HAVE_RUST
select HAVE_SAMPLE_FTRACE_DIRECT
select HAVE_SAMPLE_FTRACE_DIRECT_MULTI
select HAVE_SETUP_PER_CPU_AREA if NUMA
@ -376,6 +377,24 @@ config CMDLINE_FORCE
endchoice
config BUILTIN_DTB
bool "Enable built-in dtb in kernel"
depends on OF
help
Some existing systems do not provide a canonical device tree to
the kernel at boot time. Let's provide a device tree table in the
kernel, keyed by the dts filename, containing the relevant DTBs.
Built-in DTBs are generic enough and can be used as references.
config BUILTIN_DTB_NAME
string "Source file for built-in dtb"
depends on BUILTIN_DTB
help
Base name (without suffix, relative to arch/loongarch/boot/dts/)
for the DTS file that will be used to produce the DTB linked into
the kernel.
config DMI
bool "Enable DMI scanning"
select DMI_SCAN_MACHINE_NON_EFI_FALLBACK
@ -577,6 +596,9 @@ config ARCH_SELECTS_CRASH_DUMP
depends on CRASH_DUMP
select RELOCATABLE
config ARCH_HAS_GENERIC_CRASHKERNEL_RESERVATION
def_bool CRASH_CORE
config RELOCATABLE
bool "Relocatable kernel"
help

6
arch/loongarch/Makefile
View File

@ -6,6 +6,7 @@
boot := arch/loongarch/boot
KBUILD_DEFCONFIG := loongson3_defconfig
KBUILD_DTBS := dtbs
image-name-y := vmlinux
image-name-$(CONFIG_EFI_ZBOOT) := vmlinuz
@ -81,8 +82,11 @@ KBUILD_AFLAGS_MODULE += -Wa,-mla-global-with-abs
KBUILD_CFLAGS_MODULE += -fplt -Wa,-mla-global-with-abs,-mla-local-with-abs
endif
KBUILD_RUSTFLAGS_MODULE += -Crelocation-model=pic
ifeq ($(CONFIG_RELOCATABLE),y)
KBUILD_CFLAGS_KERNEL += -fPIE
KBUILD_RUSTFLAGS_KERNEL += -Crelocation-model=pie
LDFLAGS_vmlinux += -static -pie --no-dynamic-linker -z notext $(call ld-option, --apply-dynamic-relocs)
endif
@ -141,7 +145,7 @@ endif
vdso-install-y += arch/loongarch/vdso/vdso.so.dbg
all: $(notdir $(KBUILD_IMAGE))
all: $(notdir $(KBUILD_IMAGE)) $(KBUILD_DTBS)
vmlinuz.efi: vmlinux.efi

5
arch/loongarch/boot/dts/Makefile
View File

@ -1,4 +1,5 @@
# SPDX-License-Identifier: GPL-2.0-only
dtstree := $(srctree)/$(src)
dtb-y := $(patsubst $(dtstree)/%.dts,%.dtb, $(wildcard $(dtstree)/*.dts))
dtb-y = loongson-2k0500-ref.dtb loongson-2k1000-ref.dtb loongson-2k2000-ref.dtb
obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .dtb.o, $(CONFIG_BUILTIN_DTB_NAME))

88
arch/loongarch/boot/dts/loongson-2k0500-ref.dts Normal file
View File

@ -0,0 +1,88 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (C) 2023 Loongson Technology Corporation Limited
*/
/dts-v1/;
#include "loongson-2k0500.dtsi"
/ {
compatible = "loongson,ls2k0500-ref", "loongson,ls2k0500";
model = "Loongson-2K0500 Reference Board";
aliases {
ethernet0 = &gmac0;
ethernet1 = &gmac1;
serial0 = &uart0;
};
chosen {
stdout-path = "serial0:115200n8";
};
memory@200000 {
device_type = "memory";
reg = <0x0 0x00200000 0x0 0x0ee00000>,
<0x0 0x90000000 0x0 0x60000000>;
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
linux,cma {
compatible = "shared-dma-pool";
reusable;
size = <0x0 0x2000000>;
linux,cma-default;
};
};
};
&gmac0 {
status = "okay";
phy-mode = "rgmii";
bus_id = <0x0>;
};
&gmac1 {
status = "okay";
phy-mode = "rgmii";
bus_id = <0x1>;
};
&i2c0 {
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
eeprom@57{
compatible = "atmel,24c16";
reg = <0x57>;
pagesize = <16>;
};
};
&ehci0 {
status = "okay";
};
&ohci0 {
status = "okay";
};
&sata {
status = "okay";
};
&uart0 {
status = "okay";
};
&rtc0 {
status = "okay";
};

266
arch/loongarch/boot/dts/loongson-2k0500.dtsi Normal file
View File

@ -0,0 +1,266 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (C) 2023 Loongson Technology Corporation Limited
*/
/dts-v1/;
#include <dt-bindings/interrupt-controller/irq.h>
/ {
#address-cells = <2>;
#size-cells = <2>;
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu0: cpu@0 {
compatible = "loongson,la264";
device_type = "cpu";
reg = <0x0>;
clocks = <&cpu_clk>;
};
};
cpu_clk: cpu-clk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <500000000>;
};
cpuintc: interrupt-controller {
compatible = "loongson,cpu-interrupt-controller";
#interrupt-cells = <1>;
interrupt-controller;
};
bus@10000000 {
compatible = "simple-bus";
ranges = <0x0 0x10000000 0x0 0x10000000 0x0 0x10000000>,
<0x0 0x02000000 0x0 0x02000000 0x0 0x02000000>,
<0x0 0x20000000 0x0 0x20000000 0x0 0x10000000>,
<0x0 0x40000000 0x0 0x40000000 0x0 0x40000000>,
<0xfe 0x0 0xfe 0x0 0x0 0x40000000>;
#address-cells = <2>;
#size-cells = <2>;
isa@16400000 {
compatible = "isa";
#size-cells = <1>;
#address-cells = <2>;
ranges = <1 0x0 0x0 0x16400000 0x4000>;
};
liointc0: interrupt-controller@1fe11400 {
compatible = "loongson,liointc-2.0";
reg = <0x0 0x1fe11400 0x0 0x40>,
<0x0 0x1fe11040 0x0 0x8>;
reg-names = "main", "isr0";
interrupt-controller;
#interrupt-cells = <2>;
interrupt-parent = <&cpuintc>;
interrupts = <2>;
interrupt-names = "int0";
loongson,parent_int_map = <0xffffffff>, /* int0 */
<0x00000000>, /* int1 */
<0x00000000>, /* int2 */
<0x00000000>; /* int3 */
};
liointc1: interrupt-controller@1fe11440 {
compatible = "loongson,liointc-2.0";
reg = <0x0 0x1fe11440 0x0 0x40>,
<0x0 0x1fe11048 0x0 0x8>;
reg-names = "main", "isr0";
interrupt-controller;
#interrupt-cells = <2>;
interrupt-parent = <&cpuintc>;
interrupts = <4>;
interrupt-names = "int2";
loongson,parent_int_map = <0x00000000>, /* int0 */
<0x00000000>, /* int1 */
<0xffffffff>, /* int2 */
<0x00000000>; /* int3 */
};
eiointc: interrupt-controller@1fe11600 {
compatible = "loongson,ls2k0500-eiointc";
reg = <0x0 0x1fe11600 0x0 0xea00>;
interrupt-controller;
#interrupt-cells = <1>;
interrupt-parent = <&cpuintc>;
interrupts = <3>;
};
gmac0: ethernet@1f020000 {
compatible = "snps,dwmac-3.70a";
reg = <0x0 0x1f020000 0x0 0x10000>;
interrupt-parent = <&liointc0>;
interrupts = <12 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "macirq";
status = "disabled";
};
gmac1: ethernet@1f030000 {
compatible = "snps,dwmac-3.70a";
reg = <0x0 0x1f030000 0x0 0x10000>;
interrupt-parent = <&liointc0>;
interrupts = <14 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "macirq";
status = "disabled";
};
sata: sata@1f040000 {
compatible = "snps,spear-ahci";
reg = <0x0 0x1f040000 0x0 0x10000>;
interrupt-parent = <&eiointc>;
interrupts = <75>;
status = "disabled";
};
ehci0: usb@1f050000 {
compatible = "generic-ehci";
reg = <0x0 0x1f050000 0x0 0x8000>;
interrupt-parent = <&eiointc>;
interrupts = <71>;
status = "disabled";
};
ohci0: usb@1f058000 {
compatible = "generic-ohci";
reg = <0x0 0x1f058000 0x0 0x8000>;
interrupt-parent = <&eiointc>;
interrupts = <72>;
status = "disabled";
};
uart0: serial@1ff40800 {
compatible = "ns16550a";
reg = <0x0 0x1ff40800 0x0 0x10>;
clock-frequency = <100000000>;
interrupt-parent = <&eiointc>;
interrupts = <2>;
no-loopback-test;
status = "disabled";
};
i2c0: i2c@1ff48000 {
compatible = "loongson,ls2k-i2c";
reg = <0x0 0x1ff48000 0x0 0x0800>;
interrupt-parent = <&eiointc>;
interrupts = <14>;
status = "disabled";
};
i2c@1ff48800 {
compatible = "loongson,ls2k-i2c";
reg = <0x0 0x1ff48800 0x0 0x0800>;
interrupt-parent = <&eiointc>;
interrupts = <15>;
status = "disabled";
};
i2c@1ff49000 {
compatible = "loongson,ls2k-i2c";
reg = <0x0 0x1ff49000 0x0 0x0800>;
interrupt-parent = <&eiointc>;
interrupts = <16>;
status = "disabled";
};
i2c@1ff49800 {
compatible = "loongson,ls2k-i2c";
reg = <0x0 0x1ff49800 0x0 0x0800>;
interrupt-parent = <&eiointc>;
interrupts = <17>;
status = "disabled";
};
i2c@1ff4a000 {
compatible = "loongson,ls2k-i2c";
reg = <0x0 0x1ff4a000 0x0 0x0800>;
interrupt-parent = <&eiointc>;
interrupts = <18>;
status = "disabled";
};
i2c@1ff4a800 {
compatible = "loongson,ls2k-i2c";
reg = <0x0 0x1ff4a800 0x0 0x0800>;
interrupt-parent = <&eiointc>;
interrupts = <19>;
status = "disabled";
};
pmc: power-management@1ff6c000 {
compatible = "loongson,ls2k0500-pmc", "syscon";
reg = <0x0 0x1ff6c000 0x0 0x58>;
interrupt-parent = <&eiointc>;
interrupts = <56>;
loongson,suspend-address = <0x0 0x1c000500>;
syscon-reboot {
compatible = "syscon-reboot";
offset = <0x30>;
mask = <0x1>;
};
syscon-poweroff {
compatible = "syscon-poweroff";
regmap = <&pmc>;
offset = <0x14>;
mask = <0x3c00>;
value = <0x3c00>;
};
};
rtc0: rtc@1ff6c100 {
compatible = "loongson,ls2k0500-rtc", "loongson,ls7a-rtc";
reg = <0x0 0x1ff6c100 0x0 0x100>;
interrupt-parent = <&eiointc>;
interrupts = <35>;
status = "disabled";
};
pcie@1a000000 {
compatible = "loongson,ls2k-pci";
reg = <0x0 0x1a000000 0x0 0x02000000>,
<0xfe 0x0 0x0 0x20000000>;
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
bus-range = <0x0 0x5>;
ranges = <0x01000000 0x0 0x00004000 0x0 0x16404000 0x0 0x00004000>,
<0x02000000 0x0 0x40000000 0x0 0x40000000 0x0 0x40000000>;
pcie@0,0 {
reg = <0x0000 0x0 0x0 0x0 0x0>;
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
interrupt-parent = <&eiointc>;
#interrupt-cells = <1>;
interrupt-map-mask = <0x0 0x0 0x0 0x0>;
interrupt-map = <0x0 0x0 0x0 0x0 &eiointc 81>;
ranges;
};
pcie@1,0 {
reg = <0x0800 0x0 0x0 0x0 0x0>;
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
interrupt-parent = <&eiointc>;
#interrupt-cells = <1>;
interrupt-map-mask = <0x0 0x0 0x0 0x0>;
interrupt-map = <0x0 0x0 0x0 0x0 &eiointc 82>;
ranges;
};
};
};
};

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// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (C) 2023 Loongson Technology Corporation Limited
*/
/dts-v1/;
#include "loongson-2k1000.dtsi"
/ {
compatible = "loongson,ls2k1000-ref", "loongson,ls2k1000";
model = "Loongson-2K1000 Reference Board";
aliases {
serial0 = &uart0;
};
chosen {
stdout-path = "serial0:115200n8";
};
memory@200000 {
device_type = "memory";
reg = <0x0 0x00200000 0x0 0x06e00000>,
<0x0 0x08000000 0x0 0x07000000>,
<0x0 0x90000000 0x1 0xe0000000>;
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
linux,cma {
compatible = "shared-dma-pool";
reusable;
size = <0x0 0x2000000>;
linux,cma-default;
};
};
};
&gmac0 {
status = "okay";
phy-mode = "rgmii";
phy-handle = <&phy0>;
mdio {
compatible = "snps,dwmac-mdio";
#address-cells = <1>;
#size-cells = <0>;
phy0: ethernet-phy@0 {
reg = <0>;
};
};
};
&gmac1 {
status = "okay";
phy-mode = "rgmii";
phy-handle = <&phy1>;
mdio {
compatible = "snps,dwmac-mdio";
#address-cells = <1>;
#size-cells = <0>;
phy1: ethernet-phy@1 {
reg = <16>;
};
};
};
&i2c2 {
status = "okay";
pinctrl-0 = <&i2c0_pins_default>;
pinctrl-names = "default";
#address-cells = <1>;
#size-cells = <0>;
eeprom@57{
compatible = "atmel,24c16";
reg = <0x57>;
pagesize = <16>;
};
};
&spi0 {
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
spidev@0 {
compatible = "rohm,dh2228fv";
spi-max-frequency = <100000000>;
reg = <0>;
};
};
&ehci0 {
status = "okay";
};
&ohci0 {
status = "okay";
};
&sata {
status = "okay";
};
&uart0 {
status = "okay";
};
&clk {
status = "okay";
};
&rtc0 {
status = "okay";
};
&pctrl {
status = "okay";
sdio_pins_default: sdio-pins {
sdio-pinmux {
groups = "sdio";
function = "sdio";
};
sdio-det-pinmux {
groups = "pwm2";
function = "gpio";
};
};
pwm1_pins_default: pwm1-pins {
pinmux {
groups = "pwm1";
function = "pwm1";
};
};
pwm0_pins_default: pwm0-pins {
pinmux {
groups = "pwm0";
function = "pwm0";
};
};
i2c1_pins_default: i2c1-pins {
pinmux {
groups = "i2c1";
function = "i2c1";
};
};
i2c0_pins_default: i2c0-pins {
pinmux {
groups = "i2c0";
function = "i2c0";
};
};
nand_pins_default: nand-pins {
pinmux {
groups = "nand";
function = "nand";
};
};
hda_pins_default: hda-pins {
grp0-pinmux {
groups = "hda";
function = "hda";
};
grp1-pinmux {
groups = "i2s";
function = "gpio";
};
};
};

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// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (C) 2023 Loongson Technology Corporation Limited
*/
/dts-v1/;
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/clock/loongson,ls2k-clk.h>
#include <dt-bindings/gpio/gpio.h>
/ {
#address-cells = <2>;
#size-cells = <2>;
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu0: cpu@0 {
compatible = "loongson,la264";
device_type = "cpu";
reg= <0x0>;
clocks = <&clk LOONGSON2_NODE_CLK>;
};
cpu1: cpu@1 {
compatible = "loongson,la264";
device_type = "cpu";
reg = <0x1>;
clocks = <&clk LOONGSON2_NODE_CLK>;
};
};
ref_100m: clock-ref-100m {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <100000000>;
clock-output-names = "ref_100m";
};
cpuintc: interrupt-controller {
compatible = "loongson,cpu-interrupt-controller";
#interrupt-cells = <1>;
interrupt-controller;
};
/* i2c of the dvi eeprom edid */
i2c-gpio-0 {
compatible = "i2c-gpio";
scl-gpios = <&gpio0 0 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
sda-gpios = <&gpio0 1 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
i2c-gpio,delay-us = <5>; /* ~100 kHz */
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
/* i2c of the eeprom edid */
i2c-gpio-1 {
compatible = "i2c-gpio";
scl-gpios = <&gpio0 33 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
sda-gpios = <&gpio0 32 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
i2c-gpio,delay-us = <5>; /* ~100 kHz */
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
thermal-zones {
cpu-thermal {
polling-delay-passive = <1000>;
polling-delay = <5000>;
thermal-sensors = <&tsensor 0>;
trips {
cpu_alert: cpu-alert {
temperature = <33000>;
hysteresis = <2000>;
type = "active";
};
cpu_crit: cpu-crit {
temperature = <85000>;
hysteresis = <5000>;
type = "critical";
};
};
};
};
bus@10000000 {
compatible = "simple-bus";
ranges = <0x0 0x10000000 0x0 0x10000000 0x0 0x10000000>,
<0x0 0x02000000 0x0 0x02000000 0x0 0x02000000>,
<0x0 0x20000000 0x0 0x20000000 0x0 0x10000000>,
<0x0 0x40000000 0x0 0x40000000 0x0 0x40000000>,
<0xfe 0x0 0xfe 0x0 0x0 0x40000000>;
#address-cells = <2>;
#size-cells = <2>;
dma-coherent;
liointc0: interrupt-controller@1fe01400 {
compatible = "loongson,liointc-2.0";
reg = <0x0 0x1fe01400 0x0 0x40>,
<0x0 0x1fe01040 0x0 0x8>,
<0x0 0x1fe01140 0x0 0x8>;
reg-names = "main", "isr0", "isr1";
interrupt-controller;
#interrupt-cells = <2>;
interrupt-parent = <&cpuintc>;
interrupts = <2>;
interrupt-names = "int0";
loongson,parent_int_map = <0xffffffff>, /* int0 */
<0x00000000>, /* int1 */
<0x00000000>, /* int2 */
<0x00000000>; /* int3 */
};
liointc1: interrupt-controller@1fe01440 {
compatible = "loongson,liointc-2.0";
reg = <0x0 0x1fe01440 0x0 0x40>,
<0x0 0x1fe01048 0x0 0x8>,
<0x0 0x1fe01148 0x0 0x8>;
reg-names = "main", "isr0", "isr1";
interrupt-controller;
#interrupt-cells = <2>;
interrupt-parent = <&cpuintc>;
interrupts = <3>;
interrupt-names = "int1";
loongson,parent_int_map = <0x00000000>, /* int0 */
<0xffffffff>, /* int1 */
<0x00000000>, /* int2 */
<0x00000000>; /* int3 */
};
chipid@1fe00000 {
compatible = "loongson,ls2k-chipid";
reg = <0x0 0x1fe00000 0x0 0x30>;
little-endian;
};
pctrl: pinctrl@1fe00420 {
compatible = "loongson,ls2k-pinctrl";
reg = <0x0 0x1fe00420 0x0 0x18>;
status = "disabled";
};
clk: clock-controller@1fe00480 {
compatible = "loongson,ls2k-clk";
reg = <0x0 0x1fe00480 0x0 0x58>;
#clock-cells = <1>;
clocks = <&ref_100m>;
clock-names = "ref_100m";
status = "disabled";
};
gpio0: gpio@1fe00500 {
compatible = "loongson,ls2k-gpio";
reg = <0x0 0x1fe00500 0x0 0x38>;
ngpios = <64>;
#gpio-cells = <2>;
gpio-controller;
gpio-ranges = <&pctrl 0x0 0x0 15>,
<&pctrl 16 16 15>,
<&pctrl 32 32 10>,
<&pctrl 44 44 20>;
interrupt-parent = <&liointc1>;
interrupts = <28 IRQ_TYPE_LEVEL_HIGH>,
<29 IRQ_TYPE_LEVEL_HIGH>,
<30 IRQ_TYPE_LEVEL_HIGH>,
<30 IRQ_TYPE_LEVEL_HIGH>,
<26 IRQ_TYPE_LEVEL_HIGH>,
<26 IRQ_TYPE_LEVEL_HIGH>,
<26 IRQ_TYPE_LEVEL_HIGH>,
<26 IRQ_TYPE_LEVEL_HIGH>,
<26 IRQ_TYPE_LEVEL_HIGH>,
<26 IRQ_TYPE_LEVEL_HIGH>,
<26 IRQ_TYPE_LEVEL_HIGH>,
<26 IRQ_TYPE_LEVEL_HIGH>,
<26 IRQ_TYPE_LEVEL_HIGH>,
<26 IRQ_TYPE_LEVEL_HIGH>,
<26 IRQ_TYPE_LEVEL_HIGH>,
<>,
<26 IRQ_TYPE_LEVEL_HIGH>,
<26 IRQ_TYPE_LEVEL_HIGH>,
<26 IRQ_TYPE_LEVEL_HIGH>,
<26 IRQ_TYPE_LEVEL_HIGH>,
<26 IRQ_TYPE_LEVEL_HIGH>,
<26 IRQ_TYPE_LEVEL_HIGH>,
<26 IRQ_TYPE_LEVEL_HIGH>,
<26 IRQ_TYPE_LEVEL_HIGH>,
<26 IRQ_TYPE_LEVEL_HIGH>,
<26 IRQ_TYPE_LEVEL_HIGH>,
<26 IRQ_TYPE_LEVEL_HIGH>,
<26 IRQ_TYPE_LEVEL_HIGH>,
<26 IRQ_TYPE_LEVEL_HIGH>,
<26 IRQ_TYPE_LEVEL_HIGH>,
<26 IRQ_TYPE_LEVEL_HIGH>,
<26 IRQ_TYPE_LEVEL_HIGH>,
<27 IRQ_TYPE_LEVEL_HIGH>,
<27 IRQ_TYPE_LEVEL_HIGH>,
<27 IRQ_TYPE_LEVEL_HIGH>,
<27 IRQ_TYPE_LEVEL_HIGH>,
<27 IRQ_TYPE_LEVEL_HIGH>,
<>,
<27 IRQ_TYPE_LEVEL_HIGH>,
<27 IRQ_TYPE_LEVEL_HIGH>,
<27 IRQ_TYPE_LEVEL_HIGH>,
<27 IRQ_TYPE_LEVEL_HIGH>,
<>,
<>,
<27 IRQ_TYPE_LEVEL_HIGH>,
<27 IRQ_TYPE_LEVEL_HIGH>,
<27 IRQ_TYPE_LEVEL_HIGH>,
<27 IRQ_TYPE_LEVEL_HIGH>,
<27 IRQ_TYPE_LEVEL_HIGH>,
<27 IRQ_TYPE_LEVEL_HIGH>,
<27 IRQ_TYPE_LEVEL_HIGH>,
<27 IRQ_TYPE_LEVEL_HIGH>,
<27 IRQ_TYPE_LEVEL_HIGH>,
<27 IRQ_TYPE_LEVEL_HIGH>,
<27 IRQ_TYPE_LEVEL_HIGH>,
<27 IRQ_TYPE_LEVEL_HIGH>,
<27 IRQ_TYPE_LEVEL_HIGH>,
<27 IRQ_TYPE_LEVEL_HIGH>,
<27 IRQ_TYPE_LEVEL_HIGH>,
<27 IRQ_TYPE_LEVEL_HIGH>,
<27 IRQ_TYPE_LEVEL_HIGH>,
<27 IRQ_TYPE_LEVEL_HIGH>,
<27 IRQ_TYPE_LEVEL_HIGH>,
<27 IRQ_TYPE_LEVEL_HIGH>;
};
tsensor: thermal-sensor@1fe01500 {
compatible = "loongson,ls2k1000-thermal";
reg = <0x0 0x1fe01500 0x0 0x30>;
interrupt-parent = <&liointc0>;
interrupts = <7 IRQ_TYPE_LEVEL_HIGH>;
#thermal-sensor-cells = <1>;
};
dma-controller@1fe00c00 {
compatible = "loongson,ls2k1000-apbdma";
reg = <0x0 0x1fe00c00 0x0 0x8>;
interrupt-parent = <&liointc1>;
interrupts = <12 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk LOONGSON2_APB_CLK>;
#dma-cells = <1>;
status = "disabled";
};
dma-controller@1fe00c10 {
compatible = "loongson,ls2k1000-apbdma";
reg = <0x0 0x1fe00c10 0x0 0x8>;
interrupt-parent = <&liointc1>;
interrupts = <13 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk LOONGSON2_APB_CLK>;
#dma-cells = <1>;
status = "disabled";
};
dma-controller@1fe00c20 {
compatible = "loongson,ls2k1000-apbdma";
reg = <0x0 0x1fe00c20 0x0 0x8>;
interrupt-parent = <&liointc1>;
interrupts = <14 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk LOONGSON2_APB_CLK>;
#dma-cells = <1>;
status = "disabled";
};
dma-controller@1fe00c30 {
compatible = "loongson,ls2k1000-apbdma";
reg = <0x0 0x1fe00c30 0x0 0x8>;
interrupt-parent = <&liointc1>;
interrupts = <15 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk LOONGSON2_APB_CLK>;
#dma-cells = <1>;
status = "disabled";
};
dma-controller@1fe00c40 {
compatible = "loongson,ls2k1000-apbdma";
reg = <0x0 0x1fe00c40 0x0 0x8>;
interrupt-parent = <&liointc1>;
interrupts = <16 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk LOONGSON2_APB_CLK>;
#dma-cells = <1>;
status = "disabled";
};
uart0: serial@1fe20000 {
compatible = "ns16550a";
reg = <0x0 0x1fe20000 0x0 0x10>;
clock-frequency = <125000000>;
interrupt-parent = <&liointc0>;
interrupts = <0x0 IRQ_TYPE_LEVEL_HIGH>;
no-loopback-test;
status = "disabled";
};
i2c2: i2c@1fe21000 {
compatible = "loongson,ls2k-i2c";
reg = <0x0 0x1fe21000 0x0 0x8>;
interrupt-parent = <&liointc0>;
interrupts = <22 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
i2c3: i2c@1fe21800 {
compatible = "loongson,ls2k-i2c";
reg = <0x0 0x1fe21800 0x0 0x8>;
interrupt-parent = <&liointc0>;
interrupts = <23 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
pmc: power-management@1fe27000 {
compatible = "loongson,ls2k1000-pmc", "loongson,ls2k0500-pmc", "syscon";
reg = <0x0 0x1fe27000 0x0 0x58>;
interrupt-parent = <&liointc1>;
interrupts = <11 IRQ_TYPE_LEVEL_HIGH>;
loongson,suspend-address = <0x0 0x1c000500>;
syscon-reboot {
compatible = "syscon-reboot";
offset = <0x30>;
mask = <0x1>;
};
syscon-poweroff {
compatible = "syscon-poweroff";
regmap = <&pmc>;
offset = <0x14>;
mask = <0x3c00>;
value = <0x3c00>;
};
};
rtc0: rtc@1fe27800 {
compatible = "loongson,ls2k1000-rtc";
reg = <0x0 0x1fe27800 0x0 0x100>;
interrupt-parent = <&liointc1>;
interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
spi0: spi@1fff0220 {
compatible = "loongson,ls2k1000-spi";
reg = <0x0 0x1fff0220 0x0 0x10>;
clocks = <&clk LOONGSON2_BOOT_CLK>;
status = "disabled";
};
pcie@1a000000 {
compatible = "loongson,ls2k-pci";
reg = <0x0 0x1a000000 0x0 0x02000000>,
<0xfe 0x0 0x0 0x20000000>;
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
bus-range = <0x0 0xff>;
ranges = <0x01000000 0x0 0x00008000 0x0 0x18008000 0x0 0x00008000>,
<0x02000000 0x0 0x60000000 0x0 0x60000000 0x0 0x20000000>;
gmac0: ethernet@3,0 {
reg = <0x1800 0x0 0x0 0x0 0x0>;
interrupt-parent = <&liointc0>;
interrupts = <12 IRQ_TYPE_LEVEL_HIGH>,
<13 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "macirq", "eth_lpi";
status = "disabled";
};
gmac1: ethernet@3,1 {
reg = <0x1900 0x0 0x0 0x0 0x0>;
interrupt-parent = <&liointc0>;
interrupts = <14 IRQ_TYPE_LEVEL_HIGH>,
<15 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "macirq", "eth_lpi";
status = "disabled";
};
ehci0: usb@4,1 {
reg = <0x2100 0x0 0x0 0x0 0x0>;
interrupt-parent = <&liointc1>;
interrupts = <18 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
ohci0: usb@4,2 {
reg = <0x2200 0x0 0x0 0x0 0x0>;
interrupt-parent = <&liointc1>;
interrupts = <19 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
display@6,0 {
reg = <0x3000 0x0 0x0 0x0 0x0>;
interrupt-parent = <&liointc0>;
interrupts = <28 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
hda@7,0 {
reg = <0x3800 0x0 0x0 0x0 0x0>;
interrupt-parent = <&liointc0>;
interrupts = <4 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
sata: sata@8,0 {
reg = <0x4000 0x0 0x0 0x0 0x0>;
interrupt-parent = <&liointc0>;
interrupts = <19 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
pcie@9,0 {
reg = <0x4800 0x0 0x0 0x0 0x0>;
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
#interrupt-cells = <1>;
interrupt-map-mask = <0x0 0x0 0x0 0x0>;
interrupt-map = <0x0 0x0 0x0 0x0 &liointc1 0x0 IRQ_TYPE_LEVEL_HIGH>;
ranges;
};
pcie@a,0 {
reg = <0x5000 0x0 0x0 0x0 0x0>;
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
interrupt-parent = <&liointc1>;
#interrupt-cells = <1>;
interrupt-map-mask = <0x0 0x0 0x0 0x0>;
interrupt-map = <0x0 0x0 0x0 0x0 &liointc1 1 IRQ_TYPE_LEVEL_HIGH>;
ranges;
};
pcie@b,0 {
reg = <0x5800 0x0 0x0 0x0 0x0>;
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
interrupt-parent = <&liointc1>;
#interrupt-cells = <1>;
interrupt-map-mask = <0x0 0x0 0x0 0x0>;
interrupt-map = <0x0 0x0 0x0 0x0 &liointc1 2 IRQ_TYPE_LEVEL_HIGH>;
ranges;
};
pcie@c,0 {
reg = <0x6000 0x0 0x0 0x0 0x0>;
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
interrupt-parent = <&liointc1>;
#interrupt-cells = <1>;
interrupt-map-mask = <0x0 0x0 0x0 0x0>;
interrupt-map = <0x0 0x0 0x0 0x0 &liointc1 3 IRQ_TYPE_LEVEL_HIGH>;
ranges;
};
pcie@d,0 {
reg = <0x6800 0x0 0x0 0x0 0x0>;
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
interrupt-parent = <&liointc1>;
#interrupt-cells = <1>;
interrupt-map-mask = <0x0 0x0 0x0 0x0>;
interrupt-map = <0x0 0x0 0x0 0x0 &liointc1 4 IRQ_TYPE_LEVEL_HIGH>;
ranges;
};
pcie@e,0 {
reg = <0x7000 0x0 0x0 0x0 0x0>;
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
interrupt-parent = <&liointc1>;
#interrupt-cells = <1>;
interrupt-map-mask = <0x0 0x0 0x0 0x0>;
interrupt-map = <0x0 0x0 0x0 0x0 &liointc1 5 IRQ_TYPE_LEVEL_HIGH>;
ranges;
};
};
};
};

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// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (C) 2023 Loongson Technology Corporation Limited
*/
/dts-v1/;
#include "loongson-2k2000.dtsi"
/ {
compatible = "loongson,ls2k2000-ref", "loongson,ls2k2000";
model = "Loongson-2K2000 Reference Board";
aliases {
serial0 = &uart0;
};
chosen {
stdout-path = "serial0:115200n8";
};
memory@200000 {
device_type = "memory";
reg = <0x0 0x00200000 0x0 0x0ee00000>,
<0x0 0x90000000 0x0 0x70000000>;
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
linux,cma {
compatible = "shared-dma-pool";
reusable;
size = <0x0 0x2000000>;
linux,cma-default;
};
};
};
&sata {
status = "okay";
};
&uart0 {
status = "okay";
};
&rtc0 {
status = "okay";
};
&xhci0 {
status = "okay";
};
&xhci1 {
status = "okay";
};
&gmac0 {
status = "okay";
};
&gmac1 {
status = "okay";
};
&gmac2 {
status = "okay";
};

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// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (C) 2023 Loongson Technology Corporation Limited
*/
/dts-v1/;
#include <dt-bindings/interrupt-controller/irq.h>
/ {
#address-cells = <2>;
#size-cells = <2>;
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu0: cpu@1 {
compatible = "loongson,la364";
device_type = "cpu";
reg = <0x0>;
clocks = <&cpu_clk>;
};
cpu1: cpu@2 {
compatible = "loongson,la364";
device_type = "cpu";
reg = <0x1>;
clocks = <&cpu_clk>;
};
};
cpu_clk: cpu-clk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <1400000000>;
};
cpuintc: interrupt-controller {
compatible = "loongson,cpu-interrupt-controller";
#interrupt-cells = <1>;
interrupt-controller;
};
bus@10000000 {
compatible = "simple-bus";
ranges = <0x0 0x10000000 0x0 0x10000000 0x0 0x10000000>,
<0x0 0x02000000 0x0 0x02000000 0x0 0x02000000>,
<0x0 0x40000000 0x0 0x40000000 0x0 0x40000000>,
<0xfe 0x0 0xfe 0x0 0x0 0x40000000>;
#address-cells = <2>;
#size-cells = <2>;
pmc: power-management@100d0000 {
compatible = "loongson,ls2k2000-pmc", "loongson,ls2k0500-pmc", "syscon";
reg = <0x0 0x100d0000 0x0 0x58>;
interrupt-parent = <&eiointc>;
interrupts = <47>;
loongson,suspend-address = <0x0 0x1c000500>;
syscon-reboot {
compatible = "syscon-reboot";
offset = <0x30>;
mask = <0x1>;
};
syscon-poweroff {
compatible = "syscon-poweroff";
regmap = <&pmc>;
offset = <0x14>;
mask = <0x3c00>;
value = <0x3c00>;
};
};
liointc: interrupt-controller@1fe01400 {
compatible = "loongson,liointc-1.0";
reg = <0x0 0x1fe01400 0x0 0x64>;
interrupt-controller;
#interrupt-cells = <2>;
interrupt-parent = <&cpuintc>;
interrupts = <2>;
interrupt-names = "int0";
loongson,parent_int_map = <0xffffffff>, /* int0 */
<0x00000000>, /* int1 */
<0x00000000>, /* int2 */
<0x00000000>; /* int3 */
};
eiointc: interrupt-controller@1fe01600 {
compatible = "loongson,ls2k2000-eiointc";
reg = <0x0 0x1fe01600 0x0 0xea00>;
interrupt-controller;
#interrupt-cells = <1>;
interrupt-parent = <&cpuintc>;
interrupts = <3>;
};
pic: interrupt-controller@10000000 {
compatible = "loongson,pch-pic-1.0";
reg = <0x0 0x10000000 0x0 0x400>;
interrupt-controller;
#interrupt-cells = <2>;
loongson,pic-base-vec = <0>;
interrupt-parent = <&eiointc>;
};
msi: msi-controller@1fe01140 {
compatible = "loongson,pch-msi-1.0";
reg = <0x0 0x1fe01140 0x0 0x8>;
msi-controller;
loongson,msi-base-vec = <64>;
loongson,msi-num-vecs = <192>;
interrupt-parent = <&eiointc>;
};
rtc0: rtc@100d0100 {
compatible = "loongson,ls2k2000-rtc", "loongson,ls7a-rtc";
reg = <0x0 0x100d0100 0x0 0x100>;
interrupt-parent = <&pic>;
interrupts = <52 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
uart0: serial@1fe001e0 {
compatible = "ns16550a";
reg = <0x0 0x1fe001e0 0x0 0x10>;
clock-frequency = <100000000>;
interrupt-parent = <&liointc>;
interrupts = <10 IRQ_TYPE_LEVEL_HIGH>;
no-loopback-test;
status = "disabled";
};
pcie@1a000000 {
compatible = "loongson,ls2k-pci";
reg = <0x0 0x1a000000 0x0 0x02000000>,
<0xfe 0x0 0x0 0x20000000>;
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
bus-range = <0x0 0xff>;
ranges = <0x01000000 0x0 0x00008000 0x0 0x18400000 0x0 0x00008000>,
<0x02000000 0x0 0x60000000 0x0 0x60000000 0x0 0x20000000>;
gmac0: ethernet@3,0 {
reg = <0x1800 0x0 0x0 0x0 0x0>;
interrupts = <12 IRQ_TYPE_LEVEL_HIGH>;
interrupt-parent = <&pic>;
status = "disabled";
};
gmac1: ethernet@3,1 {
reg = <0x1900 0x0 0x0 0x0 0x0>;
interrupts = <14 IRQ_TYPE_LEVEL_HIGH>;
interrupt-parent = <&pic>;
status = "disabled";
};
gmac2: ethernet@3,2 {
reg = <0x1a00 0x0 0x0 0x0 0x0>;
interrupts = <17 IRQ_TYPE_LEVEL_HIGH>;
interrupt-parent = <&pic>;
status = "disabled";
};
xhci0: usb@4,0 {
reg = <0x2000 0x0 0x0 0x0 0x0>;
interrupts = <48 IRQ_TYPE_LEVEL_HIGH>;
interrupt-parent = <&pic>;
status = "disabled";
};
xhci1: usb@19,0 {
reg = <0xc800 0x0 0x0 0x0 0x0>;
interrupts = <22 IRQ_TYPE_LEVEL_HIGH>;
interrupt-parent = <&pic>;
status = "disabled";
};
display@6,1 {
reg = <0x3100 0x0 0x0 0x0 0x0>;
interrupts = <28 IRQ_TYPE_LEVEL_HIGH>;
interrupt-parent = <&pic>;
status = "disabled";
};
hda@7,0 {
reg = <0x3800 0x0 0x0 0x0 0x0>;
interrupts = <58 IRQ_TYPE_LEVEL_HIGH>;
interrupt-parent = <&pic>;
status = "disabled";
};
sata: sata@8,0 {
reg = <0x4000 0x0 0x0 0x0 0x0>;
interrupts = <16 IRQ_TYPE_LEVEL_HIGH>;
interrupt-parent = <&pic>;
status = "disabled";
};
pcie@9,0 {
reg = <0x4800 0x0 0x0 0x0 0x0>;
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
interrupt-parent = <&pic>;
#interrupt-cells = <1>;
interrupt-map-mask = <0x0 0x0 0x0 0x0>;
interrupt-map = <0x0 0x0 0x0 0x0 &pic 32 IRQ_TYPE_LEVEL_HIGH>;
ranges;
};
pcie@a,0 {
reg = <0x5000 0x0 0x0 0x0 0x0>;
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
interrupt-parent = <&pic>;
#interrupt-cells = <1>;
interrupt-map-mask = <0x0 0x0 0x0 0x0>;
interrupt-map = <0x0 0x0 0x0 0x0 &pic 33 IRQ_TYPE_LEVEL_HIGH>;
ranges;
};
pcie@b,0 {
reg = <0x5800 0x0 0x0 0x0 0x0>;
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
interrupt-parent = <&pic>;
#interrupt-cells = <1>;
interrupt-map-mask = <0x0 0x0 0x0 0x0>;
interrupt-map = <0x0 0x0 0x0 0x0 &pic 34 IRQ_TYPE_LEVEL_HIGH>;
ranges;
};
pcie@c,0 {
reg = <0x6000 0x0 0x0 0x0 0x0>;
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
interrupt-parent = <&pic>;
#interrupt-cells = <1>;
interrupt-map-mask = <0x0 0x0 0x0 0x0>;
interrupt-map = <0x0 0x0 0x0 0x0 &pic 35 IRQ_TYPE_LEVEL_HIGH>;
ranges;
};
pcie@d,0 {
reg = <0x6800 0x0 0x0 0x0 0x0>;
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
interrupt-parent = <&pic>;
#interrupt-cells = <1>;
interrupt-map-mask = <0x0 0x0 0x0 0x0>;
interrupt-map = <0x0 0x0 0x0 0x0 &pic 36 IRQ_TYPE_LEVEL_HIGH>;
ranges;
};
pcie@e,0 {
reg = <0x7000 0x0 0x0 0x0 0x0>;
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
interrupt-parent = <&pic>;
#interrupt-cells = <1>;
interrupt-map-mask = <0x0 0x0 0x0 0x0>;
interrupt-map = <0x0 0x0 0x0 0x0 &pic 37 IRQ_TYPE_LEVEL_HIGH>;
ranges;
};
pcie@f,0 {
reg = <0x7800 0x0 0x0 0x0 0x0>;
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
interrupt-parent = <&pic>;
#interrupt-cells = <1>;
interrupt-map-mask = <0x0 0x0 0x0 0x0>;
interrupt-map = <0x0 0x0 0x0 0x0 &pic 40 IRQ_TYPE_LEVEL_HIGH>;
ranges;
};
pcie@10,0 {
reg = <0x8000 0x0 0x0 0x0 0x0>;
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
interrupt-parent = <&pic>;
#interrupt-cells = <1>;
interrupt-map-mask = <0x0 0x0 0x0 0x0>;
interrupt-map = <0x0 0x0 0x0 0x0 &pic 30 IRQ_TYPE_LEVEL_HIGH>;
ranges;
};
};
};
};

55
arch/loongarch/configs/loongson3_defconfig
View File

@ -6,6 +6,8 @@ CONFIG_HIGH_RES_TIMERS=y
CONFIG_BPF_SYSCALL=y
CONFIG_BPF_JIT=y
CONFIG_PREEMPT=y
CONFIG_PREEMPT_DYNAMIC=y
CONFIG_SCHED_CORE=y
CONFIG_BSD_PROCESS_ACCT=y
CONFIG_BSD_PROCESS_ACCT_V3=y
CONFIG_TASKSTATS=y
@ -19,6 +21,7 @@ CONFIG_BLK_CGROUP=y
CONFIG_CFS_BANDWIDTH=y
CONFIG_RT_GROUP_SCHED=y
CONFIG_CGROUP_PIDS=y
CONFIG_CGROUP_RDMA=y
CONFIG_CGROUP_FREEZER=y
CONFIG_CGROUP_HUGETLB=y
CONFIG_CPUSETS=y
@ -26,6 +29,7 @@ CONFIG_CGROUP_DEVICE=y
CONFIG_CGROUP_CPUACCT=y
CONFIG_CGROUP_PERF=y
CONFIG_CGROUP_BPF=y
CONFIG_CGROUP_MISC=y
CONFIG_NAMESPACES=y
CONFIG_USER_NS=y
CONFIG_CHECKPOINT_RESTORE=y
@ -35,6 +39,8 @@ CONFIG_BLK_DEV_INITRD=y
CONFIG_EXPERT=y
CONFIG_KALLSYMS_ALL=y
CONFIG_PERF_EVENTS=y
CONFIG_KEXEC=y
CONFIG_CRASH_DUMP=y
CONFIG_LOONGARCH=y
CONFIG_64BIT=y
CONFIG_MACH_LOONGSON64=y
@ -44,13 +50,11 @@ CONFIG_DMI=y
CONFIG_EFI=y
CONFIG_SMP=y
CONFIG_HOTPLUG_CPU=y
CONFIG_NR_CPUS=64
CONFIG_NR_CPUS=256
CONFIG_NUMA=y
CONFIG_CPU_HAS_FPU=y
CONFIG_CPU_HAS_LSX=y
CONFIG_CPU_HAS_LASX=y
CONFIG_KEXEC=y
CONFIG_CRASH_DUMP=y
CONFIG_RANDOMIZE_BASE=y
CONFIG_SUSPEND=y
CONFIG_HIBERNATION=y
@ -62,10 +66,6 @@ CONFIG_ACPI_IPMI=m
CONFIG_ACPI_HOTPLUG_CPU=y
CONFIG_ACPI_PCI_SLOT=y
CONFIG_ACPI_HOTPLUG_MEMORY=y
CONFIG_EFI_ZBOOT=y
CONFIG_EFI_GENERIC_STUB_INITRD_CMDLINE_LOADER=y
CONFIG_EFI_CAPSULE_LOADER=m
CONFIG_EFI_TEST=m
CONFIG_VIRTUALIZATION=y
CONFIG_KVM=m
CONFIG_JUMP_LABEL=y
@ -74,10 +74,18 @@ CONFIG_MODULE_FORCE_LOAD=y
CONFIG_MODULE_UNLOAD=y
CONFIG_MODULE_FORCE_UNLOAD=y
CONFIG_MODVERSIONS=y
CONFIG_BLK_DEV_ZONED=y
CONFIG_BLK_DEV_THROTTLING=y
CONFIG_BLK_DEV_THROTTLING_LOW=y
CONFIG_BLK_WBT=y
CONFIG_BLK_CGROUP_IOLATENCY=y
CONFIG_BLK_CGROUP_FC_APPID=y
CONFIG_BLK_CGROUP_IOCOST=y
CONFIG_BLK_CGROUP_IOPRIO=y
CONFIG_PARTITION_ADVANCED=y
CONFIG_BSD_DISKLABEL=y
CONFIG_UNIXWARE_DISKLABEL=y
CONFIG_CMDLINE_PARTITION=y
CONFIG_IOSCHED_BFQ=y
CONFIG_BFQ_GROUP_IOSCHED=y
CONFIG_BINFMT_MISC=m
@ -93,6 +101,8 @@ CONFIG_MEMORY_HOTPLUG_DEFAULT_ONLINE=y
CONFIG_MEMORY_HOTREMOVE=y
CONFIG_KSM=y
CONFIG_TRANSPARENT_HUGEPAGE=y
CONFIG_CMA=y
CONFIG_CMA_SYSFS=y
CONFIG_USERFAULTFD=y
CONFIG_NET=y
CONFIG_PACKET=y
@ -128,6 +138,7 @@ CONFIG_IPV6_ROUTER_PREF=y
CONFIG_IPV6_ROUTE_INFO=y
CONFIG_INET6_ESP=m
CONFIG_IPV6_MROUTE=y
CONFIG_MPTCP=y
CONFIG_NETWORK_PHY_TIMESTAMPING=y
CONFIG_NETFILTER=y
CONFIG_BRIDGE_NETFILTER=m
@ -352,6 +363,7 @@ CONFIG_PCIEAER=y
CONFIG_PCI_IOV=y
CONFIG_HOTPLUG_PCI=y
CONFIG_HOTPLUG_PCI_SHPC=y
CONFIG_PCI_HOST_GENERIC=y
CONFIG_PCCARD=m
CONFIG_YENTA=m
CONFIG_RAPIDIO=y
@ -365,6 +377,10 @@ CONFIG_DEVTMPFS=y
CONFIG_DEVTMPFS_MOUNT=y
CONFIG_FW_LOADER_COMPRESS=y
CONFIG_FW_LOADER_COMPRESS_ZSTD=y
CONFIG_EFI_ZBOOT=y
CONFIG_EFI_BOOTLOADER_CONTROL=m
CONFIG_EFI_CAPSULE_LOADER=m
CONFIG_EFI_TEST=m
CONFIG_MTD=m
CONFIG_MTD_BLOCK=m
CONFIG_MTD_CFI=m
@ -586,6 +602,7 @@ CONFIG_RTW89_8852AE=m
CONFIG_RTW89_8852CE=m
CONFIG_ZD1211RW=m
CONFIG_USB_NET_RNDIS_WLAN=m
CONFIG_USB4_NET=m
CONFIG_INPUT_MOUSEDEV=y
CONFIG_INPUT_MOUSEDEV_PSAUX=y
CONFIG_INPUT_EVDEV=y
@ -691,6 +708,9 @@ CONFIG_SND_HDA_CODEC_SIGMATEL=y
CONFIG_SND_HDA_CODEC_HDMI=y
CONFIG_SND_HDA_CODEC_CONEXANT=y
CONFIG_SND_USB_AUDIO=m
CONFIG_SND_SOC=m
CONFIG_SND_SOC_LOONGSON_CARD=m
CONFIG_SND_VIRTIO=m
CONFIG_HIDRAW=y
CONFIG_UHID=m
CONFIG_HID_A4TECH=m
@ -738,6 +758,11 @@ CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_EFI=y
CONFIG_RTC_DRV_LOONGSON=y
CONFIG_DMADEVICES=y
CONFIG_LS2X_APB_DMA=y
CONFIG_UDMABUF=y
CONFIG_DMABUF_HEAPS=y
CONFIG_DMABUF_HEAPS_SYSTEM=y
CONFIG_DMABUF_HEAPS_CMA=y
CONFIG_UIO=m
CONFIG_UIO_PDRV_GENIRQ=m
CONFIG_UIO_DMEM_GENIRQ=m
@ -778,7 +803,15 @@ CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND=y
CONFIG_DEVFREQ_GOV_PERFORMANCE=y
CONFIG_DEVFREQ_GOV_POWERSAVE=y
CONFIG_DEVFREQ_GOV_USERSPACE=y
CONFIG_NTB=m
CONFIG_NTB_MSI=y
CONFIG_NTB_IDT=m
CONFIG_NTB_EPF=m
CONFIG_NTB_SWITCHTEC=m
CONFIG_NTB_PERF=m
CONFIG_NTB_TRANSPORT=m
CONFIG_PWM=y
CONFIG_USB4=y
CONFIG_EXT2_FS=y
CONFIG_EXT2_FS_XATTR=y
CONFIG_EXT2_FS_POSIX_ACL=y
@ -797,6 +830,10 @@ CONFIG_GFS2_FS_LOCKING_DLM=y
CONFIG_OCFS2_FS=m
CONFIG_BTRFS_FS=y
CONFIG_BTRFS_FS_POSIX_ACL=y
CONFIG_F2FS_FS=m
CONFIG_F2FS_FS_SECURITY=y
CONFIG_F2FS_CHECK_FS=y
CONFIG_F2FS_FS_COMPRESSION=y
CONFIG_FANOTIFY=y
CONFIG_FANOTIFY_ACCESS_PERMISSIONS=y
CONFIG_QUOTA=y
@ -883,7 +920,6 @@ CONFIG_KEY_DH_OPERATIONS=y
CONFIG_SECURITY=y
CONFIG_SECURITY_SELINUX=y
CONFIG_SECURITY_SELINUX_BOOTPARAM=y
CONFIG_SECURITY_SELINUX_DISABLE=y
CONFIG_SECURITY_APPARMOR=y
CONFIG_SECURITY_YAMA=y
CONFIG_DEFAULT_SECURITY_DAC=y
@ -914,6 +950,9 @@ CONFIG_CRYPTO_USER_API_RNG=m
CONFIG_CRYPTO_USER_API_AEAD=m
CONFIG_CRYPTO_CRC32_LOONGARCH=m
CONFIG_CRYPTO_DEV_VIRTIO=m
CONFIG_DMA_CMA=y
CONFIG_DMA_NUMA_CMA=y
CONFIG_CMA_SIZE_MBYTES=0
CONFIG_PRINTK_TIME=y
CONFIG_STRIP_ASM_SYMS=y
CONFIG_MAGIC_SYSRQ=y

6
arch/loongarch/include/asm/bootinfo.h
View File

@ -24,13 +24,15 @@ struct loongson_board_info {
const char *board_vendor;
};
#define NR_WORDS DIV_ROUND_UP(NR_CPUS, BITS_PER_LONG)
struct loongson_system_configuration {
int nr_cpus;
int nr_nodes;
int boot_cpu_id;
int cores_per_node;
int cores_per_package;
unsigned long cores_io_master;
unsigned long cores_io_master[NR_WORDS];
unsigned long suspend_addr;
const char *cpuname;
};
@ -42,7 +44,7 @@ extern struct loongson_system_configuration loongson_sysconf;
static inline bool io_master(int cpu)
{
return test_bit(cpu, &loongson_sysconf.cores_io_master);
return test_bit(cpu, loongson_sysconf.cores_io_master);
}
#endif /* _ASM_BOOTINFO_H */

12
arch/loongarch/include/asm/crash_core.h Normal file
View File

@ -0,0 +1,12 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#ifndef _LOONGARCH_CRASH_CORE_H
#define _LOONGARCH_CRASH_CORE_H
#define CRASH_ALIGN SZ_2M
#define CRASH_ADDR_LOW_MAX SZ_4G
#define CRASH_ADDR_HIGH_MAX memblock_end_of_DRAM()
extern phys_addr_t memblock_end_of_DRAM(void);
#endif

5
arch/loongarch/include/asm/elf.h
View File

@ -241,8 +241,6 @@ void loongarch_dump_regs64(u64 *uregs, const struct pt_regs *regs);
do { \
current->thread.vdso = &vdso_info; \
\
loongarch_set_personality_fcsr(state); \
\
if (personality(current->personality) != PER_LINUX) \
set_personality(PER_LINUX); \
} while (0)
@ -259,7 +257,6 @@ do { \
clear_thread_flag(TIF_32BIT_ADDR); \
\
current->thread.vdso = &vdso_info; \
loongarch_set_personality_fcsr(state); \
\
p = personality(current->personality); \
if (p != PER_LINUX32 && p != PER_LINUX) \
@ -340,6 +337,4 @@ extern int arch_elf_pt_proc(void *ehdr, void *phdr, struct file *elf,
extern int arch_check_elf(void *ehdr, bool has_interpreter, void *interp_ehdr,
struct arch_elf_state *state);
extern void loongarch_set_personality_fcsr(struct arch_elf_state *state);
#endif /* _ASM_ELF_H */

2
arch/loongarch/include/asm/ftrace.h
View File

@ -63,7 +63,7 @@ ftrace_regs_get_instruction_pointer(struct ftrace_regs *fregs)
static __always_inline void
ftrace_regs_set_instruction_pointer(struct ftrace_regs *fregs, unsigned long ip)
{
regs_set_return_value(&fregs->regs, ip);
instruction_pointer_set(&fregs->regs, ip);
}
#define ftrace_regs_get_argument(fregs, n) \

12
arch/loongarch/include/asm/shmparam.h
View File

@ -1,12 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (C) 2020-2022 Loongson Technology Corporation Limited
*/
#ifndef _ASM_SHMPARAM_H
#define _ASM_SHMPARAM_H
#define __ARCH_FORCE_SHMLBA 1
#define SHMLBA SZ_64K /* attach addr a multiple of this */
#endif /* _ASM_SHMPARAM_H */

2
arch/loongarch/kernel/acpi.c
View File

@ -119,7 +119,7 @@ acpi_parse_eio_master(union acpi_subtable_headers *header, const unsigned long e
return -EINVAL;
core = eiointc->node * CORES_PER_EIO_NODE;
set_bit(core, &(loongson_sysconf.cores_io_master));
set_bit(core, loongson_sysconf.cores_io_master);
return 0;
}

2
arch/loongarch/kernel/efi.c
View File

@ -140,4 +140,6 @@ void __init efi_init(void)
early_memunmap(tbl, sizeof(*tbl));
}
efi_esrt_init();
}

5
arch/loongarch/kernel/elf.c
View File

@ -23,8 +23,3 @@ int arch_check_elf(void *_ehdr, bool has_interpreter, void *_interp_ehdr,
{
return 0;
}
void loongarch_set_personality_fcsr(struct arch_elf_state *state)
{
current->thread.fpu.fcsr = boot_cpu_data.fpu_csr0;
}

34
arch/loongarch/kernel/env.c
View File

@ -5,13 +5,16 @@
* Copyright (C) 2020-2022 Loongson Technology Corporation Limited
*/
#include <linux/acpi.h>
#include <linux/clk.h>
#include <linux/efi.h>
#include <linux/export.h>
#include <linux/memblock.h>
#include <linux/of_clk.h>
#include <asm/early_ioremap.h>
#include <asm/bootinfo.h>
#include <asm/loongson.h>
#include <asm/setup.h>
#include <asm/time.h>
u64 efi_system_table;
struct loongson_system_configuration loongson_sysconf;
@ -36,7 +39,16 @@ void __init init_environ(void)
static int __init init_cpu_fullname(void)
{
int cpu;
struct device_node *root;
int cpu, ret;
char *model;
/* Parsing cpuname from DTS model property */
root = of_find_node_by_path("/");
ret = of_property_read_string(root, "model", (const char **)&model);
of_node_put(root);
if (ret == 0)
loongson_sysconf.cpuname = strsep(&model, " ");
if (loongson_sysconf.cpuname && !strncmp(loongson_sysconf.cpuname, "Loongson", 8)) {
for (cpu = 0; cpu < NR_CPUS; cpu++)
@ -46,6 +58,26 @@ static int __init init_cpu_fullname(void)
}
arch_initcall(init_cpu_fullname);
static int __init fdt_cpu_clk_init(void)
{
struct clk *clk;
struct device_node *np;
np = of_get_cpu_node(0, NULL);
if (!np)
return -ENODEV;
clk = of_clk_get(np, 0);
if (IS_ERR(clk))
return -ENODEV;
cpu_clock_freq = clk_get_rate(clk);
clk_put(clk);
return 0;
}
late_initcall(fdt_cpu_clk_init);
static ssize_t boardinfo_show(struct kobject *kobj,
struct kobj_attribute *attr, char *buf)
{

10
arch/loongarch/kernel/head.S
View File

@ -74,6 +74,11 @@ SYM_CODE_START(kernel_entry) # kernel entry point
la.pcrel t0, fw_arg2
st.d a2, t0, 0
#ifdef CONFIG_PAGE_SIZE_4KB
li.d t0, 0
li.d t1, CSR_STFILL
csrxchg t0, t1, LOONGARCH_CSR_IMPCTL1
#endif
/* KSave3 used for percpu base, initialized as 0 */
csrwr zero, PERCPU_BASE_KS
/* GPR21 used for percpu base (runtime), initialized as 0 */
@ -126,6 +131,11 @@ SYM_CODE_START(smpboot_entry)
JUMP_VIRT_ADDR t0, t1
#ifdef CONFIG_PAGE_SIZE_4KB
li.d t0, 0
li.d t1, CSR_STFILL
csrxchg t0, t1, LOONGARCH_CSR_IMPCTL1
#endif
/* Enable PG */
li.w t0, 0xb0 # PLV=0, IE=0, PG=1
csrwr t0, LOONGARCH_CSR_CRMD

1
arch/loongarch/kernel/process.c
View File

@ -85,6 +85,7 @@ void start_thread(struct pt_regs *regs, unsigned long pc, unsigned long sp)
regs->csr_euen = euen;
lose_fpu(0);
lose_lbt(0);
current->thread.fpu.fcsr = boot_cpu_data.fpu_csr0;
clear_thread_flag(TIF_LSX_CTX_LIVE);
clear_thread_flag(TIF_LASX_CTX_LIVE);

56
arch/loongarch/kernel/setup.c
View File

@ -252,38 +252,23 @@ static void __init arch_reserve_vmcore(void)
#endif
}
/* 2MB alignment for crash kernel regions */
#define CRASH_ALIGN SZ_2M
#define CRASH_ADDR_MAX SZ_4G
static void __init arch_parse_crashkernel(void)
static void __init arch_reserve_crashkernel(void)
{
#ifdef CONFIG_KEXEC
int ret;
unsigned long long total_mem;
unsigned long long low_size = 0;
unsigned long long crash_base, crash_size;
char *cmdline = boot_command_line;
bool high = false;
total_mem = memblock_phys_mem_size();
ret = parse_crashkernel(boot_command_line, total_mem,
&crash_size, &crash_base,
NULL, NULL);
if (ret < 0 || crash_size <= 0)
if (!IS_ENABLED(CONFIG_KEXEC_CORE))
return;
if (crash_base <= 0) {
crash_base = memblock_phys_alloc_range(crash_size, CRASH_ALIGN, CRASH_ALIGN, CRASH_ADDR_MAX);
if (!crash_base) {
pr_warn("crashkernel reservation failed - No suitable area found.\n");
return;
}
} else if (!memblock_phys_alloc_range(crash_size, CRASH_ALIGN, crash_base, crash_base + crash_size)) {
pr_warn("Invalid memory region reserved for crash kernel\n");
ret = parse_crashkernel(cmdline, memblock_phys_mem_size(),
&crash_size, &crash_base, &low_size, &high);
if (ret)
return;
}
crashk_res.start = crash_base;
crashk_res.end = crash_base + crash_size - 1;
#endif
reserve_crashkernel_generic(cmdline, crash_size, crash_base, low_size, high);
}
static void __init fdt_setup(void)
@ -295,8 +280,12 @@ static void __init fdt_setup(void)
if (acpi_os_get_root_pointer())
return;
/* Look for a device tree configuration table entry */
fdt_pointer = efi_fdt_pointer();
/* Prefer to use built-in dtb, checking its legality first. */
if (!fdt_check_header(__dtb_start))
fdt_pointer = __dtb_start;
else
fdt_pointer = efi_fdt_pointer(); /* Fallback to firmware dtb */
if (!fdt_pointer || fdt_check_header(fdt_pointer))
return;
@ -330,7 +319,9 @@ static void __init bootcmdline_init(char **cmdline_p)
if (boot_command_line[0])
strlcat(boot_command_line, " ", COMMAND_LINE_SIZE);
strlcat(boot_command_line, init_command_line, COMMAND_LINE_SIZE);
if (!strstr(boot_command_line, init_command_line))
strlcat(boot_command_line, init_command_line, COMMAND_LINE_SIZE);
goto out;
}
#endif
@ -357,7 +348,7 @@ out:
void __init platform_init(void)
{
arch_reserve_vmcore();
arch_parse_crashkernel();
arch_reserve_crashkernel();
#ifdef CONFIG_ACPI_TABLE_UPGRADE
acpi_table_upgrade();
@ -467,15 +458,6 @@ static void __init resource_init(void)
request_resource(res, &data_resource);
request_resource(res, &bss_resource);
}
#ifdef CONFIG_KEXEC
if (crashk_res.start < crashk_res.end) {
insert_resource(&iomem_resource, &crashk_res);
pr_info("Reserving %ldMB of memory at %ldMB for crashkernel\n",
(unsigned long)((crashk_res.end - crashk_res.start + 1) >> 20),
(unsigned long)(crashk_res.start >> 20));
}
#endif
}
static int __init add_legacy_isa_io(struct fwnode_handle *fwnode,

5
arch/loongarch/kernel/smp.c
View File

@ -208,7 +208,7 @@ static void __init fdt_smp_setup(void)
}
loongson_sysconf.nr_cpus = num_processors;
set_bit(0, &(loongson_sysconf.cores_io_master));
set_bit(0, loongson_sysconf.cores_io_master);
#endif
}
@ -216,6 +216,9 @@ void __init loongson_smp_setup(void)
{
fdt_smp_setup();
if (loongson_sysconf.cores_per_package == 0)
loongson_sysconf.cores_per_package = num_processors;
cpu_data[0].core = cpu_logical_map(0) % loongson_sysconf.cores_per_package;
cpu_data[0].package = cpu_logical_map(0) / loongson_sysconf.cores_per_package;

10
arch/loongarch/net/bpf_jit.c
View File

@ -201,6 +201,11 @@ bool bpf_jit_supports_kfunc_call(void)
return true;
}
bool bpf_jit_supports_far_kfunc_call(void)
{
return true;
}
/* initialized on the first pass of build_body() */
static int out_offset = -1;
static int emit_bpf_tail_call(struct jit_ctx *ctx)
@ -465,7 +470,6 @@ static int build_insn(const struct bpf_insn *insn, struct jit_ctx *ctx, bool ext
const u8 dst = regmap[insn->dst_reg];
const s16 off = insn->off;
const s32 imm = insn->imm;
const u64 imm64 = (u64)(insn + 1)->imm << 32 | (u32)insn->imm;
const bool is32 = BPF_CLASS(insn->code) == BPF_ALU || BPF_CLASS(insn->code) == BPF_JMP32;
switch (code) {
@ -923,8 +927,12 @@ static int build_insn(const struct bpf_insn *insn, struct jit_ctx *ctx, bool ext
/* dst = imm64 */
case BPF_LD | BPF_IMM | BPF_DW:
{
const u64 imm64 = (u64)(insn + 1)->imm << 32 | (u32)insn->imm;
move_imm(ctx, dst, imm64, is32);
return 1;
}
/* dst = *(size *)(src + off) */
case BPF_LDX | BPF_MEM | BPF_B:

7
scripts/generate_rust_target.rs
View File

@ -161,6 +161,13 @@ fn main() {
ts.push("features", features);
ts.push("llvm-target", "x86_64-linux-gnu");
ts.push("target-pointer-width", "64");
} else if cfg.has("LOONGARCH") {
ts.push("arch", "loongarch64");
ts.push("data-layout", "e-m:e-p:64:64-i64:64-i128:128-n64-S128");
ts.push("features", "-f,-d");
ts.push("llvm-target", "loongarch64-linux-gnusf");
ts.push("llvm-abiname", "lp64s");
ts.push("target-pointer-width", "64");
} else {
panic!("Unsupported architecture");
}

2
scripts/min-tool-version.sh
View File

@ -26,6 +26,8 @@ gcc)
llvm)
if [ "$SRCARCH" = s390 ]; then
echo 15.0.0
elif [ "$SRCARCH" = loongarch ]; then
echo 18.0.0
else
echo 11.0.0
fi

19
scripts/mod/modpost.c
View File

@ -1345,6 +1345,14 @@ static Elf_Addr addend_mips_rel(uint32_t *location, unsigned int r_type)
#define R_LARCH_SUB32 55
#endif
#ifndef R_LARCH_RELAX
#define R_LARCH_RELAX 100
#endif
#ifndef R_LARCH_ALIGN
#define R_LARCH_ALIGN 102
#endif
static void get_rel_type_and_sym(struct elf_info *elf, uint64_t r_info,
unsigned int *r_type, unsigned int *r_sym)
{
@ -1399,9 +1407,16 @@ static void section_rela(struct module *mod, struct elf_info *elf,
continue;
break;
case EM_LOONGARCH:
if (!strcmp("__ex_table", fromsec) &&
r_type == R_LARCH_SUB32)
switch (r_type) {
case R_LARCH_SUB32:
if (!strcmp("__ex_table", fromsec))
continue;
break;
case R_LARCH_RELAX:
case R_LARCH_ALIGN:
/* These relocs do not refer to symbols */
continue;
}
break;
}