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pwm: stm32: Fix enable count for clk in .probe()
Make the driver take over hardware state without disabling in .probe()
and enable the clock for each enabled channel.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
[ukleinek: split off from a patch that also implemented .get_state()]
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Fixes: 7edf736920
("pwm: Add driver for STM32 plaftorm")
Reviewed-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
This commit is contained in:
parent
e56ec7b752
commit
19f1016ea9
@ -605,17 +605,21 @@ static void stm32_pwm_detect_complementary(struct stm32_pwm *priv)
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priv->have_complementary_output = (ccer != 0);
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}
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static unsigned int stm32_pwm_detect_channels(struct stm32_pwm *priv)
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static unsigned int stm32_pwm_detect_channels(struct stm32_pwm *priv,
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unsigned int *num_enabled)
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{
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u32 ccer;
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u32 ccer, ccer_backup;
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/*
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* If channels enable bits don't exist writing 1 will have no
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* effect so we can detect and count them.
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*/
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regmap_read(priv->regmap, TIM_CCER, &ccer_backup);
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regmap_set_bits(priv->regmap, TIM_CCER, TIM_CCER_CCXE);
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regmap_read(priv->regmap, TIM_CCER, &ccer);
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regmap_clear_bits(priv->regmap, TIM_CCER, TIM_CCER_CCXE);
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regmap_write(priv->regmap, TIM_CCER, ccer_backup);
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*num_enabled = hweight32(ccer_backup & TIM_CCER_CCXE);
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return hweight32(ccer & TIM_CCER_CCXE);
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}
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@ -626,6 +630,8 @@ static int stm32_pwm_probe(struct platform_device *pdev)
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struct device_node *np = dev->of_node;
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struct stm32_timers *ddata = dev_get_drvdata(pdev->dev.parent);
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struct stm32_pwm *priv;
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unsigned int num_enabled;
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unsigned int i;
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int ret;
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priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
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@ -648,7 +654,11 @@ static int stm32_pwm_probe(struct platform_device *pdev)
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priv->chip.dev = dev;
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priv->chip.ops = &stm32pwm_ops;
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priv->chip.npwm = stm32_pwm_detect_channels(priv);
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priv->chip.npwm = stm32_pwm_detect_channels(priv, &num_enabled);
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/* Initialize clock refcount to number of enabled PWM channels. */
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for (i = 0; i < num_enabled; i++)
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clk_enable(priv->clk);
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ret = devm_pwmchip_add(dev, &priv->chip);
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if (ret < 0)
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