2017-11-01 14:08:43 +00:00
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/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
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2008-10-23 05:26:29 +00:00
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#ifndef _ASM_X86_KVM_H
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#define _ASM_X86_KVM_H
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2007-11-19 23:06:31 +00:00
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/*
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* KVM x86 specific structures and definitions
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*
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*/
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2009-01-30 17:16:08 +00:00
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#include <linux/types.h>
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2007-11-19 23:06:31 +00:00
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#include <linux/ioctl.h>
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2017-03-31 11:53:23 +00:00
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#define KVM_PIO_PAGE_OFFSET 1
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#define KVM_COALESCED_MMIO_PAGE_OFFSET 2
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2012-09-17 08:31:13 +00:00
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#define DE_VECTOR 0
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#define DB_VECTOR 1
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#define BP_VECTOR 3
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#define OF_VECTOR 4
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#define BR_VECTOR 5
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#define UD_VECTOR 6
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#define NM_VECTOR 7
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#define DF_VECTOR 8
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#define TS_VECTOR 10
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#define NP_VECTOR 11
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#define SS_VECTOR 12
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#define GP_VECTOR 13
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#define PF_VECTOR 14
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#define MF_VECTOR 16
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2014-07-21 11:37:24 +00:00
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#define AC_VECTOR 17
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2012-09-17 08:31:13 +00:00
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#define MC_VECTOR 18
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2014-07-21 11:37:24 +00:00
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#define XM_VECTOR 19
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#define VE_VECTOR 20
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2012-09-17 08:31:13 +00:00
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2009-01-19 12:57:52 +00:00
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/* Select x86 specific features in <linux/kvm.h> */
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#define __KVM_HAVE_PIT
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#define __KVM_HAVE_IOAPIC
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2012-06-15 19:07:13 +00:00
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#define __KVM_HAVE_IRQ_LINE
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2009-01-19 12:57:52 +00:00
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#define __KVM_HAVE_MSI
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#define __KVM_HAVE_USER_NMI
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2009-01-19 12:57:52 +00:00
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#define __KVM_HAVE_GUEST_DEBUG
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KVM: Enable MSI-X for KVM assigned device
This patch finally enable MSI-X.
What we need for MSI-X:
1. Intercept one page in MMIO region of device. So that we can get guest desired
MSI-X table and set up the real one. Now this have been done by guest, and
transfer to kernel using ioctl KVM_SET_MSIX_NR and KVM_SET_MSIX_ENTRY.
2. Information for incoming interrupt. Now one device can have more than one
interrupt, and they are all handled by one workqueue structure. So we need to
identify them. The previous patch enable gsi_msg_pending_bitmap get this done.
3. Mapping from host IRQ to guest gsi as well as guest gsi to real MSI/MSI-X
message address/data. We used same entry number for the host and guest here, so
that it's easy to find the correlated guest gsi.
What we lack for now:
1. The PCI spec said nothing can existed with MSI-X table in the same page of
MMIO region, except pending bits. The patch ignore pending bits as the first
step (so they are always 0 - no pending).
2. The PCI spec allowed to change MSI-X table dynamically. That means, the OS
can enable MSI-X, then mask one MSI-X entry, modify it, and unmask it. The patch
didn't support this, and Linux also don't work in this way.
3. The patch didn't implement MSI-X mask all and mask single entry. I would
implement the former in driver/pci/msi.c later. And for single entry, userspace
should have reposibility to handle it.
Signed-off-by: Sheng Yang <sheng@linux.intel.com>
Signed-off-by: Avi Kivity <avi@redhat.com>
2009-02-25 09:22:28 +00:00
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#define __KVM_HAVE_MSIX
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2009-05-11 08:48:15 +00:00
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#define __KVM_HAVE_MCE
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2009-07-07 15:50:38 +00:00
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#define __KVM_HAVE_PIT_STATE2
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2009-10-15 22:21:43 +00:00
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#define __KVM_HAVE_XEN_HVM
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2009-11-12 00:04:25 +00:00
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#define __KVM_HAVE_VCPU_EVENTS
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2010-02-15 09:45:43 +00:00
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#define __KVM_HAVE_DEBUGREGS
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2010-06-13 09:29:39 +00:00
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#define __KVM_HAVE_XSAVE
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#define __KVM_HAVE_XCRS
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2012-08-21 03:02:51 +00:00
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#define __KVM_HAVE_READONLY_MEM
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2009-01-19 12:57:52 +00:00
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2007-11-19 23:06:36 +00:00
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/* Architectural interrupt line count. */
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#define KVM_NR_INTERRUPTS 256
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2007-11-19 23:06:31 +00:00
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struct kvm_memory_alias {
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__u32 slot; /* this has a different namespace than memory slots */
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__u32 flags;
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__u64 guest_phys_addr;
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__u64 memory_size;
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__u64 target_phys_addr;
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};
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2007-11-19 23:06:32 +00:00
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/* for KVM_GET_IRQCHIP and KVM_SET_IRQCHIP */
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struct kvm_pic_state {
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__u8 last_irr; /* edge detection */
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__u8 irr; /* interrupt request register */
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__u8 imr; /* interrupt mask register */
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__u8 isr; /* interrupt service register */
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__u8 priority_add; /* highest irq priority */
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__u8 irq_base;
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__u8 read_reg_select;
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__u8 poll;
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__u8 special_mask;
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__u8 init_state;
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__u8 auto_eoi;
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__u8 rotate_on_auto_eoi;
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__u8 special_fully_nested_mode;
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__u8 init4; /* true if 4 byte init */
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__u8 elcr; /* PIIX edge/trigger selection */
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__u8 elcr_mask;
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};
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#define KVM_IOAPIC_NUM_PINS 24
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struct kvm_ioapic_state {
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__u64 base_address;
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__u32 ioregsel;
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__u32 id;
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__u32 irr;
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__u32 pad;
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union {
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__u64 bits;
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struct {
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__u8 vector;
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__u8 delivery_mode:3;
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__u8 dest_mode:1;
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__u8 delivery_status:1;
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__u8 polarity:1;
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__u8 remote_irr:1;
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__u8 trig_mode:1;
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__u8 mask:1;
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__u8 reserve:7;
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__u8 reserved[4];
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__u8 dest_id;
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} fields;
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} redirtbl[KVM_IOAPIC_NUM_PINS];
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};
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#define KVM_IRQCHIP_PIC_MASTER 0
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#define KVM_IRQCHIP_PIC_SLAVE 1
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#define KVM_IRQCHIP_IOAPIC 2
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2009-08-24 08:54:21 +00:00
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#define KVM_NR_IRQCHIPS 3
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2007-11-19 23:06:32 +00:00
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2015-04-01 13:06:40 +00:00
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#define KVM_RUN_X86_SMM (1 << 0)
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2007-11-19 23:06:33 +00:00
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/* for KVM_GET_REGS and KVM_SET_REGS */
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struct kvm_regs {
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/* out (KVM_GET_REGS) / in (KVM_SET_REGS) */
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__u64 rax, rbx, rcx, rdx;
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__u64 rsi, rdi, rsp, rbp;
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__u64 r8, r9, r10, r11;
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__u64 r12, r13, r14, r15;
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__u64 rip, rflags;
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};
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2007-11-19 23:06:34 +00:00
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/* for KVM_GET_LAPIC and KVM_SET_LAPIC */
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#define KVM_APIC_REG_SIZE 0x400
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struct kvm_lapic_state {
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char regs[KVM_APIC_REG_SIZE];
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};
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2007-11-19 23:06:35 +00:00
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struct kvm_segment {
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__u64 base;
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__u32 limit;
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__u16 selector;
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__u8 type;
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__u8 present, dpl, db, s, l, g, avl;
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__u8 unusable;
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__u8 padding;
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};
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struct kvm_dtable {
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__u64 base;
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__u16 limit;
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__u16 padding[3];
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};
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2007-11-19 23:06:36 +00:00
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/* for KVM_GET_SREGS and KVM_SET_SREGS */
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struct kvm_sregs {
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/* out (KVM_GET_SREGS) / in (KVM_SET_SREGS) */
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struct kvm_segment cs, ds, es, fs, gs, ss;
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struct kvm_segment tr, ldt;
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struct kvm_dtable gdt, idt;
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__u64 cr0, cr2, cr3, cr4, cr8;
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__u64 efer;
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__u64 apic_base;
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__u64 interrupt_bitmap[(KVM_NR_INTERRUPTS + 63) / 64];
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};
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2008-01-08 07:04:50 +00:00
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/* for KVM_GET_FPU and KVM_SET_FPU */
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struct kvm_fpu {
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__u8 fpr[8][16];
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__u16 fcw;
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__u16 fsw;
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__u8 ftwx; /* in fxsave format */
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__u8 pad1;
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__u16 last_opcode;
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__u64 last_ip;
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__u64 last_dp;
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__u8 xmm[16][16];
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__u32 mxcsr;
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__u32 pad2;
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};
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2007-11-19 23:06:36 +00:00
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struct kvm_msr_entry {
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__u32 index;
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__u32 reserved;
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__u64 data;
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};
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/* for KVM_GET_MSRS and KVM_SET_MSRS */
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struct kvm_msrs {
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__u32 nmsrs; /* number of msrs in entries */
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__u32 pad;
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struct kvm_msr_entry entries[0];
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};
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/* for KVM_GET_MSR_INDEX_LIST */
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struct kvm_msr_list {
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__u32 nmsrs; /* number of msrs in entries */
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__u32 indices[0];
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};
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2007-11-19 23:06:37 +00:00
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struct kvm_cpuid_entry {
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__u32 function;
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__u32 eax;
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__u32 ebx;
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__u32 ecx;
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__u32 edx;
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__u32 padding;
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};
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/* for KVM_SET_CPUID */
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struct kvm_cpuid {
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__u32 nent;
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__u32 padding;
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struct kvm_cpuid_entry entries[0];
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};
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2007-11-21 15:10:04 +00:00
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struct kvm_cpuid_entry2 {
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__u32 function;
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__u32 index;
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__u32 flags;
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__u32 eax;
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__u32 ebx;
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__u32 ecx;
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__u32 edx;
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__u32 padding[3];
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};
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2016-05-05 08:18:23 +00:00
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#define KVM_CPUID_FLAG_SIGNIFCANT_INDEX (1 << 0)
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#define KVM_CPUID_FLAG_STATEFUL_FUNC (1 << 1)
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#define KVM_CPUID_FLAG_STATE_READ_NEXT (1 << 2)
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2007-11-21 15:10:04 +00:00
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/* for KVM_SET_CPUID2 */
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struct kvm_cpuid2 {
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__u32 nent;
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__u32 padding;
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struct kvm_cpuid_entry2 entries[0];
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};
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2007-11-19 23:06:37 +00:00
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2008-03-03 16:50:59 +00:00
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/* for KVM_GET_PIT and KVM_SET_PIT */
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struct kvm_pit_channel_state {
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__u32 count; /* can be 65536 */
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__u16 latched_count;
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__u8 count_latched;
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__u8 status_latched;
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__u8 status;
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__u8 read_state;
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__u8 write_state;
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__u8 write_latch;
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__u8 rw_mode;
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__u8 mode;
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__u8 bcd;
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__u8 gate;
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__s64 count_load_time;
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};
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2008-12-15 12:52:10 +00:00
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struct kvm_debug_exit_arch {
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__u32 exception;
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__u32 pad;
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__u64 pc;
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__u64 dr6;
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__u64 dr7;
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};
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#define KVM_GUESTDBG_USE_SW_BP 0x00010000
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#define KVM_GUESTDBG_USE_HW_BP 0x00020000
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#define KVM_GUESTDBG_INJECT_DB 0x00040000
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#define KVM_GUESTDBG_INJECT_BP 0x00080000
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/* for KVM_SET_GUEST_DEBUG */
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struct kvm_guest_debug_arch {
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__u64 debugreg[8];
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};
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2008-03-03 16:50:59 +00:00
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struct kvm_pit_state {
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struct kvm_pit_channel_state channels[3];
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};
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2008-12-30 17:55:06 +00:00
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2009-07-07 15:50:38 +00:00
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#define KVM_PIT_FLAGS_HPET_LEGACY 0x00000001
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struct kvm_pit_state2 {
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struct kvm_pit_channel_state channels[3];
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__u32 flags;
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__u32 reserved[9];
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};
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2008-12-30 17:55:06 +00:00
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struct kvm_reinject_control {
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__u8 pit_reinject;
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__u8 reserved[31];
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};
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2009-11-12 00:04:25 +00:00
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2009-12-06 17:24:15 +00:00
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/* When set in flags, include corresponding fields on KVM_SET_VCPU_EVENTS */
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#define KVM_VCPUEVENT_VALID_NMI_PENDING 0x00000001
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#define KVM_VCPUEVENT_VALID_SIPI_VECTOR 0x00000002
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2010-02-19 18:38:07 +00:00
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#define KVM_VCPUEVENT_VALID_SHADOW 0x00000004
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2015-04-01 13:06:40 +00:00
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#define KVM_VCPUEVENT_VALID_SMM 0x00000008
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2018-10-16 21:29:20 +00:00
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#define KVM_VCPUEVENT_VALID_PAYLOAD 0x00000010
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2010-02-19 18:38:07 +00:00
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/* Interrupt shadow states */
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#define KVM_X86_SHADOW_INT_MOV_SS 0x01
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#define KVM_X86_SHADOW_INT_STI 0x02
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2009-12-06 17:24:15 +00:00
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2009-11-12 00:04:25 +00:00
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/* for KVM_GET/SET_VCPU_EVENTS */
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struct kvm_vcpu_events {
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struct {
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__u8 injected;
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__u8 nr;
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__u8 has_error_code;
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2018-10-16 21:29:20 +00:00
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__u8 pending;
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2009-11-12 00:04:25 +00:00
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__u32 error_code;
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} exception;
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struct {
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__u8 injected;
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__u8 nr;
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__u8 soft;
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2010-02-19 18:38:07 +00:00
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__u8 shadow;
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2009-11-12 00:04:25 +00:00
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} interrupt;
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struct {
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__u8 injected;
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__u8 pending;
|
|
|
|
__u8 masked;
|
|
|
|
__u8 pad;
|
|
|
|
} nmi;
|
|
|
|
__u32 sipi_vector;
|
|
|
|
__u32 flags;
|
2015-04-01 13:06:40 +00:00
|
|
|
struct {
|
|
|
|
__u8 smm;
|
|
|
|
__u8 pending;
|
|
|
|
__u8 smm_inside_nmi;
|
|
|
|
__u8 latched_init;
|
|
|
|
} smi;
|
2018-10-16 21:29:20 +00:00
|
|
|
__u8 reserved[27];
|
|
|
|
__u8 exception_has_payload;
|
|
|
|
__u64 exception_payload;
|
2009-11-12 00:04:25 +00:00
|
|
|
};
|
|
|
|
|
2010-02-15 09:45:43 +00:00
|
|
|
/* for KVM_GET/SET_DEBUGREGS */
|
|
|
|
struct kvm_debugregs {
|
|
|
|
__u64 db[4];
|
|
|
|
__u64 dr6;
|
|
|
|
__u64 dr7;
|
|
|
|
__u64 flags;
|
|
|
|
__u64 reserved[9];
|
|
|
|
};
|
|
|
|
|
2010-06-13 09:29:39 +00:00
|
|
|
/* for KVM_CAP_XSAVE */
|
|
|
|
struct kvm_xsave {
|
|
|
|
__u32 region[1024];
|
|
|
|
};
|
|
|
|
|
|
|
|
#define KVM_MAX_XCRS 16
|
|
|
|
|
|
|
|
struct kvm_xcr {
|
|
|
|
__u32 xcr;
|
|
|
|
__u32 reserved;
|
|
|
|
__u64 value;
|
|
|
|
};
|
|
|
|
|
|
|
|
struct kvm_xcrs {
|
|
|
|
__u32 nr_xcrs;
|
|
|
|
__u32 flags;
|
|
|
|
struct kvm_xcr xcrs[KVM_MAX_XCRS];
|
|
|
|
__u64 padding[16];
|
|
|
|
};
|
|
|
|
|
2018-02-01 00:03:36 +00:00
|
|
|
#define KVM_SYNC_X86_REGS (1UL << 0)
|
|
|
|
#define KVM_SYNC_X86_SREGS (1UL << 1)
|
|
|
|
#define KVM_SYNC_X86_EVENTS (1UL << 2)
|
|
|
|
|
|
|
|
#define KVM_SYNC_X86_VALID_FIELDS \
|
|
|
|
(KVM_SYNC_X86_REGS| \
|
|
|
|
KVM_SYNC_X86_SREGS| \
|
|
|
|
KVM_SYNC_X86_EVENTS)
|
|
|
|
|
|
|
|
/* kvm_sync_regs struct included by kvm_run struct */
|
2012-01-11 10:20:30 +00:00
|
|
|
struct kvm_sync_regs {
|
2018-02-01 00:03:36 +00:00
|
|
|
/* Members of this structure are potentially malicious.
|
|
|
|
* Care must be taken by code reading, esp. interpreting,
|
|
|
|
* data fields from them inside KVM to prevent TOCTOU and
|
|
|
|
* double-fetch types of vulnerabilities.
|
|
|
|
*/
|
|
|
|
struct kvm_regs regs;
|
|
|
|
struct kvm_sregs sregs;
|
|
|
|
struct kvm_vcpu_events events;
|
2012-01-11 10:20:30 +00:00
|
|
|
};
|
|
|
|
|
2019-05-21 06:06:54 +00:00
|
|
|
#define KVM_X86_QUIRK_LINT0_REENABLED (1 << 0)
|
|
|
|
#define KVM_X86_QUIRK_CD_NW_CLEARED (1 << 1)
|
|
|
|
#define KVM_X86_QUIRK_LAPIC_MMIO_HOLE (1 << 2)
|
|
|
|
#define KVM_X86_QUIRK_OUT_7E_INC_RIP (1 << 3)
|
|
|
|
#define KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT (1 << 4)
|
2015-04-12 22:53:41 +00:00
|
|
|
|
2019-06-16 12:03:10 +00:00
|
|
|
#define KVM_STATE_NESTED_FORMAT_VMX 0
|
|
|
|
#define KVM_STATE_NESTED_FORMAT_SVM 1 /* unused */
|
|
|
|
|
2018-07-10 09:27:20 +00:00
|
|
|
#define KVM_STATE_NESTED_GUEST_MODE 0x00000001
|
|
|
|
#define KVM_STATE_NESTED_RUN_PENDING 0x00000002
|
2018-10-16 16:50:09 +00:00
|
|
|
#define KVM_STATE_NESTED_EVMCS 0x00000004
|
2018-07-10 09:27:20 +00:00
|
|
|
|
|
|
|
#define KVM_STATE_NESTED_SMM_GUEST_MODE 0x00000001
|
|
|
|
#define KVM_STATE_NESTED_SMM_VMXON 0x00000002
|
|
|
|
|
2019-06-16 12:03:10 +00:00
|
|
|
#define KVM_STATE_NESTED_VMX_VMCS_SIZE 0x1000
|
|
|
|
|
|
|
|
struct kvm_vmx_nested_state_data {
|
|
|
|
__u8 vmcs12[KVM_STATE_NESTED_VMX_VMCS_SIZE];
|
|
|
|
__u8 shadow_vmcs12[KVM_STATE_NESTED_VMX_VMCS_SIZE];
|
|
|
|
};
|
|
|
|
|
|
|
|
struct kvm_vmx_nested_state_hdr {
|
2018-07-10 09:27:20 +00:00
|
|
|
__u64 vmxon_pa;
|
2019-06-16 12:03:10 +00:00
|
|
|
__u64 vmcs12_pa;
|
2018-07-10 09:27:20 +00:00
|
|
|
|
|
|
|
struct {
|
|
|
|
__u16 flags;
|
|
|
|
} smm;
|
|
|
|
};
|
|
|
|
|
|
|
|
/* for KVM_CAP_NESTED_STATE */
|
|
|
|
struct kvm_nested_state {
|
|
|
|
__u16 flags;
|
|
|
|
__u16 format;
|
|
|
|
__u32 size;
|
|
|
|
|
|
|
|
union {
|
2019-06-16 12:03:10 +00:00
|
|
|
struct kvm_vmx_nested_state_hdr vmx;
|
2018-07-10 09:27:20 +00:00
|
|
|
|
|
|
|
/* Pad the header to 128 bytes. */
|
|
|
|
__u8 pad[120];
|
2019-06-16 12:03:10 +00:00
|
|
|
} hdr;
|
2018-07-10 09:27:20 +00:00
|
|
|
|
2019-06-16 12:03:10 +00:00
|
|
|
/*
|
|
|
|
* Define data region as 0 bytes to preserve backwards-compatability
|
|
|
|
* to old definition of kvm_nested_state in order to avoid changing
|
|
|
|
* KVM_{GET,PUT}_NESTED_STATE ioctl values.
|
|
|
|
*/
|
|
|
|
union {
|
|
|
|
struct kvm_vmx_nested_state_data vmx[0];
|
|
|
|
} data;
|
2018-07-10 09:27:20 +00:00
|
|
|
};
|
|
|
|
|
2019-07-11 01:25:15 +00:00
|
|
|
/* for KVM_CAP_PMU_EVENT_FILTER */
|
|
|
|
struct kvm_pmu_event_filter {
|
2019-07-18 18:38:18 +00:00
|
|
|
__u32 action;
|
|
|
|
__u32 nevents;
|
|
|
|
__u32 fixed_counter_bitmap;
|
|
|
|
__u32 flags;
|
|
|
|
__u32 pad[4];
|
|
|
|
__u64 events[0];
|
2019-07-11 01:25:15 +00:00
|
|
|
};
|
|
|
|
|
|
|
|
#define KVM_PMU_EVENT_ALLOW 0
|
|
|
|
#define KVM_PMU_EVENT_DENY 1
|
|
|
|
|
2008-10-23 05:26:29 +00:00
|
|
|
#endif /* _ASM_X86_KVM_H */
|