2005-04-16 22:20:36 +00:00
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/*
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* c 2001 PPC 64 Team, IBM Corp
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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2011-05-10 19:28:52 +00:00
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#include <linux/smp.h>
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2011-07-22 22:24:23 +00:00
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#include <linux/export.h>
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2010-07-12 04:36:09 +00:00
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#include <linux/memblock.h>
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2005-04-16 22:20:36 +00:00
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#include <asm/lppaca.h>
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#include <asm/paca.h>
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powerpc: Make the 64-bit kernel as a position-independent executable
This implements CONFIG_RELOCATABLE for 64-bit by making the kernel as
a position-independent executable (PIE) when it is set. This involves
processing the dynamic relocations in the image in the early stages of
booting, even if the kernel is being run at the address it is linked at,
since the linker does not necessarily fill in words in the image for
which there are dynamic relocations. (In fact the linker does fill in
such words for 64-bit executables, though not for 32-bit executables,
so in principle we could avoid calling relocate() entirely when we're
running a 64-bit kernel at the linked address.)
The dynamic relocations are processed by a new function relocate(addr),
where the addr parameter is the virtual address where the image will be
run. In fact we call it twice; once before calling prom_init, and again
when starting the main kernel. This means that reloc_offset() returns
0 in prom_init (since it has been relocated to the address it is running
at), which necessitated a few adjustments.
This also changes __va and __pa to use an equivalent definition that is
simpler. With the relocatable kernel, PAGE_OFFSET and MEMORY_START are
constants (for 64-bit) whereas PHYSICAL_START is a variable (and
KERNELBASE ideally should be too, but isn't yet).
With this, relocatable kernels still copy themselves down to physical
address 0 and run there.
Signed-off-by: Paul Mackerras <paulus@samba.org>
2008-08-30 01:43:47 +00:00
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#include <asm/sections.h>
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2009-07-23 23:15:42 +00:00
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#include <asm/pgtable.h>
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2010-05-13 19:40:11 +00:00
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#include <asm/kexec.h>
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2005-04-16 22:20:36 +00:00
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/* This symbol is provided by the linker - let it fill in the paca
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* field correctly */
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extern unsigned long __toc_start;
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2009-06-02 21:17:41 +00:00
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#ifdef CONFIG_PPC_BOOK3S
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2006-01-12 23:26:42 +00:00
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/*
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2008-04-10 06:43:47 +00:00
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* The structure which the hypervisor knows about - this structure
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2006-01-12 23:26:42 +00:00
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* should not cross a page boundary. The vpa_init/register_vpa call
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* is now known to fail if the lppaca structure crosses a page
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2012-03-15 18:18:00 +00:00
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* boundary. The lppaca is also used on POWER5 pSeries boxes.
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* The lppaca is 640 bytes long, and cannot readily
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2008-04-10 06:43:47 +00:00
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* change since the hypervisor knows its layout, so a 1kB alignment
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* will suffice to ensure that it doesn't cross a page boundary.
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2006-01-12 23:26:42 +00:00
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*/
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struct lppaca lppaca[] = {
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2010-08-12 20:18:48 +00:00
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[0 ... (NR_LPPACAS-1)] = {
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2013-08-06 16:01:46 +00:00
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.desc = cpu_to_be32(0xd397d781), /* "LpPa" */
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.size = cpu_to_be16(sizeof(struct lppaca)),
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2006-01-12 23:26:42 +00:00
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.fpregs_in_use = 1,
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2013-08-06 16:01:46 +00:00
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.slb_count = cpu_to_be16(64),
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2006-01-12 23:26:42 +00:00
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.vmxregs_in_use = 0,
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2008-10-22 05:53:45 +00:00
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.page_ins = 0,
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2006-01-12 23:26:42 +00:00
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},
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};
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2010-08-12 20:18:48 +00:00
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static struct lppaca *extra_lppacas;
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static long __initdata lppaca_size;
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2013-09-29 12:41:18 +00:00
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static void __init allocate_lppacas(int nr_cpus, unsigned long limit)
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2010-08-12 20:18:48 +00:00
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{
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if (nr_cpus <= NR_LPPACAS)
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return;
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lppaca_size = PAGE_ALIGN(sizeof(struct lppaca) *
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(nr_cpus - NR_LPPACAS));
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extra_lppacas = __va(memblock_alloc_base(lppaca_size,
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PAGE_SIZE, limit));
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}
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2013-09-29 12:41:18 +00:00
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static struct lppaca * __init new_lppaca(int cpu)
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2010-08-12 20:18:48 +00:00
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{
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struct lppaca *lp;
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if (cpu < NR_LPPACAS)
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return &lppaca[cpu];
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lp = extra_lppacas + (cpu - NR_LPPACAS);
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*lp = lppaca[0];
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return lp;
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}
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2013-09-29 12:41:18 +00:00
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static void __init free_lppacas(void)
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2010-08-12 20:18:48 +00:00
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{
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long new_size = 0, nr;
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if (!lppaca_size)
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return;
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nr = num_possible_cpus() - NR_LPPACAS;
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if (nr > 0)
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new_size = PAGE_ALIGN(nr * sizeof(struct lppaca));
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if (new_size >= lppaca_size)
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return;
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memblock_free(__pa(extra_lppacas) + new_size, lppaca_size - new_size);
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lppaca_size = new_size;
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}
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#else
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2010-10-07 22:05:08 +00:00
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static inline void allocate_lppacas(int nr_cpus, unsigned long limit) { }
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2010-08-12 20:18:48 +00:00
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static inline void free_lppacas(void) { }
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2009-06-02 21:17:41 +00:00
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#endif /* CONFIG_PPC_BOOK3S */
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#ifdef CONFIG_PPC_STD_MMU_64
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2006-08-07 06:19:19 +00:00
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/*
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* 3 persistent SLBs are registered here. The buffer will be zero
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* initially, hence will all be invaild until we actually write them.
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*/
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2013-12-05 03:42:40 +00:00
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static struct slb_shadow *slb_shadow;
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static void __init allocate_slb_shadows(int nr_cpus, int limit)
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{
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int size = PAGE_ALIGN(sizeof(struct slb_shadow) * nr_cpus);
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slb_shadow = __va(memblock_alloc_base(size, PAGE_SIZE, limit));
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memset(slb_shadow, 0, size);
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}
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static struct slb_shadow * __init init_slb_shadow(int cpu)
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{
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struct slb_shadow *s = &slb_shadow[cpu];
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s->persistent = cpu_to_be32(SLB_NUM_BOLTED);
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s->buffer_length = cpu_to_be32(sizeof(*s));
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return s;
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}
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#else /* CONFIG_PPC_STD_MMU_64 */
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static void __init allocate_slb_shadows(int nr_cpus, int limit) { }
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2006-08-07 06:19:19 +00:00
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2009-06-02 21:17:41 +00:00
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#endif /* CONFIG_PPC_STD_MMU_64 */
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2005-11-09 02:38:01 +00:00
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/* The Paca is an array with one entry per processor. Each contains an
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2005-04-16 22:20:36 +00:00
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* lppaca, which contains the information shared between the
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2005-11-24 05:34:45 +00:00
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* hypervisor and Linux.
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2005-04-16 22:20:36 +00:00
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* On systems with hardware multi-threading, there are two threads
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* per processor. The Paca array must contain an entry for each thread.
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* The VPD Areas will give a max logical processors = 2 * max physical
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* processors. The processor VPD array needs one entry per physical
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* processor (not thread).
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*/
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2010-01-28 13:23:22 +00:00
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struct paca_struct *paca;
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2005-04-16 22:20:36 +00:00
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EXPORT_SYMBOL(paca);
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2008-04-24 03:43:49 +00:00
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2010-01-28 13:23:22 +00:00
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void __init initialise_paca(struct paca_struct *new_paca, int cpu)
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{
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/* The TOC register (GPR2) points 32kB into the TOC, so that 64kB
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* of the TOC can be addressed using a single machine instruction.
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*/
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2008-04-24 03:43:49 +00:00
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unsigned long kernel_toc = (unsigned long)(&__toc_start) + 0x8000UL;
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2009-06-02 21:17:41 +00:00
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#ifdef CONFIG_PPC_BOOK3S
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2010-08-12 20:18:48 +00:00
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new_paca->lppaca_ptr = new_lppaca(cpu);
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2009-07-23 23:15:42 +00:00
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#else
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2010-01-28 13:23:22 +00:00
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new_paca->kernel_pgd = swapper_pg_dir;
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2009-06-02 21:17:41 +00:00
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#endif
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2010-01-28 13:23:22 +00:00
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new_paca->lock_token = 0x8000;
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new_paca->paca_index = cpu;
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new_paca->kernel_toc = kernel_toc;
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new_paca->kernelbase = (unsigned long) _stext;
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2014-03-28 02:36:29 +00:00
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/* Only set MSR:IR/DR when MMU is initialized */
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new_paca->kernel_msr = MSR_KERNEL & ~(MSR_IR | MSR_DR);
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2010-01-28 13:23:22 +00:00
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new_paca->hw_cpu_id = 0xffff;
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2010-05-13 19:40:11 +00:00
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new_paca->kexec_state = KEXEC_STATE_NONE;
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2010-01-28 13:23:22 +00:00
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new_paca->__current = &init_task;
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2012-09-07 15:31:44 +00:00
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new_paca->data_offset = 0xfeeeeeeeeeeeeeeeULL;
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2009-06-02 21:17:41 +00:00
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#ifdef CONFIG_PPC_STD_MMU_64
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2013-12-05 03:42:40 +00:00
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new_paca->slb_shadow_ptr = init_slb_shadow(cpu);
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2009-06-02 21:17:41 +00:00
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#endif /* CONFIG_PPC_STD_MMU_64 */
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2013-10-12 00:22:38 +00:00
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#ifdef CONFIG_PPC_BOOK3E
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/* For now -- if we have threads this will be adjusted later */
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new_paca->tcd_ptr = &new_paca->tcd;
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#endif
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2010-01-28 13:23:22 +00:00
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}
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2010-07-07 21:55:37 +00:00
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/* Put the paca pointer into r13 and SPRG_PACA */
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void setup_paca(struct paca_struct *new_paca)
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{
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2011-01-20 06:50:21 +00:00
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/* Setup r13 */
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2010-07-07 21:55:37 +00:00
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local_paca = new_paca;
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2011-01-20 06:50:21 +00:00
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2010-07-07 21:55:37 +00:00
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#ifdef CONFIG_PPC_BOOK3E
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2011-01-20 06:50:21 +00:00
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/* On Book3E, initialize the TLB miss exception frames */
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2010-07-07 21:55:37 +00:00
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mtspr(SPRN_SPRG_TLB_EXFRAME, local_paca->extlb);
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2011-01-20 06:50:21 +00:00
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#else
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/* In HV mode, we setup both HPACA and PACA to avoid problems
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* if we do a GET_PACA() before the feature fixups have been
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* applied
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*/
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powerpc, KVM: Split HVMODE_206 cpu feature bit into separate HV and architecture bits
This replaces the single CPU_FTR_HVMODE_206 bit with two bits, one to
indicate that we have a usable hypervisor mode, and another to indicate
that the processor conforms to PowerISA version 2.06. We also add
another bit to indicate that the processor conforms to ISA version 2.01
and set that for PPC970 and derivatives.
Some PPC970 chips (specifically those in Apple machines) have a
hypervisor mode in that MSR[HV] is always 1, but the hypervisor mode
is not useful in the sense that there is no way to run any code in
supervisor mode (HV=0 PR=0). On these processors, the LPES0 and LPES1
bits in HID4 are always 0, and we use that as a way of detecting that
hypervisor mode is not useful.
Where we have a feature section in assembly code around code that
only applies on POWER7 in hypervisor mode, we use a construct like
END_FTR_SECTION_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206)
The definition of END_FTR_SECTION_IFSET is such that the code will
be enabled (not overwritten with nops) only if all bits in the
provided mask are set.
Note that the CPU feature check in __tlbie() only needs to check the
ARCH_206 bit, not the HVMODE bit, because __tlbie() can only get called
if we are running bare-metal, i.e. in hypervisor mode.
Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-06-29 00:26:11 +00:00
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if (cpu_has_feature(CPU_FTR_HVMODE))
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2011-01-20 06:50:21 +00:00
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mtspr(SPRN_SPRG_HPACA, local_paca);
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2010-07-07 21:55:37 +00:00
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#endif
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2011-01-20 06:50:21 +00:00
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mtspr(SPRN_SPRG_PACA, local_paca);
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2010-07-07 21:55:37 +00:00
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}
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2010-01-28 13:23:22 +00:00
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static int __initdata paca_size;
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void __init allocate_pacas(void)
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{
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2011-05-10 19:28:52 +00:00
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int cpu, limit;
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2010-01-28 13:23:22 +00:00
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/*
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* We can't take SLB misses on the paca, and we want to access them
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* in real mode, so allocate them within the RMA and also within
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2012-03-15 18:18:00 +00:00
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* the first segment.
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2010-01-28 13:23:22 +00:00
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*/
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2010-07-06 22:39:02 +00:00
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limit = min(0x10000000ULL, ppc64_rma_size);
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2010-01-28 13:23:22 +00:00
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2011-05-10 19:28:52 +00:00
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paca_size = PAGE_ALIGN(sizeof(struct paca_struct) * nr_cpu_ids);
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2010-01-28 13:23:22 +00:00
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2010-07-12 04:36:09 +00:00
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paca = __va(memblock_alloc_base(paca_size, PAGE_SIZE, limit));
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2010-01-28 13:23:22 +00:00
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memset(paca, 0, paca_size);
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printk(KERN_DEBUG "Allocated %u bytes for %d pacas at %p\n",
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2011-05-10 19:28:52 +00:00
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paca_size, nr_cpu_ids, paca);
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2010-01-28 13:23:22 +00:00
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2011-05-10 19:28:52 +00:00
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allocate_lppacas(nr_cpu_ids, limit);
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2010-08-12 20:18:48 +00:00
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2013-12-05 03:42:40 +00:00
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allocate_slb_shadows(nr_cpu_ids, limit);
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2010-01-28 13:23:22 +00:00
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/* Can't use for_each_*_cpu, as they aren't functional yet */
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2011-05-10 19:28:52 +00:00
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for (cpu = 0; cpu < nr_cpu_ids; cpu++)
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2010-01-28 13:23:22 +00:00
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initialise_paca(&paca[cpu], cpu);
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}
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void __init free_unused_pacas(void)
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{
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int new_size;
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2011-03-31 19:33:02 +00:00
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new_size = PAGE_ALIGN(sizeof(struct paca_struct) * nr_cpu_ids);
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2010-01-28 13:23:22 +00:00
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if (new_size >= paca_size)
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return;
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|
2010-07-12 04:36:09 +00:00
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memblock_free(__pa(paca) + new_size, paca_size - new_size);
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2010-01-28 13:23:22 +00:00
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printk(KERN_DEBUG "Freed %u bytes for unused pacas\n",
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paca_size - new_size);
|
2008-04-24 03:43:49 +00:00
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2010-01-28 13:23:22 +00:00
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paca_size = new_size;
|
2010-08-12 20:18:48 +00:00
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free_lppacas();
|
2008-04-24 03:43:49 +00:00
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}
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