Files
linux/drivers/net
Sean Wang f430dea7c1 net: ethernet: mediatek: add support for GMAC0 connecting with external PHY through TRGMII
Changing dynamically source clock, TX/RX delay and interface mode
used by TRGMII hardware module inside PHY capability polling routine
for adapting to the various speed of RGMII used by external PHY for
GMAC0.

Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2016-09-22 08:21:21 -04:00
..
2016-08-15 11:57:55 -07:00
2016-09-19 01:25:22 -04:00
2016-08-31 14:33:09 -07:00
2016-09-20 22:55:23 -04:00
2016-09-09 16:52:43 -07:00
2016-08-30 22:27:18 -07:00
2016-07-19 19:25:43 -07:00
2016-09-17 10:05:05 -04:00