Files
linux/drivers
Sean Wang f430dea7c1 net: ethernet: mediatek: add support for GMAC0 connecting with external PHY through TRGMII
Changing dynamically source clock, TX/RX delay and interface mode
used by TRGMII hardware module inside PHY capability polling routine
for adapting to the various speed of RGMII used by external PHY for
GMAC0.

Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2016-09-22 08:21:21 -04:00
..
2016-09-07 21:24:42 -07:00
2016-09-03 10:40:57 -07:00
2016-09-11 14:41:49 -07:00
2016-08-12 14:59:10 +05:30
2016-09-06 16:57:02 -07:00
2016-08-02 19:35:40 -04:00