b05d59dfce
Pull KVM updates from Paolo Bonzini:
"At over 200 commits, covering almost all supported architectures, this
was a pretty active cycle for KVM. Changes include:
- a lot of s390 changes: optimizations, support for migration, GDB
support and more
- ARM changes are pretty small: support for the PSCI 0.2 hypercall
interface on both the guest and the host (the latter acked by
Catalin)
- initial POWER8 and little-endian host support
- support for running u-boot on embedded POWER targets
- pretty large changes to MIPS too, completing the userspace
interface and improving the handling of virtualized timer hardware
- for x86, a larger set of changes is scheduled for 3.17. Still, we
have a few emulator bugfixes and support for running nested
fully-virtualized Xen guests (para-virtualized Xen guests have
always worked). And some optimizations too.
The only missing architecture here is ia64. It's not a coincidence
that support for KVM on ia64 is scheduled for removal in 3.17"
* tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm: (203 commits)
KVM: add missing cleanup_srcu_struct
KVM: PPC: Book3S PR: Rework SLB switching code
KVM: PPC: Book3S PR: Use SLB entry 0
KVM: PPC: Book3S HV: Fix machine check delivery to guest
KVM: PPC: Book3S HV: Work around POWER8 performance monitor bugs
KVM: PPC: Book3S HV: Make sure we don't miss dirty pages
KVM: PPC: Book3S HV: Fix dirty map for hugepages
KVM: PPC: Book3S HV: Put huge-page HPTEs in rmap chain for base address
KVM: PPC: Book3S HV: Fix check for running inside guest in global_invalidates()
KVM: PPC: Book3S: Move KVM_REG_PPC_WORT to an unused register number
KVM: PPC: Book3S: Add ONE_REG register names that were missed
KVM: PPC: Add CAP to indicate hcall fixes
KVM: PPC: MPIC: Reset IRQ source private members
KVM: PPC: Graciously fail broken LE hypercalls
PPC: ePAPR: Fix hypercall on LE guest
KVM: PPC: BOOK3S: Remove open coded make_dsisr in alignment handler
KVM: PPC: BOOK3S: Always use the saved DAR value
PPC: KVM: Make NX bit available with magic page
KVM: PPC: Disable NX for old magic page using guests
KVM: PPC: BOOK3S: HV: Add mixed page-size support for guest
...
125 lines
3.1 KiB
C
125 lines
3.1 KiB
C
/*
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* S390 version
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*
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* Derived from "include/asm-i386/mmu_context.h"
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*/
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#ifndef __S390_MMU_CONTEXT_H
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#define __S390_MMU_CONTEXT_H
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#include <asm/pgalloc.h>
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#include <asm/uaccess.h>
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#include <asm/tlbflush.h>
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#include <asm/ctl_reg.h>
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static inline int init_new_context(struct task_struct *tsk,
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struct mm_struct *mm)
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{
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cpumask_clear(&mm->context.cpu_attach_mask);
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atomic_set(&mm->context.attach_count, 0);
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mm->context.flush_mm = 0;
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mm->context.asce_bits = _ASCE_TABLE_LENGTH | _ASCE_USER_BITS;
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#ifdef CONFIG_64BIT
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mm->context.asce_bits |= _ASCE_TYPE_REGION3;
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#endif
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mm->context.has_pgste = 0;
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mm->context.use_skey = 0;
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mm->context.asce_limit = STACK_TOP_MAX;
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crst_table_init((unsigned long *) mm->pgd, pgd_entry_type(mm));
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return 0;
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}
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#define destroy_context(mm) do { } while (0)
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static inline void set_user_asce(struct mm_struct *mm)
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{
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pgd_t *pgd = mm->pgd;
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S390_lowcore.user_asce = mm->context.asce_bits | __pa(pgd);
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set_fs(current->thread.mm_segment);
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set_cpu_flag(CIF_ASCE);
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}
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static inline void clear_user_asce(void)
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{
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S390_lowcore.user_asce = S390_lowcore.kernel_asce;
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__ctl_load(S390_lowcore.user_asce, 1, 1);
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__ctl_load(S390_lowcore.user_asce, 7, 7);
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}
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static inline void load_kernel_asce(void)
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{
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unsigned long asce;
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__ctl_store(asce, 1, 1);
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if (asce != S390_lowcore.kernel_asce)
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__ctl_load(S390_lowcore.kernel_asce, 1, 1);
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set_cpu_flag(CIF_ASCE);
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}
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static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
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struct task_struct *tsk)
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{
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int cpu = smp_processor_id();
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if (prev == next)
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return;
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if (MACHINE_HAS_TLB_LC)
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cpumask_set_cpu(cpu, &next->context.cpu_attach_mask);
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/* Clear old ASCE by loading the kernel ASCE. */
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__ctl_load(S390_lowcore.kernel_asce, 1, 1);
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__ctl_load(S390_lowcore.kernel_asce, 7, 7);
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/* Delay loading of the new ASCE to control registers CR1 & CR7 */
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set_cpu_flag(CIF_ASCE);
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atomic_inc(&next->context.attach_count);
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atomic_dec(&prev->context.attach_count);
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if (MACHINE_HAS_TLB_LC)
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cpumask_clear_cpu(cpu, &prev->context.cpu_attach_mask);
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}
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#define finish_arch_post_lock_switch finish_arch_post_lock_switch
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static inline void finish_arch_post_lock_switch(void)
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{
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struct task_struct *tsk = current;
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struct mm_struct *mm = tsk->mm;
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if (!mm)
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return;
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preempt_disable();
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while (atomic_read(&mm->context.attach_count) >> 16)
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cpu_relax();
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cpumask_set_cpu(smp_processor_id(), mm_cpumask(mm));
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set_user_asce(mm);
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if (mm->context.flush_mm)
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__tlb_flush_mm(mm);
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preempt_enable();
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}
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#define enter_lazy_tlb(mm,tsk) do { } while (0)
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#define deactivate_mm(tsk,mm) do { } while (0)
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static inline void activate_mm(struct mm_struct *prev,
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struct mm_struct *next)
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{
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switch_mm(prev, next, current);
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cpumask_set_cpu(smp_processor_id(), mm_cpumask(next));
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set_user_asce(next);
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}
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static inline void arch_dup_mmap(struct mm_struct *oldmm,
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struct mm_struct *mm)
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{
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#ifdef CONFIG_64BIT
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if (oldmm->context.asce_limit < mm->context.asce_limit)
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crst_table_downgrade(mm, oldmm->context.asce_limit);
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#endif
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}
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static inline void arch_exit_mmap(struct mm_struct *mm)
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{
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}
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#endif /* __S390_MMU_CONTEXT_H */
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