Valentine Barshak 340ffd267c [POWERPC] 4xx: 440EPx/GRx incorrect write to DDR SDRAM errata workaround ...

Add a workaround for PowerPC 440EPx/GRx incorrect write to
DDR SDRAM errata. Data can be written to wrong address
in SDRAM when write pipelining enabled on plb0. We disable
it in the cpu_setup for these processors at early init.

Signed-off-by: Valentine Barshak <vbarshak@ru.mvista.com>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>

2007-10-03 07:20:18 -05:00

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