This patch adds the prototypes of assembly defined functions to asm-prototypes.h.
Some prototypes are directly added as they are not present in any existing header
files.
Signed-off-by: Nagarathnam Muthusamy <nagarathnam.muthusamy@oracle.com>
Reviewed-by: Babu Moger <babu.moger@oracle.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This fixes debugger syscall restart interactions. A debugger that
modifies the tracee's program counter is expected to set the orig_d0
pseudo register to -1, to disable a possible syscall restart.
This removes the last user of the ptrace_signal_deliver hook in the ptrace
signal handling, so remove that as well.
Signed-off-by: Andreas Schwab <schwab@linux-m68k.org>
Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
Stack guard page is a useful feature to reduce a risk of stack smashing
into a different mapping. We have been using a single page gap which
is sufficient to prevent having stack adjacent to a different mapping.
But this seems to be insufficient in the light of the stack usage in
userspace. E.g. glibc uses as large as 64kB alloca() in many commonly
used functions. Others use constructs liks gid_t buffer[NGROUPS_MAX]
which is 256kB or stack strings with MAX_ARG_STRLEN.
This will become especially dangerous for suid binaries and the default
no limit for the stack size limit because those applications can be
tricked to consume a large portion of the stack and a single glibc call
could jump over the guard page. These attacks are not theoretical,
unfortunatelly.
Make those attacks less probable by increasing the stack guard gap
to 1MB (on systems with 4k pages; but make it depend on the page size
because systems with larger base pages might cap stack allocations in
the PAGE_SIZE units) which should cover larger alloca() and VLA stack
allocations. It is obviously not a full fix because the problem is
somehow inherent, but it should reduce attack space a lot.
One could argue that the gap size should be configurable from userspace,
but that can be done later when somebody finds that the new 1MB is wrong
for some special case applications. For now, add a kernel command line
option (stack_guard_gap) to specify the stack gap size (in page units).
Implementation wise, first delete all the old code for stack guard page:
because although we could get away with accounting one extra page in a
stack vma, accounting a larger gap can break userspace - case in point,
a program run with "ulimit -S -v 20000" failed when the 1MB gap was
counted for RLIMIT_AS; similar problems could come with RLIMIT_MLOCK
and strict non-overcommit mode.
Instead of keeping gap inside the stack vma, maintain the stack guard
gap as a gap between vmas: using vm_start_gap() in place of vm_start
(or vm_end_gap() in place of vm_end if VM_GROWSUP) in just those few
places which need to respect the gap - mainly arch_get_unmapped_area(),
and and the vma tree's subtree_gap support for that.
Original-patch-by: Oleg Nesterov <oleg@redhat.com>
Original-patch-by: Michal Hocko <mhocko@suse.com>
Signed-off-by: Hugh Dickins <hughd@google.com>
Acked-by: Michal Hocko <mhocko@suse.com>
Tested-by: Helge Deller <deller@gmx.de> # parisc
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
In the idle sleep/wake code we know that MSR[EE] is clear, so we can
avoid 2 x mfmsr and 2 x mtmsr by calling the double-underscore
versions of the run latch routines which assume interrupts are already
disabled.
Acked-by: Vaidyanathan Srinivasan <svaidy@linux.vnet.ibm.com>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
In a busy system, idle wakeups can be expected from IPIs and device
interrupts.
Reviewed-by: Gautham R. Shenoy <ego@linux.vnet.ibm.com>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Idle code now always runs at the 0xc... effective address whether
in real or virtual mode. This means rfid can be ditched, along
with a lot of SRR manipulations.
In the wakeup path, carry SRR1 around in r12. Use mtmsrd to change
MSR states as required.
This also balances the return prediction for the idle call, by
doing blr rather than rfid to return to the idle caller.
On POWER9, 2-process context switch on different cores, with snooze
disabled, increases performance by 2%.
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
[mpe: Incorporate v2 fixes from Nick]
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Have the system reset idle wakeup handlers branched to in real mode
with the 0xc... kernel address applied. This allows simplifications of
avoiding rfid when switching to virtual mode in the wakeup handler.
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
The __replay_interrupt() code is branched to with bl, but the caller is
returned to directly with rfid from the interrupt.
Instead, rfid to a stub that returns to the caller with blr, which
should keep the return branch predictor balanced.
Reviewed-by: Gautham R. Shenoy <ego@linux.vnet.ibm.com>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
msgsnd doorbell exceptions are cleared when the doorbell interrupt is
taken. However if a doorbell exception causes a system reset interrupt
wake from power saving state, the message is not cleared. Processing
the doorbell from the system reset interrupt requires msgclr to avoid
taking the exception again.
Testing this plus the previous wakup direct patch gives:
original wakeup direct msgclr
Different threads, same core: 315k/s 264k/s 345k/s
Different cores: 235k/s 242k/s 242k/s
Net speedup is +10% for same core, and +3% for different core.
Reviewed-by: Gautham R. Shenoy <ego@linux.vnet.ibm.com>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
When the CPU wakes from low power state, it begins at the system reset
interrupt with the exception that caused the wakeup encoded in SRR1.
Today, powernv idle wakeup ignores the wakeup reason (except a special
case for HMI), and the regular interrupt corresponding to the
exception will fire after the idle wakeup exits.
Change this to replay the interrupt from the idle wakeup before
interrupts are hard-enabled.
Test on POWER8 of context_switch selftests benchmark with polling idle
disabled (e.g., always nap, giving cross-CPU IPIs) gives the following
results:
original wakeup direct
Different threads, same core: 315k/s 264k/s
Different cores: 235k/s 242k/s
There is a slowdown for doorbell IPI (same core) case because system
reset wakeup does not clear the message and the doorbell interrupt
fires again needlessly.
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Rather than concern ourselves with any soft-mask logic in the CPU
hotplug handler, just hard disable interrupts. This ensures there
are no lazy-irqs pending, which means we can call directly to idle
instruction in order to sleep.
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
This simplifies the asm and fixes irq-off tracing over sleep
instructions.
Also move powersave_nap check for POWER8 into C code, and move
PSSCR register value calculation for POWER9 into C.
Reviewed-by: Gautham R. Shenoy <ego@linux.vnet.ibm.com>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Pull ARM SoC fixes from Olof Johansson:
"Stream of fixes has slowed down, only a few this week:
- Some DT fixes for Allwinner platforms, and addition of a clock to
the R_CCU clock controller that had been missed.
- A couple of small DT fixes for am335x-sl50"
* tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
arm64: allwinner: a64: Add PLL_PERIPH0 clock to the R_CCU
ARM: sunxi: h3-h5: Add PLL_PERIPH0 clock to the R_CCU
ARM: dts: am335x-sl50: Fix cannot claim requested pins for spi0
ARM: dts: am335x-sl50: Fix card detect pin for mmc1
arm64: allwinner: h5: Remove syslink to shared DTSI
ARM: sunxi: h3/h5: fix the compatible of R_CCU
Bring in the fixes branch to avoid a merge conflict between new SoC options and
the build fix adding CONFIG_AMR_CPU_SUSPEND.
Fixes for 4.12:
Fix two compilation issues
* tag 'at91-4.12-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux:
ARM: at91: select CONFIG_ARM_CPU_SUSPEND
memory: atmel-ebi: mark PM ops as __maybe_unused
Signed-off-by: Olof Johansson <olof@lixom.net>
We checked (nbytes < bsize) inside the loops so it's not possible to hit
the "goto done;" here. This code is cut and paste from other slightly
different loops where we don't have the check inside the loop.
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
The i.MX defconfig updates for 4.13:
- Enable i.MX7 ADC driver support.
- Enable THERMAL_WRITABLE_TRIPS, so that i.MX thermal driver can set
trip points for testing.
- CONFIG_DEBUG_FS gets lost by accident because of a change around
CONFIG_RCU_TRACE. Re-enable it explicitly.
- Enable MXS LRADC driver and CONFIG_CGROUPS for mxs_defconfig.
- Enable more common cpufreq governors to help test cpufreq driver.
* tag 'imx-defconfig-4.13' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: imx_v6_v7_defconfig: Select CONFIG_IMX7D_ADC
ARM: imx_v6_v7_defconfig: Set THERMAL_WRITABLE_TRIPS=y for testing
ARM: imx_v6_v7_defconfig: Explicitly restore CONFIG_DEBUG_FS
ARM: mxs_defconfig: Re-enable MXS LRADC
ARM: mxs_defconfig: Enable CONFIG_CGROUPS
ARM: imx_v6_v7_defconfig: Enable cpufreq governors
Signed-off-by: Olof Johansson <olof@lixom.net>
The Freescale arm64 device tree updates for 4.13:
- A series from NXP employee Li Yang that updates the copyright claims
to comply with company policy.
- A patch-set from Madalin Bucur that adds Data Path Acceleration
Architecture (DPAA) QBMan and FMan. Quite a few .dtsi files are
created for SoCs with different DPAA configuration to include the
devices as needed.
- Enable UHS-I SD and eMMC support for LS1046A and LS208xA RDB/QDS
boards.
- Enable TMU device for thermal management support on LS1088A.
- Update SATA device node for LS1088A with correct compatible and ECC
register bit.
- A few small random device tree updates.
* tag 'imx-dt64-4.13' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (22 commits)
arm64: dts: ls1088a: update sata node
dt-bindings: ahci-fsl-qoriq: add ls1088a chip name to the list
arm64: dts: ls1012a: Add coreclk
arm64: dts: ls1046a: Add dis_rxdet_inp3_quirk property to USB3 node
arm64: dts: ls208xa: disable SD UHS-I modes by default on RDB
arm64: dts: ls1043a: Add generic compatible string for I2C EEPROM
arm64: dts: add LS1046A DPAA FMan nodes
arm64: dts: add LS1043A DPAA FMan support
arm64: dts: add DPAA FMan nodes
arm64: dts: add LS1046A DPAA QBMan nodes
arm64: dts: add LS1043A DPAA QBMan nodes
arm64: dts: add DPAA QBMan portals
arm64: dts: ls1088a: Add TMU device tree support
arm64: dts: ls1088a: update the sata node
arm64: dts: Add flash node for ls1088a qds and rdb
arm64: dts: ls1088a: add esdhc node
arm64: dts: ls1012a: add eSDHC nodes
arm64: dts: ls208xa: support SD UHS-I on RDB and eMMC HS200 on QDS
arm64: dts: ls1046a: support SD UHS-I and eMMC HS200 on RDB
mmc: dt: add compatible into eSDHC required properties
...
Signed-off-by: Olof Johansson <olof@lixom.net>
The i.MX device tree updates for 4.13:
- New board support: Gateworks Ventana GW5600, Technexion Pico i.MX7D
Board.
- A series from Alexandre Belloni to correct the vendor prefix for
rv4162 compatible.
- A patch-set from Andrey Smirnov ot enable PCIe support for i.MX7 and
imx7d-sdb board.
- Increase the SGTL5000 LRCLK pad strength to fix a random audio
channel swapping seen on imx6qdl-wandboard and imx6qdl-colibri
boards.
- Clean up non-existing property 'enable-active-low' from fixed
regulator device nodes.
- Correct GPIO polarity for Ethernet PHY and PCI reset lines, even
though device drivers do not use the polarity for now.
- Add Wifi and Bluetooth support for imx7d-sdb board.
- Adopt the i.MX6Q/DL DT to the new and more flexible GPC binding.
- Update zii-rdu2 device tree source to use #include "..." for local
inclusion.
- A series from Philipp Zabel and Steve Longerbeam to enable video
capture support for imx6qdl platforms.
- A number of small random updates on various board support.
* tag 'imx-dt-4.13' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (47 commits)
ARM: dts: imx6q-cm-fx6: add sdio wifi/bt nodes
ARM: dts: ls1021a: update the clockgen node
ARM: dts: imx6-sabreauto: add the ADV7180 video decoder
ARM: dts: imx6-sabreauto: add pinctrl for gpt input capture
ARM: dts: imx6-sabreauto: add reset-gpios property for max7310_b
ARM: dts: imx6-sabreauto: create i2cmux for i2c3
ARM: dts: imx6-sabresd: add OV5642 and OV5640 camera sensors
ARM: dts: imx6-sabrelite: add OV5642 and OV5640 camera sensors
ARM: dts: imx6qdl-sabrelite: remove erratum ERR006687 workaround
ARM: dts: imx6qdl: add capture-subsystem device
ARM: dts: imx6qdl: Add video multiplexers, mipi_csi, and their connections
ARM: dts: imx6qdl: Add compatible, clocks, irqs to MIPI CSI-2 node
ARM: dts: imx6qdl: add multiplexer controls
ARM: dts: imx6: Fix PCI GPIO reset polarity
ARM: dts: imx7d-sdb: Add Bluetooth support
ARM: dts: imx7d-sdb: Add Wifi support
ARM: dts: imx7d-sdb: Adjust the regulator nodes
ARM: dts: imx: Fix Ethernet PHY reset polarity
ARM: dts: imx7: Fix typo in watchdog pin name
ARM: dts: vf610-zii: Add switch eeprom-length properties
...
Signed-off-by: Olof Johansson <olof@lixom.net>
The i.MX SoC updates for 4.13:
- Select GPCv2 for i.MX7 SoCs to get imx-gpcv2 irqchip driver built
for i.MX7 platforms by default.
- A couple of patches from Leonard to add IMX6ULL cpu check and get
suspend/resume work on IMX6ULL.
* tag 'imx-soc-4.13' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: imx6ull: Make suspend/resume work like on 6ul
ARM: imx: Add MXC_CPU_IMX6ULL and cpu_is_imx6ull
ARM: imx: Select GPCv2 for i.MX7
Signed-off-by: Olof Johansson <olof@lixom.net>
mvebu dt64 for 4.13 (part 1)
- Improve the mcbin support (Armada 8040 based board): add sdhci and
the second 1G port
- Improve crypro nodes description on Aramda 7K/8K
- Use new binding for ap806 clocks
- Improve mdio nodes and add xmdio on Aramda 7K/8K
- Add second SGCI node on Armada 37xx
- Improve the description of the Armada 3720 DB board
* tag 'mvebu-dt64-4.13-1' of git://git.infradead.org/linux-mvebu:
arm64: dts: marvell: add xmdio nodes for 7k/8k
arm64: dts: marvell: add a comment on the cp110 slave node status
arm64: dts: marvell: remove cpm crypto nodes from dts files
arm64: dts: marvell: cp110: enable the crypto engine at the SoC level
arm64: dts: marvell: armada-3720-db: Add vqmmc regulator for SD slot
arm64: dts: marvell: Enable second SDHCI controller in Armada 37xx
arm64: dts: marvell: armada-37xx: Use angle bracket for each register set
arm64: dts: marvell: armada-37xx: Align the compatible string
arm64: dts: marvell: armada-3720-db: Add information about the V2 board
arm64: dts: marvell: armada-3720-db: Sort the dts node alphabetically
arm64: dts: marvell: disable the mdio nodes by default
arm64: dts: marvell: explicitly enable the mdio nodes for 7k/8k DB
arm64: dts: marvell: add dma-mask in crypto nodes for 7k/8k
arm64: dts: marvell: 8040-mcbin: Enable 1GB Ethernet
arm64: dts: marvell: cp110: add required clocks for mdio interface
arm64: dts: marvell: use new binding for the system controller on ap806
arm64: dts: marvell: remove clock-output-names on ap806
arm64: dts: marvell: add second 1G port on the Armada 8040 DB
arm64: dts: marvell: mcbin: add sdhci
arm64: dts: marvell: add clocks for Armada AP806 XOR engines
Signed-off-by: Olof Johansson <olof@lixom.net>
mvebu dt for 4.13 (part 1)
- Add Linksys WRT3200ACM (Rango) support
- Add PWM properties for gpio on Aramda XP and 38x
- A couple of minor updates for the 98dx3236 and 98dx4251
* tag 'mvebu-dt-4.13-1' of git://git.infradead.org/linux-mvebu:
ARM: dts: turris-omnia: Add generic compatible string for I2C EEPROM
ARM: dts: mvebu: add support for Linksys WRT3200ACM (Rango)
ARM: dts: armada-385-linksys: fixup button node names
ARM: dts: armada-385-linksys: group pins in pinctrl
ARM: dts: armada-385-linksys: partition layout is board specific
ARM: dts: armada-385-linksys: use binary unit prefixes
ARM: dts: armada-385-linksys: drop legacy DSA bindings
ARM: dts: armada-385-linksys: usb3 label cleanup
ARM: dts: armada-385-linksys: bm pools by label order
ARM: dts: armada-385-linksys: drop redundant properties in dependants
ARM: dts: armada-385-linksys: flatten dependants
ARM: dts: armada-385-linksys: label nodes
ARM: dts: armada-385-linksys: flatten dtsi
ARM: dts: mvebu: disable the rtc on 98dx3236 SoC
ARM: dts: mvebu: add missing interrupt to 98dx4251 switch
ARM: dts: armada-xp: Use pwm-fan rather than gpio-fan
ARM: dts: mvebu: Add PWM properties for armada-38x
ARM: dts: mvebu: Add PWM properties to .dtsi files
Signed-off-by: Olof Johansson <olof@lixom.net>
mvebu defconfig for 4.13
Enable the SENSORS_PWM_FAN in mvebu_v7_defconfig support by gpio
driver since the previous release
* tag 'mvebu-defconfig-4.13-1' of git://git.infradead.org/linux-mvebu:
ARM: mvebu: Enable SENSORS_PWM_FAN in defconfig
Signed-off-by: Olof Johansson <olof@lixom.net>
DT for 4.13
- Switch to the new NAND binding
- A few non urgent fixes
* tag 'at91-ab-4.13-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux:
ARM: dts: at91: sama5d2_xplained: remove wrong memory node
ARM: dts: at91: sama5d2_xplained: add pwm controller
ARM: dts: at91: Add the NOR flash available on sama5d3 dev kits
ARM: dts: at91: Switch to the new NAND bindings
ARM: dts: at91: Declare EBI/NAND controllers
dt-bindings: mtd: atmel-nand: Document the nfc-io bindings
ARM: dts: at91-sama5d4: use IRQ_TYPE_* to specify irq flags
dts: gpio_atmel: adapt binding doc to reality
ARM: dts: at91: sama5d2: add m_can nodes
ARM: dts: at91: Add generic compatible string for I2C EEPROM
Signed-off-by: Olof Johansson <olof@lixom.net>
Second Round of Renesas ARM Based SoC DT Updates for v4.13
Cleanup:
* Correct PCI bus dtc warnings for r8a779x SoCs
Enhancements:
* Add support for iWave G20D-Q7 board based on RZ/G1M SoC
* Add support for GR-Peach board based on r7s72100 SoC
* Add composite video and HDMI input to gose board
* tag 'renesas-dt2-for-v4.13' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: dts: r8a779x: Fix PCI bus dtc warnings
ARM: dts: iwg20d-q7: Add support for iWave G20D-Q7 board based on RZ/G1M
ARM: dts: iwg20m: Add iWave RZG1M Qseven SOM
ARM: dts: gose: add composite video input
ARM: dts: r7s72100: Add support for GR-Peach
ARM: dts: gose: add HDMI input
Signed-off-by: Olof Johansson <olof@lixom.net>
Second Round of Renesas ARM64 Based SoC DT Updates for v4.13
* Add reset control properties for audio to r9a779[56] SoCs
* Add add DMA for IIC_DVFS to r9a779[56] SoCs
* Add support for Salvator-XS and H3ULCB with R-Car H3 (r8a7795) ES2
* Add missing index to PWM pinctrl subnode name to Salvator-X board
* Add 12288000 for sound ADG to Salvator-X and ULCB boards
* tag 'renesas-arm64-dt2-for-v4.13' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
arm64: dts: r8a7796: Add reset control properties for audio
arm64: dts: r8a7795: Add reset control properties for audio
arm64: dts: renesas: Add support for Salvator-XS with R-Car H3 ES2.0
arm64: dts: renesas: Add common Salvator-XS board support
arm64: dts: renesas: Extract common Salvator-X/XS board support
arm64: dts: salvator-x: Add missing index to PWM pinctrl subnode name
arm64: dts: r8a7795: h3ulcb: Add support for R-Car H3 ES2.0
arm64: dts: r8a7796: add DMA for IIC_DVFS
arm64: dts: r8a7795: add DMA for IIC_DVFS
arm64: dts: ulcb: add 12288000 for sound ADG
arm64: dts: salvator-x: add 12288000 for sound ADG
Signed-off-by: Olof Johansson <olof@lixom.net>
defconfig for 4.13:
- Switch sama5 to be tickless in idle and enable hrtimer
- Add MCAN
* tag 'at91-ab-4.13-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux:
ARM: configs: at91: add MCAN driver to sama5_defconfig
ARM: configs: at91: enable HIGH_RES_TIMERS
ARM: configs: at91: make system tickless when idle
Signed-off-by: Olof Johansson <olof@lixom.net>
Qualcomm ARM Based SoC Updates for v4.13
* Add debug UART addresses for IPQ4019
* tag 'qcom-soc-for-4.13' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux:
ARM: debug: qcom: add UART addresses to Kconfig help for IPQ4019
Signed-off-by: Olof Johansson <olof@lixom.net>
Qualcomm Device Tree Changes for v4.13
* Fix IPQ4019 i2c0 node
* Add GSBI7 on IPQ8064
* Add misc APQ8060 devices
* Fixup USB related devices on APQ8064 and MSM8974
* tag 'qcom-dts-for-4.13' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux:
ARM: dts: add core I2C devices to the APQ8060 Dragonboard
ARM: dts: add GSBI8 defines to the MSM8660 family
ARM: dts: Qualcomm APQ8060 DragonBoard ALS sensor
ARM: dts: add XOADC and IIO HWMON to MSM8660/APQ8060
ARM: dts: qcom: ipq4019: fix i2c_0 node
ARM: dts: qcom: add gsbi7 serial to ipq8064 SoC device tree
ARM: dts: qcom-apq8064: Collapse usb support into one node
ARM: dts: qcom-msm8974: Add HS usb node and OTG detection mechanisms
ARM: dts: qcom: add charger otg regulator
ARM: dts: qcom: Remove s4/5vs1,2 from RPM pm8941 control
Signed-off-by: Olof Johansson <olof@lixom.net>
Qualcomm ARM Based defconfig Updates for v4.13
* Enable IPQ4019 clock and pinctrl
* tag 'qcom-defconfig-for-4.13' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux:
ARM: qcom_defconfig: Enable IPQ4019 clock and pinctrl
Signed-off-by: Olof Johansson <olof@lixom.net>
Qualcomm ARM64 Updates for v4.13
* Fix APQ8016 SBC WLAN LED
* Add MSM8996 CPU node
* Add MSM8992 SMEM and fixed regulator
* Fixup MSM8916 USB support
* tag 'qcom-arm64-for-4.13' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux:
arm64: dts: apq8016-sbc: Correct WLAN LED default-trigger
arm64: dts: msm8996: Add CPU clock controller node
arm64: dts: smem enablement for msm8992
arm64: dts: msm8992 add fixed regulator
arm64: dts: qcom: Collapse usb support into one node
Signed-off-by: Olof Johansson <olof@lixom.net>
On POWER9, we no longer have the restriction that we had on POWER8
where all threads in a core have to be in the same partition, so
the CPU threads are now independent. However, we still want to be
able to run guests with a virtual SMT topology, if only to allow
migration of guests from POWER8 systems to POWER9.
A guest that has a virtual SMT mode greater than 1 will expect to
be able to use the doorbell facility; it will expect the msgsndp
and msgclrp instructions to work appropriately and to be able to read
sensible values from the TIR (thread identification register) and
DPDES (directed privileged doorbell exception status) special-purpose
registers. However, since each CPU thread is a separate sub-processor
in POWER9, these instructions and registers can only be used within
a single CPU thread.
In order for these instructions to appear to act correctly according
to the guest's virtual SMT mode, we have to trap and emulate them.
We cause them to trap by clearing the HFSCR_MSGP bit in the HFSCR
register. The emulation is triggered by the hypervisor facility
unavailable interrupt that occurs when the guest uses them.
To cause a doorbell interrupt to occur within the guest, we set the
DPDES register to 1. If the guest has interrupts enabled, the CPU
will generate a doorbell interrupt and clear the DPDES register in
hardware. The DPDES hardware register for the guest is saved in the
vcpu->arch.vcore->dpdes field. Since this gets written by the guest
exit code, other VCPUs wishing to cause a doorbell interrupt don't
write that field directly, but instead set a vcpu->arch.doorbell_request
flag. This is consumed and set to 0 by the guest entry code, which
then sets DPDES to 1.
Emulating reads of the DPDES register is somewhat involved, because
it requires reading the doorbell pending interrupt status of all of the
VCPU threads in the virtual core, and if any of those VCPUs are
running, their doorbell status is only up-to-date in the hardware
DPDES registers of the CPUs where they are running. In order to get
a reasonable approximation of the current doorbell status, we send
those CPUs an IPI, causing an exit from the guest which will update
the vcpu->arch.vcore->dpdes field. We then use that value in
constructing the emulated DPDES register value.
Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
This allows userspace to set the desired virtual SMT (simultaneous
multithreading) mode for a VM, that is, the number of VCPUs that
get assigned to each virtual core. Previously, the virtual SMT mode
was fixed to the number of threads per subcore, and if userspace
wanted to have fewer vcpus per vcore, then it would achieve that by
using a sparse CPU numbering. This had the disadvantage that the
vcpu numbers can get quite large, particularly for SMT1 guests on
a POWER8 with 8 threads per core. With this patch, userspace can
set its desired virtual SMT mode and then use contiguous vcpu
numbering.
On POWER8, where the threading mode is "strict", the virtual SMT mode
must be less than or equal to the number of threads per subcore. On
POWER9, which implements a "loose" threading mode, the virtual SMT
mode can be any power of 2 between 1 and 8, even though there is
effectively one thread per subcore, since the threads are independent
and can all be in different partitions.
Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
This adds code to allow us to use a different value for the HFSCR
(Hypervisor Facilities Status and Control Register) when running the
guest from that which applies in the host. The reason for doing this
is to allow us to trap the msgsndp instruction and related operations
in future so that they can be virtualized. We also save the value of
HFSCR when a hypervisor facility unavailable interrupt occurs, because
the high byte of HFSCR indicates which facility the guest attempted to
access.
We save and restore the host value on guest entry/exit because some
bits of it affect host userspace execution.
We only do all this on POWER9, not on POWER8, because we are not
intending to virtualize any of the facilities controlled by HFSCR on
POWER8. In particular, the HFSCR bit that controls execution of
msgsndp and related operations does not exist on POWER8. The HFSCR
doesn't exist at all on POWER7.
Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
It is possible, through a narrow race condition, for a VCPU to exit
the guest with a H_CEDE hypercall while it has a doorbell interrupt
pending. In this case, the H_CEDE should return immediately, but in
fact it puts the VCPU to sleep until some other interrupt becomes
pending or a prod is received (via another VCPU doing H_PROD).
This fixes it by checking the DPDES (Directed Privileged Doorbell
Exception Status) bit for the thread along with the other interrupt
pending bits.
Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
Enable mtdtests and USB NCM gadget in DaVinci kernel
(as modules).
* tag 'davinci-for-v4.13/defconfig-2' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
ARM: davinci_all_defconfig: enable USB CDC NCM gadget
ARM: davinci_all_defconfig: enable mtdtests
Signed-off-by: Olof Johansson <olof@lixom.net>
A patch to fix warnings resulting from DT conversion
of VPIF driver.
* tag 'davinci-for-v4.13/soc-2' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
ARM: davinci: fix const warnings
Signed-off-by: Olof Johansson <olof@lixom.net>
arm64: tegra: Device tree changes for v4.13-rc1
This adds the CCPLEX cluster on Tegra186, which is used to initiate CPU
frequency and voltage transitions.
Also included is a bit of cleanup for PCI related device tree content,
in preparation for a future DTC release that has additional checks for
the PCI bus.
* tag 'tegra-for-4.13-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
arm64: dts: nvidia: fix PCI bus dtc warnings
arm64: tegra: Add CCPLEX_CLUSTER area in Tegra186
Signed-off-by: Olof Johansson <olof@lixom.net>
This allows userspace (e.g. QEMU) to enable large decrementer mode for
the guest when running on a POWER9 host, by setting the LPCR_LD bit in
the guest LPCR value. With this, the guest exit code saves 64 bits of
the guest DEC value on exit. Other places that use the guest DEC
value check the LPCR_LD bit in the guest LPCR value, and if it is set,
omit the 32-bit sign extension that would otherwise be done.
This doesn't change the DEC emulation used by PR KVM because PR KVM
is not supported on POWER9 yet.
This is partly based on an earlier patch by Oliver O'Halloran.
Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
ARM: tegra: Device tree changes for v4.13-rc1
This removes support for the Whistler board, which only a handful of
people ever had access to and which doesn't provide any features over
other Tegra20 devices that we support.
Also this cleans up some PCI related device tree content in preparation
for a future DTC release that has additional checks for the PCI bus.
* tag 'tegra-for-4.13-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: dts: tegra: fix PCI bus dtc warnings
ARM: tegra: remove Whistler support
Signed-off-by: Olof Johansson <olof@lixom.net>
ARMv8 Vexpress/Juno DT updates for v4.13
1. Adds support for Coresight CPU debug MMIO interface on all Juno variants.
2. Enables support for few SMMUs on Juno which were previously disabled
waiting for IOMMU-backed DMA API support to be stabilised.
* tag 'juno-updates-4.13' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
arm64: dts: juno: enable some SMMUs
arm64: dts: juno: add coresight CPU debug nodes
Signed-off-by: Olof Johansson <olof@lixom.net>
This is the pxa changes for v4.13 cycle.
This cycle is a minor fixes one, with :
- Coccinelle found improvements
- magician getting touchscreen driver support.
* tag 'pxa-for-4.13' of https://github.com/rjarzmik/linux:
ARM: pxa: Delete an error message for a failed memory allocation in pxa3xx_u2d_probe()
ARM: pxa: Improve a size determination in pxa3xx_u2d_probe()
ARM: pxa: Delete an error message for a failed memory allocation in pxa_pm_init()
ARM: pxa: magician: Add support for ADS7846 touchscreen
Signed-off-by: Olof Johansson <olof@lixom.net>
SoC changes for omap variants for v4.13 merge window:
- PM clean-up in preparation of adding am335x/am437x PM support
- Fixes for issues found by Coccinelle
- Legacy code removal now that everything boots in device
tree only mode
- Interconnect changes in preparation of moving clkctrl clocks
to be managed by clkctrl clock driver
- Interconnect changes to add omap4 crypto acceclerator
support
* tag 'omap-for-v4.13/soc-v4-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (27 commits)
ARM: OMAP4: hwmod_data: add SHAM crypto accelerator
ARM: OMAP4: hwmod data: add des
ARM: OMAP4: hwmod data: add aes2
ARM: OMAP4: hwmod data: add aes1
ARM: OMAP2+: Remove unused legacy code for n8x0
ARM: OMAP2+: Remove unused legacy code for watchdog
ARM: OMAP2+: Remove unused legacy code for interconnects
ARM: OMAP2+: Remove unused legacy code for PRM
ARM: OMAP2+: Remove unused legacy code for io.c
ARM: OMAP2+: Remove unused legacy code for McBSP
ARM: OMAP2+: SmartReflex: Delete an error message for a failed memory allocation in two functions
ARM: OMAP2+: Use kcalloc() in sr_set_nvalues()
ARM: OMAP2+: Improve a size determination in sr_dev_init()
ARM: OMAP2+: Delete an error message for a failed memory allocation in two functions
ARM: OMAP2+: Remove unused legacy code for device init
ARM: OMAP2+: Remove unused legacy code for PMU
ARM: OMAP2+: Remove unused legacy code for opp
ARM: OMAP2+: hwmod: populate clkctrl clocks for hwmods if available
ARM: OMAP4: cminst: add support for clkdm_xlate_address
ARM: omap2+: clockdomain: add clkdm_xlate_address
...
Signed-off-by: Olof Johansson <olof@lixom.net>
Allwinner H5 DT changes for 4.13
Just like the H3, this is mostly about enabling the EMAC on the H5, and
also has a new board, the Orange Pi Zero Plus 2
* tag 'sunxi-dt-h5-for-4.13' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
arm64: allwinner: h5: Add initial Orangepi Zero Plus 2 support
arm64: allwinner: h5: enable dwmac-sun8i for Nano Pi NEO2
arm64: allwinner: h5: enable dwmac-sun8i for Orange Pi Prime
arm64: allwinner: h5: sort the device nodes in / part for some boards
arm64: allwinner: h5: add support for NanoPi NEO2 board
arm64: allwinner: h5: add support for Orange Pi Prime board
arm64: allwinner: orangepi-pc2: Enable dwmac-sun8i
arm: sun8i: sunxi-h3-h5: add dwmac-sun8i ethernet driver
arm: sun8i: sunxi-h3-h5: Add dt node for the syscon control module
ARM: sunxi: h3-h5: Convert R_CCU raw numbers to macros
Signed-off-by: Olof Johansson <olof@lixom.net>
