Commit Graph

106767 Commits

Author SHA1 Message Date
Will Deacon
e3bc1e2421 microblaze: io: remove dummy relaxed accessor macros
These are now defined by asm-generic/io.h, so we don't need the private
definitions anymore.

Acked-by: Michal Simek <monstr@monstr.eu>
Signed-off-by: Will Deacon <will.deacon@arm.com>
2014-10-20 18:49:17 +01:00
Daniel Borkmann
74c3deacb2 net: bpf: arm64: minor fix of type in jited
Commit 286aad3c40 ("net: bpf: be friendly to kmemcheck") changed the
type of jited from a bitfield into a bool. As this commmit wasn't available
at the time when arm64 eBPF JIT was merged, fix it up now as net is merged
into mainline.

Signed-off-by: Daniel Borkmann <dborkman@redhat.com>
Cc: Zi Shen Lim <zlim.lnx@gmail.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2014-10-20 17:47:04 +01:00
Zi Shen Lim
30d3d94cc3 arm64: bpf: add 'load 64-bit immediate' instruction
Commit 02ab695bb3 (net: filter: add "load 64-bit immediate" eBPF
instruction) introduced a new eBPF instruction. Let's add support
for this for arm64 as well.

Our arm64 eBPF JIT compiler now passes the new "load 64-bit
immediate" test case introduced in the same commit 02ab695bb3.

Signed-off-by: Zi Shen Lim <zlim.lnx@gmail.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: David S. Miller <davem@davemloft.net>
Cc: Alexei Starovoitov <ast@plumgrid.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2014-10-20 17:47:03 +01:00
Zi Shen Lim
d65a634a0a arm64: bpf: add 'shift by register' instructions
Commit 72b603ee8c ("bpf: x86: add missing 'shift by register'
instructions to x64 eBPF JIT") noted support for 'shift by register'
in eBPF and added support for it for x64. Let's enable this for arm64
as well.

The arm64 eBPF JIT compiler now passes the new 'shift by register'
test case introduced in the same commit 72b603ee8c.

Signed-off-by: Zi Shen Lim <zlim.lnx@gmail.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: David S. Miller <davem@davemloft.net>
Cc: Alexei Starovoitov <ast@plumgrid.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2014-10-20 17:47:03 +01:00
Daniel Borkmann
b569c1c622 net: bpf: arm64: address randomize and write protect JIT code
This is the ARM64 variant for 314beb9bca ("x86: bpf_jit_comp: secure bpf
jit against spraying attacks").

Thanks to commit 11d91a770f ("arm64: Add CONFIG_DEBUG_SET_MODULE_RONX
support") which added necessary infrastructure, we can now implement
RO marking of eBPF generated JIT image pages and randomize start offset
for the JIT code, so that it does not reside directly on a page boundary
anymore. Likewise, the holes are filled with illegal instructions: here
we use BRK #0x100 (opcode 0xd4202000) to trigger a fault in the kernel
(unallocated BRKs would trigger a fault through do_debug_exception). This
seems more reliable as we don't have a guaranteed undefined instruction
space on ARM64.

This is basically the ARM64 variant of what we already have in ARM via
commit 55309dd3d4 ("net: bpf: arm: address randomize and write protect
JIT code"). Moreover, this commit also presents a merge resolution due to
conflicts with commit 60a3b2253c ("net: bpf: make eBPF interpreter images
read-only") as we don't use kfree() in bpf_jit_free() anymore to release
the locked bpf_prog structure, but instead bpf_prog_unlock_free() through
a different allocator.

JIT tested on aarch64 with BPF test suite.

Reference: http://mainisusuallyafunction.blogspot.com/2012/11/attacking-hardened-linux-systems-with.html
Signed-off-by: Daniel Borkmann <dborkman@redhat.com>
Reviewed-by: Zi Shen Lim <zlim.lnx@gmail.com>
Acked-by: Will Deacon <will.deacon@arm.com>
Cc: David S. Miller <davem@davemloft.net>
Cc: Alexei Starovoitov <ast@plumgrid.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2014-10-20 17:47:03 +01:00
Steve Capper
c0260ba906 arm64: mm: Correct fixmap pagetable types
Compiling with STRICT_MM_TYPECHECKS gives the following
arch/arm64/mm/ioremap.c: In function ‘early_ioremap_init’:
arch/arm64/mm/ioremap.c:152:2: warning: passing argument 3 of
‘pud_populate’ from incompatible pointer type
  pud_populate(&init_mm, pud, bm_pmd);

The data types for bm_pmd and bm_pud are incorrectly set to pte_t.
This patch corrects these types.

Signed-off-by: Steve Capper <steve.capper@linaro.org>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2014-10-20 17:47:02 +01:00
Victor Kamensky
971a5b6fe6 arm64: compat: fix compat types affecting struct compat_elf_prpsinfo
The compat_elf_prpsinfo structure does not match the arch/arm struct
elf_pspsinfo definition. As result NT_PRPSINFO note in core file
created by arm64 kernel for aarch32 (compat) process has wrong size.
So gdb cannot display command that caused process crash.

Fix is to change size of __compat_uid_t, __compat_gid_t so it would
match size of similar fields in arch/arm case.

Signed-off-by: Victor Kamensky <victor.kamensky@linaro.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Cc: <stable@vger.kernel.org>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2014-10-20 17:47:02 +01:00
Catalin Marinas
2a0b5c0d19 arm64: Align less than PAGE_SIZE pgds naturally
When the pgd size is smaller than PAGE_SIZE, pgd_alloc() uses kzalloc()
to save space. However, this is not always naturally aligned as required
by the architecture. This patch creates a kmem_cache for pgd allocations
with the correct alignment.

The current kernel configurations with 4K pages + 39-bit VA and 64K
pages + 42-bit VA use a full page for the pgd and are not affected. The
patch is required for 48-bit VA with 64K pages where the pgd is 512
bytes.

Reported-by: Christoffer Dall <christoffer.dall@linaro.org>
Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2014-10-20 17:47:02 +01:00
Christoffer Dall
04f905a956 arm64: Allow 48-bits VA space without ARM_SMMU
Now when KVM has been reworked to support 48-bits host VA space, we can
allow systems to be configured with this option.  However, the ARM SMMU
driver also needs to be tweaked for 48-bit support so only allow the
config option to be set when not including support for theSMMU.

Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2014-10-20 17:47:02 +01:00
Jiang Liu
961b6a7003 x86: ACPI: Do not translate GSI number if IOAPIC is disabled
When IOAPIC is disabled, acpi_gsi_to_irq() should return gsi directly
instead of calling mp_map_gsi_to_irq() to translate gsi to IRQ by IOAPIC.
It fixes https://bugzilla.kernel.org/show_bug.cgi?id=84381.

This regression was introduced with commit 6b9fb70824 "x86, ACPI,
irq: Consolidate algorithm of mapping (ioapic, pin) to IRQ number"

Reported-and-Tested-by: Thomas Richter <thor@math.tu-berlin.de>
Signed-off-by: Jiang Liu <jiang.liu@linux.intel.com>
Cc: Tony Luck <tony.luck@intel.com>
Cc: Thomas Richter <thor@math.tu-berlin.de>
Cc: rui.zhang@intel.com
Cc: Rafael J. Wysocki <rjw@rjwysocki.net>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: <stable@vger.kernel.org> # 3.17
Link: http://lkml.kernel.org/r/1413816327-12850-1-git-send-email-jiang.liu@linux.intel.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2014-10-20 17:23:00 +02:00
Bartlomiej Zolnierkiewicz
e540920cf2 ARM: dts: add CPU nodes for Exynos4 SoCs
Recent patch by Tomasz Figa ("irqchip: gic: Fix core ID calculation
when topology is read from DT") fixed GIC driver to filter cluster ID
from values returned by cpu_logical_map() for SoCs having registers
mapped without per-CPU banking making it is possible to add CPU nodes
for Exynos4 SoCs.  In case of Exynos SoCs these CPU nodes are also
required by future changes adding initialization of cpuidle states in
Exynos cpuidle driver through DT.

Tested on Origen board (Exynos4210 SoC) and Trats2 (Exynos4412 SoC).

Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-10-21 00:12:42 +09:00
Jacek Anaszewski
752d3a23d1 ARM: dts: add MFC codec device node for exynos3250
Signed-off-by: Jacek Anaszewski <j.anaszewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-10-21 00:12:42 +09:00
Krzysztof Kozlowski
7eec126675 ARM: dts: Add Maxim 77693 PMIC to exynos4412-trats2
The MAX77693 is a companion power management IC for smart phones and
tablets.

The MAX77693 contains input over-voltage protection (OVP),
a fully-integrated 2.5A switching charger for Lithium Ion battery with
integrated battery disconnect, OTG/accessory 5V output power,
a high-current white LED driver for camera flash, two safeout LDOs,
a haptic motor driver, Model Gauge m3 battery fuel gauge and MicroUSB
Interface Controller (MUIC). I2C serial interface is used for
communicating.

Add MAX77693 node to the Trats2 board. This allows using:
 - charger regulator,
 - 2 safeout LDO regulators (for USB OTG),
 - extcon.

Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-10-21 00:12:42 +09:00
Tomasz Figa
09918a98b7 ARM: dts: Add sleep mode pin configuration for exynos4412-trats2
This patch adds sleep mode pin configuration using pin control hog
mechanism to configure states of GPIO pins in sleep mode. This is
required to reduce leakage current in sleep mode and prevent glitching
of components on the board.

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-10-21 00:12:41 +09:00
Tomasz Figa
7f41e1cab7 ARM: dts: Add utility macro to define pin sleep states for exynos4x12-pinctrl
This patch adds a convenient macro which constructs an Exynos pinctrl
pinconf node containing properties needed to configure sleep state of
given pin with given parameters. It will be used by further patch which
adds a large number of sleep states for pins that need such
configuration on certain boards.

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-10-21 00:12:41 +09:00
Tomasz Figa
76fe98b900 ARM: dts: Keep eMMC regulators soft-disabled for exynos4412-trats2
In MAX77686 PMIC two regulators dedicated for eMMC memory can be
controlled both by I2C interface and a GPIO pin, with the resulting
regulator state being a logical OR of both. Since the GPIO control is
used both by the kernel and the lowest level bootloader at reset, the
regulator should be disabled by I2C control to allow it to be turned off
by GPIO control.

This patch removes regulator-always-on properties from both regulators
and, while at it, also unsupported regulator-mem-off.

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-10-21 00:12:41 +09:00
Naveen Krishna Chatradhi
65354307c1 ARM: dts: correct the mmc0 capability string for exynos Peach boards
MMC capability for HS200 is parsed in mmc/core/host.c as
dts string "mmc-hs200-1_8v".

This patch corrects the dts string for Exynos5420 based peach-pit
and Exynos5800 based peach-pi boards.

Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com>
Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-10-21 00:12:41 +09:00
Javier Martinez Canillas
90fbb382da ARM: dts: Add rtc_src clk for s3c-rtc on exynos5250-snow
commit 546b117fdf17 ("rtc: s3c: add support for RTC of Exynos3250 SoC")
added an "rtc_src" DT property for the Samsung's S3C Real Time Clock
controller that specifies the 32.768 kHz clock that uses the RTC as
its source clock. In the case of the Exynos5250 based Snow board, the
Maxim 77686 32kHz AP clock is used as the source clock.

Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-10-21 00:12:40 +09:00
Javier Martinez Canillas
fa781ddab9 ARM: dts: Add rtc_src clk for s3c-rtc on exynos Peach boards
commit 546b117fdf17 ("rtc: s3c: add support for RTC of Exynos3250 SoC")
added an "rtc_src" DT property for the Samsung's S3C Real Time Clock
controller that specifies the 32.768 kHz clock that uses the RTC as
its source clock. In the case of the Peach Pit and Pi machines, the
Maxim 77802 32kHz AP clock is used as the source clock.

Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-10-21 00:12:40 +09:00
Tomasz Figa
5e794de514 ARM: dts: Enable PWM node by default for s3c64xx
The PWM block is required for system clock source so it must be always
enabled. This patch fixes boot issues on SMDK6410 which did not have
the node enabled explicitly for other purposes.

Fixes: eeb93d02 ("clocksource: of: Respect device tree node status")

Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-10-21 00:12:40 +09:00
Andreas Faerber
53dd4138bb ARM: dts: Add exynos5250-spring device tree
Adds initial support for the HP Chromebook 11.

Cc: Vincent Palatin <vpalatin@chromium.org>
Cc: Doug Anderson <dianders@chromium.org>
Cc: Stephan van Schaik <stephan@synkhronix.com>
Signed-off-by: Andreas Faerber <afaerber@suse.de>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-10-21 00:12:40 +09:00
Andreas Faerber
ceb5b5deaf ARM: dts: Simplify USB3503 on exynos5250-arndale
There's no need for a simple-bus, place the smsc,usb3503a directly into
the root node. That's what we're going to do on exynos5250-spring.

Reported-by: Tomasz Figa <t.figa@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Andreas Faerber <afaerber@suse.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-10-21 00:12:40 +09:00
Andreas Faerber
e79bfe1244 ARM: dts: Fix apparent GPIO typo in exynos5250-arndale
The GPIO flag 2 has no constant assigned, so this was probably
active-low.

Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Andreas Faerber <afaerber@suse.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-10-21 00:12:40 +09:00
Andreas Faerber
c71335e7e8 ARM: dts: Clean up exynos5250-arndale
Use the new style of referencing inherited nodes, use symbolic names,
tidy indentation and reorder includes.

Goal is the alignment of all exynos5250 based device trees for
comparison.

Signed-off-by: Andreas Faerber <afaerber@suse.de>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
[kgene.kim@samsung.com: rebased]
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-10-21 00:12:39 +09:00
Andreas Faerber
adca3e614e ARM: dts: Clean up exynos5250-smdk5250
Use the new style for referencing inherited nodes and use symbolic
names. Goal is the alignment of all exynos5250 based device trees
for comparison.

Signed-off-by: Andreas Faerber <afaerber@suse.de>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
[kgene.kim@samsung.com: rebased and squashed]
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-10-21 00:12:39 +09:00
Andreas Faerber
5140e29d67 ARM: dts: Fill in bootargs for exynos5250-snow
exynos5250-cros-common.dtsi had an empty /chosen node.
Fill in exemplary boot arguments.

Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Andreas Faerber <afaerber@suse.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-10-21 00:12:39 +09:00
Andreas Faerber
ca5423e8b2 ARM: dts: Clean up exynos5250-snow
Use the new style of referencing inherited nodes and use symbolic
names. Reorder one pinctrl node in GPIO order.
Goal is the alignment of all exynos5250 based device trees for
comparison.

Suggested-by: Doug Anderson <dianders@chromium.org>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Andreas Faerber <afaerber@suse.de>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
[kgene.kim@samsung.com: rebased and squashed]
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-10-21 00:12:39 +09:00
Andreas Faerber
19fd45bf5f ARM: dts: Prepare node labels for exynos5250
Allows them to be extended by reference.

Reviewed-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Andreas Faerber <afaerber@suse.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-10-21 00:12:39 +09:00
Krzysztof Kozlowski
b588aaec6d ARM: EXYNOS: SWRESET is needed to boot secondary CPU on exynos3250
Without software reset the secondary CPU does not power up and
exynos_boot_secondary() ends with pen_release equal to 1. This can be
observed in dmesg:
	CPU1: failed to come online
	Brought up 1 CPUs
	SMP: Total of 1 processors activated.
	CPU: All CPU(s) started in SVC mode.

When booting the secondary CPU on Exynos3250 execute also software
reset for core 1.

Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-10-21 00:06:36 +09:00
Bartlomiej Zolnierkiewicz
0d713cf1a6 ARM: EXYNOS: Fix build with PM_SLEEP=n and ARM_EXYNOS_CPUIDLE=y
Fix building of exynos_defconfig with CONFIG_PM_SLEEP disabled and
CONFIG_ARM_EXYNOS_CPUIDLE enabled by:

* adding EXYNOS_CPU_SUSPEND config option
* always building sleep.o
* building pm.o if EXYNOS_CPU_SUSPEND is enabled
* moving suspend specific code from pm.c to suspend.c
* enabling pm-common.o build also for EXYNOS_CPU_SUSPEND option

[ Please note that there are no changes in the code moved from pm.c
  to suspend.c except making few functions non-static and cleaning
  up includes. ]

Also while at it update Copyright dates.

The build error messages:
drivers/built-in.o: In function `exynos_enter_core0_aftr':
/home/bzolnier/linux/drivers/cpuidle/cpuidle-exynos.c:36: undefined reference to `cpu_suspend'
arch/arm/mach-exynos/built-in.o:(.data+0x74): undefined reference to `exynos_enter_aftr'
make: *** [vmlinux] Error 1

This patch has been tested on Exynos4210 based Origen board.

Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-10-21 00:06:36 +09:00
Bartlomiej Zolnierkiewicz
42d5dc3786 ARM: EXYNOS: allow driver usage on Exynos4x12 SoCs
Register cpuidle platform device on Exynos4x12 SoCs allowing EXYNOS
cpuidle driver usage on these SoCs.

AFTR mode reduces power consumption on Trats2 board (Exynos4412 SoC
with secure firmware enabled) by ~12% when EXYNOS cpuidle driver is
enabled (in both cases the default exynos_defconfig config is used
and CPU1-3 are offlined).

Currently Exynos4412 SoC support is limited to Trats2 board.

Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-10-21 00:06:36 +09:00
Bartlomiej Zolnierkiewicz
c2dd114d24 ARM: EXYNOS: fix register setup for AFTR mode code
Add S5P_CENTRAL_SEQ_OPTION register setup to cpuidle AFTR mode code
by moving the relevant code from exynos_pm_suspend() (used only by
suspend) to exynos_pm_central_suspend() (used by both suspend and
AFTR).  Without this setup AFTR mode doesn't show any benefit over
WFI one (at least on Exynos4412 SoC).  When this setup is applied
AFTR mode reduces power consumption by ~12% (as measured on Trats2
board).

This change is a preparation for adding secure firmware support to
EXYNOS cpuidle driver.

Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-10-21 00:06:36 +09:00
Bartlomiej Zolnierkiewicz
a135e20185 ARM: EXYNOS: add secure firmware support to AFTR mode code
* Move cp15 registers saving to exynos_save_cp15() helper and add
  additional helper usage to do_idle firmware method.

* Use resume firmware method instead of exynos_cpu_restore_register()
  and skip exynos_cpu_save_register() on boards with secure firmware
  enabled.

* Use sysram_ns_base_addr + 0x24/0x20 addresses instead of the default
  ones used by exynos_cpu_set_boot_vector() on boards with secure
  firmware enabled.

* Use do_idle firmware method instead of cpu_do_idle() on boards with
  secure firmware enabled.

Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-10-21 00:06:36 +09:00
Bartlomiej Zolnierkiewicz
0b7778a801 ARM: firmware: add AFTR mode support to firmware do_idle method
On some platforms (i.e. EXYNOS ones) more than one idle mode is
available and we need to distinguish them in firmware do_idle method.

Add mode parameter to do_idle firmware method and AFTR mode support
to EXYNOS do_idle implementation.

This change is a preparation for adding secure firmware support to
EXYNOS cpuidle driver.

This patch shouldn't cause any functionality changes.

Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-10-21 00:06:35 +09:00
Bartlomiej Zolnierkiewicz
134abc297e ARM: EXYNOS: replace EXYNOS_BOOT_VECTOR_* macros by static inlines
Replace EXYNOS_BOOT_VECTOR_ADDR and EXYNOS_BOOT_VECTOR_FLAG macros
by exynos_boot_vector_addr() and exynos_boot_vector_flag() static
inlines.

This patch shouldn't cause any functionality changes.

Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-10-21 00:06:35 +09:00
Tomasz Figa
2b9d9c321b ARM: EXYNOS: Add support for firmware-assisted suspend/resume
On a numer of Exynos-based boards Linux kernel is running in non-secure
mode under a secure firmware. This means that certain operations need to
be handled in special way, with firmware assistance. System-wide
suspend/resume is an example of such operations.

This patch adds support for firmware-assisted suspend/resume by
leveraging recently introduced suspend and resume firmware operations
and modifying existing suspend/resume paths to account for presence of
secure firmware.

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
[kgene.kim@samsung.com: rebased]
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-10-21 00:06:35 +09:00
Tomasz Figa
9c261f89a3 ARM: firmware: Introduce suspend and resume operations
This patch extends the firmware_ops structure with two new callbacks:
.suspend() and .resume(). The former is intended to ask the firmware to
save all its volatile state and suspend the system, without returning
back to the kernel in between. The latter is to be called early by
very low level platform suspend code after waking up to restore low
level hardware state, which can't be restored in non-secure mode.

While at it, outdated version of the structure is removed from the
documentation and replaced with a reference to the header file.

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Acked-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-10-21 00:06:35 +09:00
Vikas Sajjan
066da1ae52 ARM: EXYNOS: Refactor the pm code to use DT based lookup
Refactoring the pm.c to avoid using "soc_is_exynos" checks,
instead use the DT based lookup.

While at it, consolidate the common code across SoCs
and create static helper functions.

Signed-off-by: Vikas Sajjan <vikas.sajjan@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-10-21 00:06:35 +09:00
Vikas Sajjan
32ed35ff22 ARM: EXYNOS: Move Disabling of JPEG USE_RETENTION for exynos5250 to pmu.c
Move the Disabling of JPEG USE_RETENTION for exynos5250 to pmu.c to
make way for refactoring of pm.c and to create common functions across
exynos4 and exynos5250.

Signed-off-by: Vikas Sajjan <vikas.sajjan@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-10-21 00:06:35 +09:00
Krzysztof Kozlowski
13cfa6c4f7 ARM: EXYNOS: Fix CPU idle clock down after CPU off
On Exynos4 USE_DELAYED_RESET_ASSERTION must be set in
ARM_COREx_OPTION register during CPU power down. This is the proper way
of powering down CPU on Exynos4.

Additionally on Exynos4212 without this the CPU clock down feature won't
work after powering down some CPU and the online CPUs will work at full
frequency chosen by CPUfreq governor.

Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-10-21 00:06:22 +09:00
Krzysztof Kozlowski
27b9ee852c ARM: EXYNOS: Remove unneeded __ref annotation for cpu_die function
The __ref annotation for exynos_cpu_die() is not needed because the
function does not reference any __init/__exit symbol or call.

Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-10-21 00:06:22 +09:00
Krzysztof Kozlowski
6f0b7c0c6f ARM: EXYNOS: Move code from hotplug.c to platsmp.c
Cleanup a little the SMP/hotplug code for Exynos by:
1. Moving completely all functions from hotplug.c into the platsmp.c;
2. Deleting the hotplug.c file.

After recent cleanups (e.g. 75ad2ab28f "ARM: EXYNOS: use
v7_exit_coherency_flush macro for cache disabling") there was only CPU
power down related code in hotplug.c file.

Rationale behind the code movement and benefits:
1. The file platsmp.c is the only user of code located in hotplug.c.
   Keeping code in hotplug.c required declaring exynos_cpu_die() in common.h.
   Such dependencies and mentioned exynos_cpu_die() declaration can be
   removed.
2. In next patches exynos_set_delayed_reset_assertion() will be
   introduced. This function will be called by:
    - cpu_leave_power (hotplug.c),
    - platform_do_lowpower (hotplug.c),
    - exynos_boot_secondary (platsmp.c).

Merging hotplug.c into platsmp.c leads to simpler and cleaner code with
less dependencies between files.

The commit only moves code around with one additional observable change:
the hotplug.c was compiled with custom CFLAGS (-march=armv7-a). These
CFLAGS are not necessary any more.

Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-10-21 00:06:22 +09:00
Wolfram Sang
b28af12d11 x86: platform: olpc: drop owner assignment from platform_drivers
A platform_driver does not need to set an owner, it will be populated by the
driver core.

Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2014-10-20 16:20:16 +02:00
Wolfram Sang
fe242ccbc0 x86: platform: iris: drop owner assignment from platform_drivers
A platform_driver does not need to set an owner, it will be populated by the
driver core.

Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2014-10-20 16:20:15 +02:00
Wolfram Sang
de72024262 sparc: kernel: drop owner assignment from platform_drivers
A platform_driver does not need to set an owner, it will be populated by the
driver core.

Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2014-10-20 16:20:15 +02:00
Wolfram Sang
1d5f672ea1 sparc: include: asm: drop owner assignment from platform_drivers
A platform_driver does not need to set an owner, it will be populated by the
driver core.

Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2014-10-20 16:20:14 +02:00
Wolfram Sang
f8977af9cd s390: appldata: drop owner assignment from platform_drivers
A platform_driver does not need to set an owner, it will be populated by the
driver core.

Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2014-10-20 16:20:13 +02:00
Wolfram Sang
e70db68276 powerpc: sysdev: qe_lib: drop owner assignment from platform_drivers
A platform_driver does not need to set an owner, it will be populated by the
driver core.

Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2014-10-20 16:20:13 +02:00
Wolfram Sang
4ad7fb261d powerpc: sysdev: drop owner assignment from platform_drivers
A platform_driver does not need to set an owner, it will be populated by the
driver core.

Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2014-10-20 16:20:13 +02:00
Wolfram Sang
0b06ab798c powerpc: platforms: pasemi: drop owner assignment from platform_drivers
A platform_driver does not need to set an owner, it will be populated by the
driver core.

Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2014-10-20 16:20:12 +02:00