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arm64: dts: renesas: r8a779f0: Add GPIO nodes

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Add device nodes for the General Purpose Input/Output (GPIO) blocks on
the Renesas R-Car S4-8 (R8A779F0) SoC.

Note that GPIO blocks 4-7 are not added, as they can only be accessed
from the Control Domain.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/7fb68561026fa8bb5d9baf0596560c5c719a38cc.1649086225.git.geert+renesas@glider.be
This commit is contained in:
Geert Uytterhoeven
2022-04-04 17:35:32 +02:00
parent 6494e4f905
commit 8ba8560d4f
1 changed files with 60 additions and 0 deletions
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60
arch/arm64/boot/dts/renesas/r8a779f0.dtsi
View File

@@ -76,6 +76,66 @@
<0 0xe6051000 0 0x16c>, <0 0xe6051800 0 0x16c>;
};
gpio0: gpio@e6050180 {
compatible = "renesas,gpio-r8a779f0",
"renesas,rcar-gen4-gpio";
reg = <0 0xe6050180 0 0x54>;
interrupts = <GIC_SPI 822 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 915>;
power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
resets = <&cpg 915>;
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&pfc 0 0 21>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpio1: gpio@e6050980 {
compatible = "renesas,gpio-r8a779f0",
"renesas,rcar-gen4-gpio";
reg = <0 0xe6050980 0 0x54>;
interrupts = <GIC_SPI 823 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 915>;
power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
resets = <&cpg 915>;
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&pfc 0 32 25>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpio2: gpio@e6051180 {
compatible = "renesas,gpio-r8a779f0",
"renesas,rcar-gen4-gpio";
reg = <0 0xe6051180 0 0x54>;
interrupts = <GIC_SPI 824 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 915>;
power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
resets = <&cpg 915>;
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&pfc 0 64 17>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpio3: gpio@e6051980 {
compatible = "renesas,gpio-r8a779f0",
"renesas,rcar-gen4-gpio";
reg = <0 0xe6051980 0 0x54>;
interrupts = <GIC_SPI 825 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 915>;
power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
resets = <&cpg 915>;
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&pfc 0 96 19>;
interrupt-controller;
#interrupt-cells = <2>;
};
cpg: clock-controller@e6150000 {
compatible = "renesas,r8a779f0-cpg-mssr";
reg = <0 0xe6150000 0 0x4000>;