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arm64: dts: renesas: rzg2ul-smarc: Add scif0 and audio clk pins

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Add scif0 and audio clk pins to soc pinctrl dtsi and drop deleting
the pinctrl-0 and pinctrl-names properties for scif0 node so that
we now actually make use of these properties for scif0.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220402081328.26292-3-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
This commit is contained in:
Biju Das
2022-04-02 09:13:23 +01:00
committed by Geert Uytterhoeven
parent 2d10555298
commit 4e44055440
2 changed files with 25 additions and 5 deletions
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6
arch/arm64/boot/dts/renesas/r9a07g043u11-smarc.dts
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@@ -8,6 +8,7 @@
/dts-v1/;
#include "r9a07g043.dtsi"
#include "rzg2ul-smarc-som.dtsi"
#include "rzg2ul-smarc-pinfunction.dtsi"
#include "rz-smarc-common.dtsi"
/ {
@@ -73,11 +74,6 @@
status = "disabled";
};
&scif0 {
/delete-property/ pinctrl-0;
/delete-property/ pinctrl-names;
};
&sdhi1 {
/delete-property/ pinctrl-0;
/delete-property/ pinctrl-1;

24
arch/arm64/boot/dts/renesas/rzg2ul-smarc-pinfunction.dtsi Normal file
View File

@@ -0,0 +1,24 @@
// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
/*
* Device Tree Source for the RZ/G2UL SMARC pincontrol parts
*
* Copyright (C) 2022 Renesas Electronics Corp.
*/
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
&pinctrl {
pinctrl-0 = <&sound_clk_pins>;
pinctrl-names = "default";
scif0_pins: scif0 {
pinmux = <RZG2L_PORT_PINMUX(6, 4, 6)>, /* TxD */
<RZG2L_PORT_PINMUX(6, 3, 6)>; /* RxD */
};
sound_clk_pins: sound_clk {
pins = "AUDIO_CLK1", "AUDIO_CLK2";
input-enable;
};
};