mirror of
https://github.com/ivoszbg/uniLoader.git
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285 lines
7.9 KiB
Makefile
285 lines
7.9 KiB
Makefile
# ==========================================================================
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# Building
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# ==========================================================================
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src := $(obj)
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PHONY := __build
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__build:
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# Init all relevant variables used in kbuild files so
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# 1) they have correct type
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# 2) they do not inherit any value from the environment
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obj-y :=
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lib-y :=
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soc-y :=
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always :=
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targets :=
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subdir-y :=
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EXTRA_AFLAGS :=
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EXTRA_CFLAGS :=
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EXTRA_CPPFLAGS :=
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EXTRA_LDFLAGS :=
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asflags-y :=
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ccflags-y :=
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cppflags-y :=
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ldflags-y :=
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subdir-asflags-y :=
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subdir-ccflags-y :=
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# Read auto.conf if it exists, otherwise ignore
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-include include/config/auto.conf
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include scripts/Kbuild.include
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# For backward compatibility check that these variables do not change
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save-cflags := $(CFLAGS)
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# The filename Kbuild has precedence over Makefile
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kbuild-dir := $(if $(filter /%,$(src)),$(src),$(srctree)/$(src))
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kbuild-file := $(if $(wildcard $(kbuild-dir)/Kbuild),$(kbuild-dir)/Kbuild,$(kbuild-dir)/Makefile)
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include $(kbuild-file)
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# If the save-* variables changed error out
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ifeq ($(KBUILD_NOPEDANTIC),)
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ifneq ("$(save-cflags)","$(CFLAGS)")
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$(error CFLAGS was changed in "$(kbuild-file)". Fix it to use EXTRA_CFLAGS)
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endif
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endif
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#
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# make W=... settings
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#
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# W=1 - warnings that may be relevant and does not occur too often
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# W=2 - warnings that occur quite often but may still be relevant
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# W=3 - the more obscure warnings, can most likely be ignored
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#
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# $(call cc-option, -W...) handles gcc -W.. options which
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# are not supported by all versions of the compiler
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ifdef KBUILD_ENABLE_EXTRA_GCC_CHECKS
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warning- := $(empty)
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warning-1 := -Wextra -Wunused -Wno-unused-parameter
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warning-1 += -Wmissing-declarations
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warning-1 += -Wmissing-format-attribute
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warning-1 += -Wmissing-prototypes
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warning-1 += -Wold-style-definition
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warning-1 += $(call cc-option, -Wmissing-include-dirs)
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warning-1 += $(call cc-option, -Wunused-but-set-variable)
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warning-2 := -Waggregate-return
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warning-2 += -Wcast-align
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warning-2 += -Wdisabled-optimization
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warning-2 += -Wnested-externs
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warning-2 += -Wshadow
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warning-2 += $(call cc-option, -Wlogical-op)
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warning-3 := -Wbad-function-cast
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warning-3 += -Wcast-qual
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warning-3 += -Wconversion
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warning-3 += -Wpacked
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warning-3 += -Wpadded
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warning-3 += -Wpointer-arith
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warning-3 += -Wredundant-decls
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warning-3 += -Wswitch-default
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warning-3 += $(call cc-option, -Wpacked-bitfield-compat)
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warning-3 += $(call cc-option, -Wvla)
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warning := $(warning-$(findstring 1, $(KBUILD_ENABLE_EXTRA_GCC_CHECKS)))
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warning += $(warning-$(findstring 2, $(KBUILD_ENABLE_EXTRA_GCC_CHECKS)))
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warning += $(warning-$(findstring 3, $(KBUILD_ENABLE_EXTRA_GCC_CHECKS)))
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ifeq ("$(strip $(warning))","")
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$(error W=$(KBUILD_ENABLE_EXTRA_GCC_CHECKS) is unknown)
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endif
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KBUILD_CFLAGS += $(warning)
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endif
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include scripts/Makefile.lib
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# Do not include host rules unless needed
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ifneq ($(hostprogs-y),)
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include scripts/Makefile.host
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endif
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ifneq ($(KBUILD_SRC),)
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# Create output directory if not already present
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_dummy := $(shell [ -d $(obj) ] || mkdir -p $(obj))
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# Create directories for object files if directory does not exist
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# Needed when obj-y := dir/file.o syntax is used
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_dummy := $(foreach d,$(obj-dirs), $(shell [ -d $(d) ] || mkdir -p $(d)))
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endif
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ifndef obj
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$(warning kbuild: Makefile.build is included improperly)
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endif
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# ===========================================================================
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ifneq ($(strip $(lib-y) $(lib-)),)
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lib-target := $(obj)/lib.a
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endif
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ifneq ($(strip $(obj-y) $(obj-)),)
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builtin-target := $(obj)/built-in.o
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endif
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__build: $(builtin-target) $(lib-target) $(extra-y) $(subdir-ym) $(always)
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@:
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# Compile C sources (.c)
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# ---------------------------------------------------------------------------
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# Default is built-in, unless we know otherwise
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modkern_cflags = $(KBUILD_CFLAGS_KERNEL) $(CFLAGS_KERNEL)
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quiet_modtag := $(empty) $(empty)
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quiet_cmd_cc_s_c = CC $(quiet_modtag) $@
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cmd_cc_s_c = $(CC) $(c_flags) -fverbose-asm -S -o $@ $<
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$(obj)/%.s: $(src)/%.c FORCE
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$(call if_changed_dep,cc_s_c)
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quiet_cmd_cc_i_c = CPP $(quiet_modtag) $@
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cmd_cc_i_c = $(CPP) $(c_flags) -o $@ $<
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$(obj)/%.i: $(src)/%.c FORCE
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$(call if_changed_dep,cc_i_c)
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# C (.c) files
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# The C file is compiled and updated dependency information is generated.
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# (See cmd_cc_o_c + relevant part of rule_cc_o_c)
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quiet_cmd_cc_o_c = CC $(quiet_modtag) $@
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cmd_cc_o_c = $(CC) $(c_flags) -c -o $@ $<
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define rule_cc_o_c
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$(call echo-cmd,cc_o_c) $(cmd_cc_o_c); \
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scripts/basic/fixdep $(depfile) $@ '$(call make-cmd,cc_o_c)' > \
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$(dot-target).tmp; \
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rm -f $(depfile); \
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mv -f $(dot-target).tmp $(dot-target).cmd
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endef
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# Built-in and composite module parts
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$(obj)/%.o: $(src)/%.c FORCE
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$(call if_changed_rule,cc_o_c)
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quiet_cmd_cc_lst_c = MKLST $@
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cmd_cc_lst_c = $(CC) $(c_flags) -g -c -o $*.o $< && \
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$(CONFIG_SHELL) $(srctree)/scripts/makelst $*.o \
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System.map $(OBJDUMP) > $@
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$(obj)/%.lst: $(src)/%.c FORCE
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$(call if_changed_dep,cc_lst_c)
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# Compile assembler sources (.S)
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# ---------------------------------------------------------------------------
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modkern_aflags := $(KBUILD_AFLAGS_KERNEL) $(AFLAGS_KERNEL)
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quiet_cmd_as_s_S = CPP $(quiet_modtag) $@
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cmd_as_s_S = $(CPP) $(a_flags) -o $@ $<
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$(obj)/%.s: $(src)/%.S FORCE
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$(call if_changed_dep,as_s_S)
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quiet_cmd_as_o_S = AS $(quiet_modtag) $@
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cmd_as_o_S = $(CC) $(a_flags) -c -o $@ $<
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$(obj)/%.o: $(src)/%.S FORCE
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$(call if_changed_dep,as_o_S)
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targets += $(real-objs-y) $(lib-y)
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targets += $(real-objs-y) $(soc-y)
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targets += $(extra-y) $(MAKECMDGOALS) $(always)
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# Linker scripts preprocessor (.lds.S -> .lds)
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# ---------------------------------------------------------------------------
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quiet_cmd_cpp_lds_S = LDS $@
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cmd_cpp_lds_S = $(CPP) $(cpp_flags) -P -C -U$(ARCH) \
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-D__ASSEMBLY__ -DLINKER_SCRIPT -o $@ $<
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$(obj)/%.lds: $(src)/%.lds.S FORCE
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$(call if_changed_dep,cpp_lds_S)
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# Build the compiled-in targets
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# ---------------------------------------------------------------------------
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# To build objects in subdirs, we need to descend into the directories
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$(sort $(subdir-obj-y)): $(subdir-ym) ;
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#
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# Rule to compile a set of .o files into one .o file
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#
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ifdef builtin-target
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quiet_cmd_link_o_target = LD $@
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# If the list of objects to link is empty, just create an empty built-in.o
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cmd_link_o_target = $(if $(strip $(obj-y)),\
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$(LD) $(ld_flags) -r -o $@ $(filter $(obj-y), $^), \
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rm -f $@; $(AR) rcs$(KBUILD_ARFLAGS) $@)
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$(builtin-target): $(obj-y) FORCE
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$(call if_changed,link_o_target)
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targets += $(builtin-target)
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endif # builtin-target
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#
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# Rule to compile a set of .o files into one .a file
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#
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ifdef lib-target
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quiet_cmd_link_l_target = AR $@
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cmd_link_l_target = rm -f $@; $(AR) rcs$(KBUILD_ARFLAGS) $@ $(lib-y)
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$(lib-target): $(lib-y) FORCE
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$(call if_changed,link_l_target)
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targets += $(lib-target)
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endif
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ifdef soc-target
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quiet_cmd_link_l_target = AR $@
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cmd_link_l_target = rm -f $@; $(AR) rcs$(KBUILD_ARFLAGS) $@ $(soc-y)
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$(soc-target): $(soc-y) FORCE
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$(call if_changed,link_l_target)
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targets += $(soc-target)
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endif
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# Descending
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# ---------------------------------------------------------------------------
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PHONY += $(subdir-ym)
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$(subdir-ym):
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$(Q)$(MAKE) $(build)=$@
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# Add FORCE to the prequisites of a target to force it to be always rebuilt.
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# ---------------------------------------------------------------------------
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PHONY += FORCE
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FORCE:
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# Read all saved command lines and dependencies for the $(targets) we
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# may be building above, using $(if_changed{,_dep}). As an
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# optimization, we don't need to read them if the target does not
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# exist, we will rebuild anyway in that case.
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targets := $(wildcard $(sort $(targets)))
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cmd_files := $(wildcard $(foreach f,$(targets),$(dir $(f)).$(notdir $(f)).cmd))
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ifneq ($(cmd_files),)
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include $(cmd_files)
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endif
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# Declare the contents of the .PHONY variable as phony. We keep that
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# information in a variable se we can use it in if_changed and friends.
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.PHONY: $(PHONY)
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