6edb5dd388
Move the SATA options inside an 'if SATA' part, so they are grouped. Fix the 'Complient' typo while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Stefan Roese <sr@denx.de>
116 lines
2.8 KiB
Plaintext
116 lines
2.8 KiB
Plaintext
CONFIG_ARM=y
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CONFIG_SKIP_LOWLEVEL_INIT=y
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CONFIG_GIC_V3_ITS=y
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CONFIG_TARGET_LX2162AQDS=y
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CONFIG_TFABOOT=y
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CONFIG_SYS_TEXT_BASE=0x82000000
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CONFIG_SYS_MALLOC_LEN=0x202000
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CONFIG_SYS_MALLOC_F_LEN=0x6000
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CONFIG_NR_DRAM_BANKS=3
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CONFIG_ENV_SIZE=0x2000
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CONFIG_ENV_OFFSET=0x500000
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CONFIG_ENV_SECT_SIZE=0x20000
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CONFIG_DM_GPIO=y
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CONFIG_DEFAULT_DEVICE_TREE="fsl-lx2162a-qds"
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CONFIG_FSL_USE_PCA9547_MUX=y
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CONFIG_VID=y
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CONFIG_SPL_VID=y
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CONFIG_VID_FLS_ENV="lx2162aqds_vdd_mv"
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CONFIG_VOL_MONITOR_LTC3882_READ=y
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CONFIG_VOL_MONITOR_LTC3882_SET=y
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CONFIG_FSPI_AHB_EN_4BYTE=y
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CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y
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CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y
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CONFIG_AHCI=y
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CONFIG_OF_BOARD_FIXUP=y
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CONFIG_REMAKE_ELF=y
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CONFIG_MP=y
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CONFIG_FIT_SIGNATURE=y
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CONFIG_FIT_VERBOSE=y
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CONFIG_OF_BOARD_SETUP=y
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CONFIG_OF_STDOUT_VIA_ALIAS=y
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CONFIG_DYNAMIC_SYS_CLK_FREQ=y
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CONFIG_BOOTDELAY=10
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CONFIG_USE_BOOTARGS=y
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CONFIG_BOOTARGS="console=ttyAMA0,115200 root=/dev/ram0 earlycon=pl011,mmio32,0x21c0000 ramdisk_size=0x2000000 default_hugepagesz=1024m hugepagesz=1024m hugepages=2 pci=pcie_bus_perf"
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CONFIG_BOARD_EARLY_INIT_R=y
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CONFIG_MISC_INIT_R=y
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CONFIG_ID_EEPROM=y
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CONFIG_CMD_GREPENV=y
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CONFIG_CMD_EEPROM=y
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CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
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CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
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CONFIG_CMD_DM=y
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CONFIG_CMD_GPIO=y
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CONFIG_CMD_GPT=y
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CONFIG_CMD_I2C=y
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CONFIG_CMD_MMC=y
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CONFIG_CMD_OPTEE_RPMB=y
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CONFIG_CMD_PCI=y
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CONFIG_CMD_USB=y
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CONFIG_CMD_WDT=y
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CONFIG_CMD_CACHE=y
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CONFIG_OF_CONTROL=y
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CONFIG_OF_LIST="fsl-lx2162a-qds-17-x fsl-lx2162a-qds-18-x fsl-lx2162a-qds-20-x"
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CONFIG_MULTI_DTB_FIT=y
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CONFIG_ENV_OVERWRITE=y
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CONFIG_ENV_IS_IN_MMC=y
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CONFIG_ENV_IS_IN_SPI_FLASH=y
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CONFIG_ENV_ADDR=0x20500000
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CONFIG_NET_RANDOM_ETHADDR=y
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CONFIG_DM=y
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CONFIG_SATA=y
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CONFIG_SATA_CEVA=y
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CONFIG_FSL_CAAM=y
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CONFIG_DYNAMIC_DDR_CLK_FREQ=y
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CONFIG_DDR_ECC=y
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CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
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CONFIG_MPC8XXX_GPIO=y
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CONFIG_DM_I2C=y
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CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
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CONFIG_I2C_MUX=y
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CONFIG_I2C_MUX_PCA954x=y
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CONFIG_SYS_I2C_EEPROM_ADDR=0x57
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CONFIG_SUPPORT_EMMC_RPMB=y
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CONFIG_MMC_HS400_SUPPORT=y
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CONFIG_FSL_ESDHC=y
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CONFIG_MTD=y
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CONFIG_DM_SPI_FLASH=y
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CONFIG_SPI_FLASH_EON=y
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CONFIG_SPI_FLASH_STMICRO=y
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CONFIG_SPI_FLASH_MT35XU=y
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CONFIG_SPI_FLASH_SST=y
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# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
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CONFIG_PHYLIB=y
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CONFIG_PHY_AQUANTIA=y
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CONFIG_PHY_CORTINA=y
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CONFIG_SYS_CORTINA_NO_FW_UPLOAD=y
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CONFIG_PHY_REALTEK=y
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CONFIG_PHY_VITESSE=y
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CONFIG_DM_ETH=y
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CONFIG_DM_MDIO=y
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CONFIG_DM_MDIO_MUX=y
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CONFIG_E1000=y
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CONFIG_MII=y
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CONFIG_MDIO_MUX_I2CREG=y
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CONFIG_FSL_LS_MDIO=y
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CONFIG_PCI=y
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CONFIG_PCIE_LAYERSCAPE_RC=y
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CONFIG_DM_RTC=y
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CONFIG_RTC_PCF2127=y
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CONFIG_DM_SCSI=y
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CONFIG_DM_SERIAL=y
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CONFIG_PL01X_SERIAL=y
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CONFIG_SPI=y
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CONFIG_DM_SPI=y
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CONFIG_FSL_DSPI=y
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CONFIG_NXP_FSPI=y
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CONFIG_TEE=y
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CONFIG_OPTEE=y
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CONFIG_USB=y
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CONFIG_USB_XHCI_HCD=y
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CONFIG_USB_XHCI_DWC3=y
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CONFIG_WDT=y
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CONFIG_WDT_SBSA=y
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CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
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