045474be5e
Apple SoCs have an integrated NVMe controller that isn't connected over a PCIe bus. In preparation for adding support for this NVMe controller, split out the PCI support into its own file. This file is selected through a new CONFIG_NVME_PCI Kconfig option, so do a wholesale replacement of CONFIG_NVME with CONFIG_NVME_PCI. Signed-off-by: Mark Kettenis <kettenis@openbsd.org> Reviewed-by: Simon Glass <sjg@chromium.org> Tested on: Macbook Air M1 Tested-by: Simon Glass <sjg@chromium.org>
79 lines
1.8 KiB
Plaintext
79 lines
1.8 KiB
Plaintext
CONFIG_ARM=y
|
|
CONFIG_SKIP_LOWLEVEL_INIT=y
|
|
CONFIG_TARGET_LS1021ATWR=y
|
|
CONFIG_SYS_TEXT_BASE=0x60100000
|
|
CONFIG_SYS_MALLOC_LEN=0x1020000
|
|
CONFIG_NR_DRAM_BANKS=1
|
|
CONFIG_SYS_MEMTEST_START=0x80000000
|
|
CONFIG_SYS_MEMTEST_END=0x9fffffff
|
|
CONFIG_ENV_SIZE=0x20000
|
|
CONFIG_ENV_SECT_SIZE=0x20000
|
|
CONFIG_SYS_I2C_MXC_I2C1=y
|
|
CONFIG_SYS_I2C_MXC_I2C2=y
|
|
CONFIG_SYS_I2C_MXC_I2C3=y
|
|
CONFIG_DM_GPIO=y
|
|
CONFIG_DEFAULT_DEVICE_TREE="ls1021a-twr-lpuart"
|
|
CONFIG_AHCI=y
|
|
CONFIG_DISTRO_DEFAULTS=y
|
|
CONFIG_SYS_LOAD_ADDR=0x82000000
|
|
CONFIG_FIT=y
|
|
CONFIG_FIT_VERBOSE=y
|
|
CONFIG_OF_BOARD_SETUP=y
|
|
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
|
CONFIG_SYS_EXTRA_OPTIONS="LPUART"
|
|
CONFIG_BOOTDELAY=3
|
|
CONFIG_USE_BOOTARGS=y
|
|
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0"
|
|
CONFIG_BOOTCOMMAND="run distro_bootcmd; run nor_bootcmd;env exists secureboot && esbc_halt;"
|
|
CONFIG_SILENT_CONSOLE=y
|
|
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
|
|
CONFIG_MISC_INIT_R=y
|
|
CONFIG_ID_EEPROM=y
|
|
CONFIG_CMD_IMLS=y
|
|
CONFIG_CMD_GREPENV=y
|
|
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
|
|
CONFIG_CMD_MEMINFO=y
|
|
CONFIG_CMD_MEMTEST=y
|
|
CONFIG_CMD_GPIO=y
|
|
CONFIG_CMD_GPT=y
|
|
CONFIG_CMD_I2C=y
|
|
CONFIG_CMD_MMC=y
|
|
CONFIG_CMD_USB=y
|
|
# CONFIG_CMD_SETEXPR is not set
|
|
CONFIG_OF_CONTROL=y
|
|
CONFIG_ENV_OVERWRITE=y
|
|
CONFIG_ENV_IS_IN_FLASH=y
|
|
CONFIG_ENV_ADDR=0x60300000
|
|
CONFIG_DM=y
|
|
CONFIG_SATA=y
|
|
CONFIG_SATA_CEVA=y
|
|
CONFIG_FSL_CAAM=y
|
|
CONFIG_MPC8XXX_GPIO=y
|
|
CONFIG_DM_I2C=y
|
|
CONFIG_SPL_SYS_I2C_LEGACY=y
|
|
CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
|
|
CONFIG_SYS_I2C_EEPROM_ADDR=0x53
|
|
CONFIG_FSL_ESDHC=y
|
|
CONFIG_MTD=y
|
|
CONFIG_MTD_NOR_FLASH=y
|
|
CONFIG_FLASH_CFI_DRIVER=y
|
|
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
|
|
CONFIG_SYS_FLASH_CFI=y
|
|
CONFIG_PHY_ATHEROS=y
|
|
CONFIG_DM_ETH=y
|
|
CONFIG_DM_MDIO=y
|
|
CONFIG_PHY_GIGE=y
|
|
CONFIG_E1000=y
|
|
CONFIG_MII=y
|
|
CONFIG_TSEC_ENET=y
|
|
CONFIG_NVME_PCI=y
|
|
CONFIG_PCI=y
|
|
CONFIG_PCIE_LAYERSCAPE_RC=y
|
|
CONFIG_SYS_QE_FW_ADDR=0x60940000
|
|
CONFIG_DM_SCSI=y
|
|
CONFIG_DM_SERIAL=y
|
|
CONFIG_FSL_LPUART=y
|
|
CONFIG_USB=y
|
|
CONFIG_USB_XHCI_HCD=y
|
|
CONFIG_USB_XHCI_DWC3=y
|