ff53ecc387
Perform a simple rename of CONFIG_SH_ETHER_CACHE_WRITEBACK to CFG_SH_ETHER_CACHE_WRITEBACK Signed-off-by: Tom Rini <trini@konsulko.com>
40 lines
938 B
C
40 lines
938 B
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* include/configs/silk.h
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* This file is silk board configuration.
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*
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* Copyright (C) 2015 Renesas Electronics Corporation
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* Copyright (C) 2015 Cogent Embedded, Inc.
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*/
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#ifndef __SILK_H
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#define __SILK_H
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#include "rcar-gen2-common.h"
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#define STACK_AREA_SIZE 0x00100000
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#define LOW_LEVEL_MERAM_STACK \
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(SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)
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/* MEMORY */
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#define RCAR_GEN2_SDRAM_BASE 0x40000000
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#define RCAR_GEN2_SDRAM_SIZE (1024u * 1024 * 1024)
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#define RCAR_GEN2_UBOOT_SDRAM_SIZE (512 * 1024 * 1024)
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/* SH Ether */
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#define CONFIG_SH_ETHER_USE_PORT 0
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#define CONFIG_SH_ETHER_PHY_ADDR 0x1
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#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
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#define CFG_SH_ETHER_CACHE_WRITEBACK
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#define CFG_SH_ETHER_CACHE_INVALIDATE
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#define CFG_SH_ETHER_ALIGNE_SIZE 64
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/* Board Clock */
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#define CFG_EXTRA_ENV_SETTINGS \
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"bootm_size=0x10000000\0"
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/* SPL support */
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#endif /* __SILK_H */
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