2f8a6db5d8
In order to finish moving this symbol to Kconfig for all platforms, we need to do a few more things. First, for all platforms that define this to a function, introduce CONFIG_DYNAMIC_SYS_CLK_FREQ, similar to CONFIG_DYNAMIC_DDR_CLK_FREQ and populate clock_legacy.h. This entails also switching all users from CONFIG_SYS_CLK_FREQ to get_board_sys_clk() and updating a few preprocessor tests. With that done, all platforms that define a value here can be converted to Kconfig, and a fall-back of zero is sufficiently safe to use (and what is used today in cases where code may or may not have this available). Make sure that code which calls this function includes <clock_legacy.h> to get the prototype. Signed-off-by: Tom Rini <trini@konsulko.com>
55 lines
1.1 KiB
C
55 lines
1.1 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright 2008 Extreme Engineering Solutions, Inc.
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*/
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#include <common.h>
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#include <clock_legacy.h>
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#include <asm/io.h>
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/*
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* Return SYSCLK input frequency - 50 MHz or 66 MHz depending on POR config
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*/
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unsigned long get_board_sys_clk(void)
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{
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#if defined(CONFIG_MPC85xx)
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volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
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#elif defined(CONFIG_MPC86xx)
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immap_t *immap = (immap_t *)CONFIG_SYS_IMMR;
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volatile ccsr_gur_t *gur = &immap->im_gur;
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#endif
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if (in_be32(&gur->gpporcr) & 0x10000)
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return 66666666;
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else
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#ifdef CONFIG_ARCH_P2020
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return 100000000;
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#else
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return 50000000;
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#endif
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}
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#ifdef CONFIG_MPC85xx
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/*
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* Return DDR input clock - synchronous with SYSCLK or 66 MHz
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* Note: 86xx doesn't support asynchronous DDR clk
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*/
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unsigned long get_board_ddr_clk(void)
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{
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volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
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u32 ddr_ratio = (in_be32(&gur->porpllsr) & 0x00003e00) >> 9;
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if (ddr_ratio == 0x7)
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return get_board_sys_clk();
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#ifdef CONFIG_ARCH_P2020
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if (in_be32(&gur->gpporcr) & 0x20000)
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return 66666666;
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else
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return 100000000;
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#else
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return 66666666;
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#endif
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}
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#endif
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